| /external/mesa3d/src/gallium/drivers/svga/ |
| svga_tgsi_vgpu10.c | 105 union tgsi_immediate_data immediates[MAX_IMMEDIATE_COUNT][4]; member in struct:svga_shader_emitter_v10
106 unsigned num_immediates; /**< Number of immediates emitted */
107 unsigned common_immediate_pos[8]; /**< literals for common immediates */
669 /* all immediates are 32-bit values at this time so
755 /* there's no swizzle for in-line immediates */
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.c | [all...] |
| X86DisassemblerDecoder.h | 505 /* Immediates. There can be two in some cases */
508 uint64_t immediates[2]; member in struct:InternalInstruction
|
| /external/capstone/arch/X86/ |
| X86DisassemblerDecoder.h | 686 /* Immediates. There can be two in some cases */
688 uint64_t immediates[2]; member in struct:InternalInstruction
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 616 // Immediates. There can be two in some cases
619 uint64_t immediates[2]; member in struct:llvm::X86Disassembler::InternalInstruction
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow_swizzles.c | 98 * immediate registers by rearranging the immediates to allow the
109 /* The register does not contain immediates, but if all
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vec4_copy_propagation.cpp | 156 * propagating immediates here.
241 * The generator will handle immediates in both arguments (generating
|
| /external/mesa3d/src/mesa/state_tracker/ |
| st_tgsi_lower_yuv.c | 180 * + extra immediates for doing CSC
191 * Declare immediates for CSC conversion:
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/x86/ |
| immediate_encodings.ll | 2 ; For example, the encoding is shorter for 8-bit immediates or when using EAX.
360 ; bitwise AND that doesn't modify the two source operands, so for immediates
|
| /external/v8/src/arm/ |
| deoptimizer-arm.cc | 310 // We need to be able to generate immediates up to kMaxNumberOfEntries. On
327 // but we need two instructions to load most immediates over 0xff. To handle
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/MC/MCParser/ |
| MCTargetAsmParser.h | 380 /// immediates on ARM. TableGen expects a token operand, but the parser
381 /// will recognize them as immediates.
|
| /external/llvm/test/CodeGen/ARM/ |
| fast-isel.ll | 36 ; Check some simple operations with immediates
|
| /external/llvm/test/CodeGen/PowerPC/ |
| vaddsplat.ll | 3 ; Test optimizations of build_vector for 6-bit immediates.
|
| /external/llvm/tools/llvm-mcmarkup/ |
| llvm-mcmarkup.cpp | 102 // Color registers as red and immediates as cyan. Those don't have nested
|
| /external/mesa3d/docs/relnotes/ |
| 11.1.1.html | 106 <li>nv50/ir: can't have predication and immediates</li>
|
| 11.1.2.html | 163 <li>util/u_pstipple.c: copy immediates during transformation</li>
|
| 11.1.4.html | 155 <li>gk110/ir: make use of IMUL32I for all immediates</li>
|
| 11.2.2.html | 182 <li>gk110/ir: make use of IMUL32I for all immediates</li>
|
