| /bionic/libc/arch-arm/cortex-a7/bionic/ |
| memcpy_base.S | 66 // and copy using LDRD/STRD instructions.
|
| /system/extras/simpleperf/ |
| UnixSocket.h | 48 // (On arm, some instructions (like LDRD) don't support unaligned address),
|
| /art/runtime/arch/arm/ |
| quick_entrypoints_arm.S | [all...] |
| /device/google/contexthub/firmware/lib/libc/ |
| aeabi.cpp | 67 // are ordered for convenient use of LDRD/STRD on architecture 5TE and above.
|
| /external/capstone/suite/MC/ARM/ |
| basic-thumb2-instructions.s.cs | 321 0xd6,0xe9,0x06,0x35 = ldrd r3, r5, [r6, #24]
322 0xf6,0xe9,0x06,0x35 = ldrd r3, r5, [r6, #24]!
323 0xf6,0xe8,0x01,0x35 = ldrd r3, r5, [r6], #4
324 0x76,0xe8,0x02,0x35 = ldrd r3, r5, [r6], #-8
325 0xd6,0xe9,0x00,0x35 = ldrd r3, r5, [r6]
326 0xd3,0xe9,0x00,0x81 = ldrd r8, r1, [r3]
327 0x52,0xe9,0x00,0x01 = ldrd r0, r1, [r2, #-0]
328 0x72,0xe9,0x00,0x01 = ldrd r0, r1, [r2, #-0]!
329 0x72,0xe8,0x00,0x01 = ldrd r0, r1, [r2], #-0
[all...] |
| /external/capstone/tests/ |
| test_arm.c | 176 //#define ARM_CODE "\xd0\x00\xc2\xe1" // ldrd r0, r1, [r2]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| arm-tests.txt | 72 # CHECK: ldrd r4, r5, [r0, #0]!
|
| invalid-thumbv7.txt | 53 # Undefined encoding for ldrd
62 # A8.6.66 LDRD (immediate)
63 # if Rn = '1111' then SEE LDRD (literal)
64 # A8.6.67 LDRD (literal)
|
| thumb2.txt | 674 # LDRD(immediate)
676 # CHECK: ldrd r3, r5, [r6, #24]
677 # CHECK: ldrd r3, r5, [r6, #24]!
678 # CHECK: ldrd r3, r5, [r6], #4
679 # CHECK: ldrd r3, r5, [r6], #-8
680 # CHECK: ldrd r3, r5, [r6]
681 # CHECK: ldrd r8, r1, [r3]
682 # CHECK: ldrd r0, r1, [r2], #-0
683 # CHECK: ldrd r0, r1, [r2, #-0]!
684 # CHECK: ldrd r0, r1, [r2, #0]
[all...] |
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-arm-linux.S | 173 ldrd r4, r5, [r1, #0] // r4 = .guest, r5 = .host
|
| /external/libjpeg-turbo/simd/ |
| jsimd_arm_neon.S | 275 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 1 * 8))]
281 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 2 * 8))]
288 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 3 * 8))]
296 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 4 * 8))]
304 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 5 * 8))]
311 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 6 * 8))]
318 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 7 * 8))]
326 ldrd r4, [COEF_BLOCK, #(-96 + 2 * (4 + 0 * 8))]
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| maverick.c | 339 LDSTall (ldrd, 4, 1, 1, "d");
350 insns_LDSTall (ldrs), insns_LDSTall (ldrd),
|
| thumb32.d | 535 0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\]
536 0[0-9a-f]+ <[^>]+> e9d5 230c ldrd r2, r3, \[r5, #48\].*
537 0[0-9a-f]+ <[^>]+> e955 230c ldrd r2, r3, \[r5, #-48\].*
538 0[0-9a-f]+ <[^>]+> e95f 4504 ldrd r4, r5, \[pc, #-16\] ; 000005f0 <here>
[all...] |
| /bionic/libc/arch-arm/cortex-a15/bionic/ |
| string_copy.S | 175 ldrd r2, r3, [r1], #8
|
| /external/vixl/src/aarch32/ |
| constants-aarch32.cc | 160 return "ldrd";
|
| macro-assembler-aarch32.h | 617 void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
634 ldrd(cond, rt, rt2, literal);
637 void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
638 Ldrd(al, rt, rt2, literal);
776 // Generic Ldrd(rt, rt2, data)
777 void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
784 Ldrd(cond, rt, rt2, literal);
787 void Ldrd(Register rt, Register rt2, T v) {
788 Ldrd(al, rt, rt2, v);
[all...] |
| assembler-aarch32.cc | 5562 void Assembler::ldrd(Condition cond, function in class:vixl::aarch32::Assembler
5714 void Assembler::ldrd(Condition cond, function in class:vixl::aarch32::Assembler
[all...] |
| /prebuilts/vndk/v27/arm/arch-arm-armv7-a-neon/shared/vndk-core/ |
| libvixl-arm.so | |
| /prebuilts/vndk/v27/arm64/arch-arm-armv7-a-neon/shared/vndk-core/ |
| libvixl-arm.so | |
| /art/compiler/optimizing/ |
| intrinsics_arm_vixl.cc | [all...] |
| /external/llvm/docs/ |
| Atomics.rst | 212 ``LDRD`` on ARM without LPAE, or not naturally-aligned ``LDRD`` on LPAE ARM).
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| tables.go | 578 LDRD
[all...] |
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm/armasm/ |
| tables.go | 578 LDRD
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-thumb2-instructions.s | [all...] |
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| assembler_arm.h | 574 // ldrd and strd actually support the full range of addressing modes, but
577 void ldrd(Register rd, Register rn, int32_t offset, Condition cond = AL);
[all...] |
