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  /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/MC/
MCInstrDesc.h 496 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/MC/
MCInstrDesc.h 496 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/MC/
MCInstrDesc.h 496 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/MC/
MCInstrDesc.h 487 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/MC/
MCInstrDesc.h 487 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/MC/
MCInstrDesc.h 487 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/MC/
MCInstrDesc.h 496 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/MC/
MCInstrDesc.h 496 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/MC/
MCInstrDesc.h 496 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/MC/
MCInstrDesc.h 496 /// classes. e.g. ARM::LDRD's two def registers must be an even / odd pair,
  /toolchain/binutils/binutils-2.27/opcodes/
ChangeLog-2011 599 * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
  /external/v8/src/arm/
macro-assembler-arm.cc 885 void MacroAssembler::Ldrd(Register dst1, Register dst2,
894 // Generate two ldr instructions if ldrd is not applicable.
896 ldrd(dst1, dst2, src, cond);
    [all...]
disasm-arm.cc 534 Print("ldrd");
802 // ldrd, strd
    [all...]
assembler-arm.h     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp     [all...]
  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp     [all...]
ARMInstrInfo.td     [all...]
ARMInstrThumb2.td     [all...]
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMBaseInstrInfo.cpp     [all...]
ARMInstrInfo.td     [all...]
ARMInstrThumb2.td     [all...]
  /art/runtime/
thread.h     [all...]
  /external/libavc/common/arm/
ih264_deblk_luma_a9.s 94 ldrd r4, r5, [sp, #0x14] @r4 = ui_Bs , r5 = *puc_ClpTab
    [all...]
  /external/llvm/include/llvm/CodeGen/
MachineInstr.h 721 /// operand register classes. e.g. ARM::LDRD's two def registers must be an
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