| /external/llvm/test/CodeGen/PowerPC/ |
| hello-reloc.s | 28 la r3, lo16(L_.str-L0$pb)(r2)
47 lwzu r12, lo16(L_puts$lazy_ptr-L_puts$stub$tmp)(r11)
|
| /toolchain/binutils/binutils-2.27/cpu/ |
| lm32.cpu | 168 (name lo16)
173 (handlers (parse "lo16"))
578 "ori $r1,$r0,$lo16"
579 (+ OP_ORI r0 r1 lo16)
580 (set r1 (or r0 (zext SI lo16)))
776 "mvu $r1,$lo16"
777 (+ OP_ORI (f-r0 0) r1 lo16)
778 (set r1 (zext SI lo16))
|
| /toolchain/binutils/binutils-2.27/gas/doc/ |
| c-rl78.texi | 68 @item %lo16()
74 movw ax,#%lo16(_sym)
|
| c-tilepro.texi | 160 @item lo16
175 @code{lo16(N)} is negative it adds one to the @code{hi16(N)}
176 value. This way @code{lo16} and @code{ha16} can be added to create any
181 moveli r3, lo16(sym)
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinRegisterInfo.td | 19 def lo16 : SubRegIndex;
68 let SubRegIndices = [hi16, lo16];
226 let SubRegClasses = [(D16L lo16), (D16H hi16)];
230 let SubRegClasses = [(P16L lo16), (P16H hi16)];
234 let SubRegClasses = [(DP16L lo16), (DP16H hi16)];
|
| BlackfinInstrInfo.td | 54 def LO16 : SDNodeXForm<imm, [{
304 (EXTRACT_SUBREG (LOAD32p_8z P:$ptr), lo16)>;
306 (EXTRACT_SUBREG (LOAD32p_8z P:$ptr), lo16)>;
316 lo16)>;
319 lo16)>;
326 (EXTRACT_SUBREG (LOAD32p_8s P:$ptr), lo16)>;
334 lo16)>;
471 lo16), PI:$ptr)>;
480 lo16),
519 lo16)),
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| README.txt | 73 lfd f0, lo16(.CPI_X_0)(r2)
75 lfd f2, lo16(.CPI_X_1)(r2)
78 lfd f1, lo16(.CPI_X_2)(r2)
80 lfd f2, lo16(.CPI_X_3)(r2)
99 lfs f0, lo16(LCPI1_0)(r2)
102 lfs f2, lo16(LCPI1_2)(r3)
103 lfs f3, lo16(LCPI1_1)(r2)
191 la r2, lo16(_a)(r2)
200 lbz r2, lo16(_a+3)(r2)
363 lfs f0, lo16(.CPI_foo_0-"L00000$pb")(r2
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 273 // FIXME: This is a terrible hack because we can't encode lo16() as an operand
277 O << "lo16(";
290 // FIXME: This is a terrible hack because we can't encode lo16() as an operand
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 653 MachineInstrBuilder LO16, HI16;
658 LO16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::MOVi), DstReg);
667 LO16 = LO16.addImm(SOImmValV1);
669 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end());
[all...] |
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCExpr.cpp | 31 case VK_PPC_LO: OS << "lo16"; break;
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| lm32-opinst.c | 143 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
219 { INPUT, "lo16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (LO16), 0, 0 },
|
| lm32-opc.c | 385 /* ori $r1,$r0,$lo16 */
388 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (LO16), 0 } },
553 /* mvu $r1,$lo16 */
556 { { MNEM, ' ', OP (R1), ',', OP (LO16), 0 } },
|
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUOperands.td | 23 def LO16 : SDNodeXForm<imm, [{
136 }], LO16>;
149 def lo16 : PatLeaf<(imm), [{
150 // lo16 predicate - returns true if the immediate has all zeros in the
158 }], LO16>;
|
| /external/python/cpython2/Modules/_ctypes/libffi_osx/powerpc/ |
| ppc64-darwin_closure.S | 368 lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
389 lgu r12,lo16(L_ffi64_struct_to_reg_form$lazy_ptr - LO$ffi64_struct_to_reg_form)(r11)
405 lgu r12,lo16(L_ffi64_data_size$lazy_ptr - LO$ffi64_data_size)(r11)
|
| /external/python/cpython3/Modules/_ctypes/libffi_osx/powerpc/ |
| ppc64-darwin_closure.S | 368 lgu r12,lo16(L_ffi_closure_helper_DARWIN$lazy_ptr - LO$ffi_closure_helper_DARWIN)(r11)
389 lgu r12,lo16(L_ffi64_struct_to_reg_form$lazy_ptr - LO$ffi64_struct_to_reg_form)(r11)
405 lgu r12,lo16(L_ffi64_data_size$lazy_ptr - LO$ffi64_data_size)(r11)
|
| /external/libffi/src/m88k/ |
| ffi.c | 386 /* or %r10, %r10, %lo16(fn) */
390 /* or %r13, %r13, %lo16(closure) */
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/m88k/ |
| ffi.c | 386 /* or %r10, %r10, %lo16(fn) */
390 /* or %r13, %r13, %lo16(closure) */
|
| /external/python/cpython3/Modules/_ctypes/libffi/src/m88k/ |
| ffi.c | 386 /* or %r10, %r10, %lo16(fn) */
390 /* or %r13, %r13, %lo16(closure) */
|
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-arm-linux.S | 129 /* 4 = movw r12, lo16(disp_cp_chain_me_to_slowEP)
144 /* 4 = movw r12, lo16(disp_cp_chain_me_to_fastEP)
|
| /frameworks/compile/mclinker/lib/Target/Mips/ |
| MipsRelocationFunctions.h | 21 DECL_MIPS_APPLY_RELOC_FUNC(lo16) \
53 { &lo16, 6, "R_MIPS_LO16", 16}, \
|
| /toolchain/binutils/binutils-2.27/gas/config/ |
| tc-pj.c | 70 if (strncmp (input_line_pointer, "%lo16", 5) == 0)
144 turns ipush <foo> into sipush lo16<foo>, sethi hi16<foo>. */
|
| /external/valgrind/VEX/priv/ |
| host_arm_defs.c | 2938 UInt lo16 = imm32 & 0xFFFF; local
2999 UInt lo16 = imm32 & 0xFFFF; local
3022 UInt lo16 = imm32 & 0xFFFF; local
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCAsmPrinter.cpp | 519 OutStreamer.EmitRawText("\tldu r12,lo16(" + Twine(LazyPtr->getName()) +
522 OutStreamer.EmitRawText("\tlwzu r12,lo16(" + Twine(LazyPtr->getName()) +
556 OutStreamer.EmitRawText("\tldu r12,lo16(" + Twine(LazyPtr->getName()) +
559 OutStreamer.EmitRawText("\tlwzu r12,lo16(" + Twine(LazyPtr->getName()) +
|
| /toolchain/binutils/binutils-2.27/gas/ |
| write.h | 57 BFD_RELOC_{LO16,HI16,HI16_S} relocations.
|
