| /external/llvm/test/MC/ARM/ |
| macho-relocs-with-addend.s | 28 @ CHECK-NEXT: Section __text {
29 @ CHECK-NEXT: 0x14 1 2 n/a ARM_RELOC_BR24 1 0x18
30 @ CHECK-NEXT: 0x10 1 2 n/a ARM_RELOC_BR24 1 0x18
31 @ CHECK-NEXT: 0xC 1 2 n/a ARM_RELOC_BR24 1 0x18
32 @ CHECK-NEXT: 0x8 1 2 n/a ARM_RELOC_BR24 1 0x18
33 @ CHECK-NEXT: 0x4 1 2 n/a ARM_THUMB_RELOC_BR22 1 0x18
34 @ CHECK-NEXT: 0x0 1 2 n/a ARM_THUMB_RELOC_BR22 1 0x18
|
| /external/llvm/test/MC/ELF/ |
| relax-arith3.s | 8 // CHECK-NEXT: imul:
9 // CHECK-NEXT: 0: 66 69 1d 00 00 00 00 00 00 imulw $0, (%rip), %bx
10 // CHECK-NEXT: 9: 69 1d 00 00 00 00 00 00 00 00 imull $0, (%rip), %ebx
11 // CHECK-NEXT: 13: 48 69 1d 00 00 00 00 00 00 00 00 imulq $0, (%rip), %rbx
19 // CHECK-NEXT: and:
20 // CHECK-NEXT: 0: 66 81 25 00 00 00 00 00 00 andw $0, (%rip)
21 // CHECK-NEXT: 9: 81 25 00 00 00 00 00 00 00 00 andl $0, (%rip)
22 // CHECK-NEXT: 13: 48 81 25 00 00 00 00 00 00 00 00 andq $0, (%rip)
29 // CHECK-NEXT: or:
30 // CHECK-NEXT: 0: 66 81 0d 00 00 00 00 00 00 orw $0, (%rip
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| or.ll | 8 ; CHECK-NEXT: ret i32 %A
16 ; CHECK-NEXT: ret i32 -1
24 ; CHECK-NEXT: ret i8 -1
32 ; CHECK-NEXT: ret i1 %A
40 ; CHECK-NEXT: ret i1 true
48 ; CHECK-NEXT: ret i1 %A
56 ; CHECK-NEXT: ret i32 %A
65 ; CHECK-NEXT: ret i32 -1
74 ; CHECK-NEXT: ret i8 -1
84 ; CHECK-NEXT: ret i8 -
[all...] |
| /external/llvm/test/Transforms/LowerAtomic/ |
| atomic-swap.ll | 9 ; CHECK-NEXT: [[SAME:%[a-z0-9]+]] = icmp eq i8 [[OLDVAL]], 0
10 ; CHECK-NEXT: [[TO_STORE:%[a-z0-9]+]] = select i1 [[SAME]], i8 42, i8 [[OLDVAL]]
11 ; CHECK-NEXT: store i8 [[TO_STORE]], i8* [[ADDR]]
12 ; CHECK-NEXT: [[TMP:%[a-z0-9]+]] = insertvalue { i8, i1 } undef, i8 [[OLDVAL]], 0
13 ; CHECK-NEXT: [[RES:%[a-z0-9]+]] = insertvalue { i8, i1 } [[TMP]], i1 [[SAME]], 1
14 ; CHECK-NEXT: [[VAL:%[a-z0-9]+]] = extractvalue { i8, i1 } [[RES]], 0
25 ; CHECK-NEXT: store
|
| /external/llvm/test/Transforms/MemCpyOpt/ |
| callslot_throw.ll | 12 ; CHECK-NEXT: call void @may_throw(i32* {{.*}} %[[t]])
13 ; CHECK-NEXT: %[[load:.*]] = load i32, i32* %[[t]], align 4
14 ; CHECK-NEXT: store i32 %[[load]], i32* %x, align 4
29 ; CHECK-NEXT: call void @may_throw(i32* {{.*}} %[[t]])
30 ; CHECK-NEXT: %[[load:.*]] = load i32, i32* %[[t]], align 4
31 ; CHECK-NEXT: call void @always_throws()
32 ; CHECK-NEXT: store i32 %[[load]], i32* %x, align 4
|
| /external/llvm/test/Transforms/Reassociate/ |
| mulfactor.ll | 6 ; CHECK-NEXT: mul i32 %a, 2
7 ; CHECK-NEXT: add
8 ; CHECK-NEXT: mul
9 ; CHECK-NEXT: add
10 ; CHECK-NEXT: ret
25 ; CHECK-NEXT: add
26 ; CHECK-NEXT: ret
40 ; CHECK-NEXT: mul
41 ; CHECK-NEXT: mul
42 ; CHECK-NEXT: re
[all...] |
| negation.ll | 7 ; CHECK-NEXT: %e = mul i32 %a, 12345
8 ; CHECK-NEXT: %f = mul i32 %e, %b
9 ; CHECK-NEXT: %g = mul i32 %f, %z
10 ; CHECK-NEXT: ret i32 %g
22 ; CHECK-NEXT: %e = mul i32 %a, 40
23 ; CHECK-NEXT: %f = mul i32 %e, %z
24 ; CHECK-NEXT: ret i32 %f
|
| otherops.ll | 7 ; CHECK-NEXT: %tmp2 = mul i32 %arg, 144
8 ; CHECK-NEXT: ret i32 %tmp2
17 ; CHECK-NEXT: %tmp2 = and i32 %arg, 14
18 ; CHECK-NEXT: ret i32 %tmp2
27 ; CHECK-NEXT: %tmp2 = or i32 %arg, 14
28 ; CHECK-NEXT: ret i32 %tmp2
37 ; CHECK-NEXT: ret i32 %arg
|
| /external/llvm/test/Verifier/ |
| alias.ll | 7 ; CHECK-NEXT: @fa
12 ; CHECK-NEXT: @ga
19 ; CHECK-NEXT: @fa2
24 ; CHECK-NEXT: i32* @test2_a
25 ; CHECK-NEXT: Aliases cannot form a cycle
26 ; CHECK-NEXT: i32* @test2_b
33 ; CHECK-NEXT: i32* @test3_c
|
| /external/llvm/test/tools/gold/X86/ |
| type-merge2.ll | 16 ; CHECK-NEXT: %zed.0 = type { i16 }
19 ; CHECK-NEXT: call void bitcast (void (%zed.0*)* @bar to void (%zed*)*)(%zed* null)
20 ; CHECK-NEXT: ret void
21 ; CHECK-NEXT: }
24 ; CHECK-NEXT: store %zed.0* %this, %zed.0** null
25 ; CHECK-NEXT: ret void
26 ; CHECK-NEXT: }
|
| visibility.ll | 11 ; CHECK-NEXT: Value:
12 ; CHECK-NEXT: Size:
13 ; CHECK-NEXT: Binding: Global
14 ; CHECK-NEXT: Type: Function
15 ; CHECK-NEXT: Other [
16 ; CHECK-NEXT: STV_PROTECTED
17 ; CHECK-NEXT: ]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| no-cfi.ll | 6 ; STATIC-NEXT: .long __gxx_personality_v0
7 ; STATIC-NEXT: .byte 3
8 ; STATIC-NEXT: .byte 3
12 ; PIC-NEXT: .L
13 ; PIC-NEXT: .long DW.ref.__gxx_personality_v0-.L
14 ; PIC-NEXT: .byte 27
15 ; PIC-NEXT: .byte 27
|
| /external/swiftshader/third_party/subzero/tests_lit/reader_tests/ |
| alloca.ll | 16 ; CHECK-NEXT: %array = alloca i8, i32 1
17 ; CHECK-NEXT: ret i32 %array
27 ; CHECK-NEXT: %array = alloca i8, i32 2
28 ; CHECK-NEXT: ret i32 %array
38 ; CHECK-NEXT: %array = alloca i8, i32 3
39 ; CHECK-NEXT: ret i32 %array
49 ; CHECK-NEXT: %array = alloca i8, i32 4
50 ; CHECK-NEXT: ret i32 %array
60 ; CHECK-NEXT: %array = alloca i8, i32 4, align 1
61 ; CHECK-NEXT: ret i32 %arra
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| avx-vperm2x128.ll | 8 ; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
9 ; ALL-NEXT: retq
18 ; ALL-NEXT: vperm2f128 {{.*#+}} ymm0 = mem[2,3,0,1]
19 ; ALL-NEXT: retq
30 ; ALL-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
31 ; ALL-NEXT: retq
40 ; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm0, %ymm0
41 ; AVX1-NEXT: retq
45 ; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,1,0,1]
46 ; AVX2-NEXT: ret
[all...] |
| bswap-vector.ll | 17 ; CHECK-NOSSSE3-NEXT: pxor %xmm1, %xmm1
18 ; CHECK-NOSSSE3-NEXT: movdqa %xmm0, %xmm2
19 ; CHECK-NOSSSE3-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15]
20 ; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[1,0,3,2,4,5,6,7]
21 ; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,4,7,6]
22 ; CHECK-NOSSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
23 ; CHECK-NOSSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]
24 ; CHECK-NOSSSE3-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]
25 ; CHECK-NOSSSE3-NEXT: packuswb %xmm2, %xmm0
26 ; CHECK-NOSSSE3-NEXT: ret
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| aarch64-be-bv.ll | 8 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1
9 ; CHECK-NEXT: add v[[REG1]].8h, v[[REG1]].8h, v[[REG2]].8h
10 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
20 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #8
21 ; CHECK-NEXT: add v[[REG1]].8h, v[[REG1]].8h, v[[REG2]].8h
22 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
32 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #16
33 ; CHECK-NEXT: add v[[REG1]].8h, v[[REG1]].8h, v[[REG2]].8h
34 ; CHECK-NEXT: umov w{{[0-9]+}}, v[[REG1]].h[0]
44 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #2
[all...] |
| arm64-collect-loh.ll | 61 ; CHECK-NEXT: adrp [[ADRP_REG:x[0-9]+]], _C@GOTPAGE
62 ; CHECK-NEXT: [[LDRGOT_LABEL:Lloh[0-9]+]]:
63 ; CHECK-NEXT: ldr [[LDRGOT_REG:x[0-9]+]], {{\[}}[[ADRP_REG]], _C@GOTPAGEOFF]
64 ; CHECK-NEXT: [[LDR_LABEL:Lloh[0-9]+]]:
65 ; CHECK-NEXT: ldr w0, {{\[}}[[LDRGOT_REG]]]
66 ; CHECK-NEXT: ret
77 ; CHECK-NEXT: adrp [[ADRP_REG:x[0-9]+]], _C@GOTPAGE
78 ; CHECK-NEXT: [[LDRGOT_LABEL:Lloh[0-9]+]]:
79 ; CHECK-NEXT: ldr [[LDRGOT_REG:x[0-9]+]], {{\[}}[[ADRP_REG]], _C@GOTPAGEOFF]
80 ; CHECK-NEXT: [[LDR_LABEL:Lloh[0-9]+]]
[all...] |
| arm64-tls-dynamics.ll | 15 ; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var]
16 ; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var
17 ; CHECK-NEXT: .tlsdesccall general_dynamic_var
18 ; CHECK-NEXT: blr [[CALLEE]]
21 ; CHECK-NOLD-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var]
22 ; CHECK-NOLD-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var
23 ; CHECK-NOLD-NEXT: .tlsdesccall general_dynamic_var
24 ; CHECK-NOLD-NEXT: blr [[CALLEE]]
50 ; CHECK-NEXT: ldr [[CALLEE:x[0-9]+]], [x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_var]
51 ; CHECK-NEXT: add x0, x[[TLSDESC_HI]], :tlsdesc_lo12:general_dynamic_va
[all...] |
| /external/llvm/test/Analysis/LoopAccessAnalysis/ |
| number-of-memchecks.ll | 16 ; CHECK-NEXT: Check 0:
84 ; CHECK-NEXT: Check 0:
85 ; CHECK-NEXT: Comparing group ([[ZERO:.+]]):
86 ; CHECK-NEXT: %arrayidxC1 = getelementptr inbounds i16, i16* %c, i64 %store_ind_inc
87 ; CHECK-NEXT: %arrayidxC = getelementptr inbounds i16, i16* %c, i64 %store_ind
88 ; CHECK-NEXT: Against group ([[ONE:.+]]):
89 ; CHECK-NEXT: %arrayidxA1 = getelementptr inbounds i16, i16* %a, i64 %add
90 ; CHECK-NEXT: %arrayidxA = getelementptr inbounds i16, i16* %a, i64 %ind
91 ; CHECK-NEXT: Check 1:
92 ; CHECK-NEXT: Comparing group ({{.*}}[[ZERO]])
[all...] |
| /libcore/json/src/test/java/libcore/org/json/ |
| JSONTokenerTest.java | 42 new JSONTokener(null).next();
48 new JSONTokener(null).next(3);
54 new JSONTokener(null).next('A');
112 assertEquals('\0', new JSONTokener("").next());
114 new JSONTokener("").next(3);
119 new JSONTokener("").next('A');
145 assertEquals('A', abcdeTokener.next());
146 assertEquals('B', abcdeTokener.next('B'));
147 assertEquals("CD", abcdeTokener.next(2));
149 abcdeTokener.next(2)
[all...] |
| /dalvik/dx/src/com/android/multidex/ |
| ArchivePathElement.java | 67 ZipEntry next = null;
71 while (next == null && delegate.hasMoreElements()) {
72 next = delegate.nextElement();
73 if (next.isDirectory()) {
74 next = null;
77 return next != null;
81 public String next() { method
83 String name = next.getName();
84 next = null;
|
| /external/clang/test/CodeGenCXX/ |
| new-array-init-exceptions.cpp | 13 // CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD:[^ ]+]]
15 // CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD]]
17 // CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD]]
19 // CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD]]
22 // CHECK-NEXT: landingpad
31 // CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD2:[^ ]+]]
33 // CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD2]]
35 // CHECK-NEXT: to label %{{[^ ]+}} unwind label %[[LPAD2]]
38 // CHECK-NEXT: landingpad
|
| /external/clang/test/CodeGenObjC/ |
| arc-i386.m | 10 // CHECK-NEXT: ret i8* [[T0]]
18 // CHECK-NEXT: call void asm sideeffect "mov
19 // CHECK-NEXT: [[T1:%.*]] = call i8* @objc_retainAutoreleasedReturnValue(i8* [[T0]])
20 // CHECK-NEXT: store i8* [[T1]],
21 // CHECK-NEXT: call void @objc_storeStrong(
22 // CHECK-NEXT: ret void
32 // CHECK-NEXT: ret [[A]]* [[T0]]
40 // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8*
41 // CHECK-NEXT: ret i8* [[T1]]
|
| /external/libusb-compat/libusb/ |
| usbi.h | 28 ent->next = begin; \
29 ent->next->prev = ent; \
31 ent->next = NULL; \
39 ent->prev->next = ent->next; \
41 begin = ent->next; \
42 if (ent->next) \
43 ent->next->prev = ent->prev; \
45 ent->next = NULL; \
|
| /external/llvm/test/Bitcode/ |
| mdnodes-in-post-order.ll | 14 ; CHECK-NEXT: 'leaf
15 ; CHECK-NEXT: 'leaf
16 ; CHECK-NEXT: }
19 ; CHECK-NEXT: <NODE op0=1/>
20 ; CHECK-NEXT: <NODE op0=2/>
24 ; CHECK-NEXT: <NODE op0=3 op1=4/>
27 ; CHECK-NEXT: <NODE op0=3 op1=5 op2=4/>
32 ; CHECK-NEXT: <NAME
33 ; CHECK-NEXT: <NAMED_NODE op0=5/>
|
