| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/Target/ |
| TargetSelectionDAG.td | 387 def rotl : SDNode<"ISD::ROTL" , SDTIntShiftOp>;
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/Target/ |
| TargetSelectionDAG.td | 387 def rotl : SDNode<"ISD::ROTL" , SDTIntShiftOp>;
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/Target/ |
| TargetSelectionDAG.td | 387 def rotl : SDNode<"ISD::ROTL" , SDTIntShiftOp>;
[all...] |
| /toolchain/binutils/binutils-2.27/cpu/ |
| sh64-compact.cpu | [all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/tic6x/ |
| insns-c674x.d | [all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| sh-opc.h | 698 /* 0100nnnn00000100 rotl <REG_N> */{"rotl",{A_REG_N},{HEX_4,REG_N,HEX_0,HEX_4}, arch_sh_up},
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 318 // The hardware supports 32-bit ROTR, but not ROTL.
319 setOperationAction(ISD::ROTL, MVT::i32, Expand);
320 setOperationAction(ISD::ROTL, MVT::i64, Expand);
374 setOperationAction(ISD::ROTL, VT, Expand);
[all...] |
| /external/mmc-utils/3rdparty/hmac_sha/ |
| sha2.c | 48 #define ROTL(x, n) ((x << n) | (x >> ((sizeof(x) << 3) - n)))
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstr64Bit.td | [all...] |
| PPCISelDAGToDAG.cpp | 496 } else if (Opcode == ISD::ROTL) {
921 case ISD::ROTL:
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Support/ |
| APInt.cpp | [all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | [all...] |
| LegalizeVectorOps.cpp | 282 case ISD::ROTL:
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 331 // At present ROTL isn't matched by DAGCombiner. ROTR should be
332 // converted into ROTL.
333 setOperationAction(ISD::ROTL, VT, Expand);
446 setTargetDAGCombine(ISD::ROTL);
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 339 SHL, SRA, SRL, ROTL, ROTR,
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| ISDOpcodes.h | 317 SHL, SRA, SRL, ROTL, ROTR,
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| Target.td | 191 // (rotl GPR, 1) - Rotate N places to the left.
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 94 setOperationAction(ISD::ROTL , MVT::i64, Expand);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86GenFastISel.inc | [all...] |
| /prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 357 SHL, SRA, SRL, ROTL, ROTR,
[all...] |
| /prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 357 SHL, SRA, SRL, ROTL, ROTR,
[all...] |
| /external/llvm/include/llvm/ADT/ |
| APInt.h | 885 APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotl(unsigned rotateAmt) const;
906 APInt LLVM_ATTRIBUTE_UNUSED_RESULT rotl(const APInt &rotateAmt) const;
[all...] |
| /external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
| APInt.h | 861 APInt rotl(unsigned rotateAmt) const;
882 APInt rotl(const APInt &rotateAmt) const;
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/ADT/ |
| APInt.h | 974 APInt rotl(unsigned rotateAmt) const;
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/ADT/ |
| APInt.h | 974 APInt rotl(unsigned rotateAmt) const;
[all...] |
