| /external/capstone/include/ |
| arm.h | 60 // SPSR* registers can be OR combined
|
| /device/linaro/bootloader/arm-trusted-firmware/docs/ |
| psci-lib-integration-guide.rst | 113 #. The PSCI library provides appropriate LR and SPSR values (entrypoint
119 registers: R0 - R3, LR (R14), SCR, SPSR, SCTLR.
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| porting-guide.rst | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMRegisterInfo.td | 166 def SPSR : ARMReg<2, "spsr">;
|
| ARMISelDAGToDAG.cpp | [all...] |
| /device/linaro/bootloader/arm-trusted-firmware/bl32/sp_min/aarch32/ |
| entrypoint.S | 307 * to the mode restored to SPSR.
|
| /device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch32/ |
| arch.h | 233 /* SPSR/CPSR definitions */
|
| /device/linaro/bootloader/arm-trusted-firmware/include/lib/aarch64/ |
| arch.h | 279 /* CPSR/SPSR definitions */
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey/ |
| hikey_bl1_setup.c | 589 ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
|
| /device/linaro/bootloader/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| hikey960_bl1_setup.c | 730 ep_info->spsr = SPSR_64(MODE_EL1, MODE_SP_ELX,
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| DebugSupport.h | 606 UINT64 SPSR; // Saved Processor Status Register
|
| /device/linaro/bootloader/edk2/OvmfPkg/Include/IndustryStandard/Xen/arch-arm/ |
| xen.h | 321 /* PSR bits (CPSR, SPSR)*/
|
| /external/libunwind_llvm/include/ |
| libunwind.h | 478 // 128-133 -- SPSR, SPSR_{FIQ|IRQ|ABT|UND|SVC}
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 943 O << "SPSR";
995 llvm_unreachable("Invalid banked SPSR register");
999 assert(!R && "should have dealt with SPSR regs");
[all...] |
| /external/elfutils/tests/ |
| run-readelf-mixed-corenote.sh | 39 pc: 0x00008500 spsr: 0x60000010
|
| /prebuilts/vndk/v27/x86/arch-x86-x86/shared/vndk-core/ |
| libvixl-arm.so | |
| /prebuilts/vndk/v27/x86_64/arch-x86-x86_64/shared/vndk-core/ |
| libvixl-arm.so | |
| /system/core/libpixelflinger/codeflinger/ |
| disassem.c | 456 di->di_printf("spsr");
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| msr-imm-bad.l | 71 [^:]*:85: Error: Thumb encoding does not support an immediate here -- `msr SPSR,#0xc0000004'
|
| msr-reg-bad.l | 70 [^:]*:83: Error: selected processor does not support requested special purpose register -- `msr SPSR,r9'
|
| thumb32.s | 470 mrs r0, SPSR
|
| /toolchain/binutils/binutils-2.27/include/opcode/ |
| m68hc11.h | 191 /* Flags of the SPSR register. */
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 671 O << "SPSR";
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
| /external/vixl/src/aarch32/ |
| instructions-aarch32.h | 768 enum SpecialRegisterType { APSR = 0, CPSR = 0, SPSR = 1 };
[all...] |
