/art/compiler/utils/ |
jni_macro_assembler.h | 133 ManagedRegister src_base, 145 FrameOffset src_base,
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/art/compiler/utils/x86/ |
jni_macro_assembler_x86.cc | 364 ManagedRegister /*src_base*/, 383 FrameOffset src_base, 389 __ movl(scratch, Address(ESP, src_base));
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/external/tensorflow/tensorflow/compiler/xla/ |
util.h | 188 // source and destination. The source starting index is src_base, while the 193 int64 src_base, int64 src_stride, int64 count) { 194 for (; count > 0; --count, dest_base += dest_stride, src_base += src_stride) { 195 dest[dest_base] = static_cast<D>(src[src_base]);
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literal_util.h | 250 // Copies the values from src_literal, starting at src_base shape indexes, 254 // src_base+copy_size must fit the source literal dimensions, as well as 261 tensorflow::gtl::ArraySlice<int64> src_base, 630 tensorflow::gtl::ArraySlice<int64> src_base, [all...] |
literal_util_test.cc | 856 const int64 src_base[] = {3, 1, 5, 7}; local 859 TF_EXPECT_OK(blank->CopySliceFrom(*source, src_base, dest_base, copy_size)); 866 std::transform(source_indexes.begin(), source_indexes.end(), src_base, [all...] |
/art/compiler/optimizing/ |
intrinsics_x86_64.cc | 1037 CpuRegister src_base = locations->GetTemp(0).AsRegister<CpuRegister>(); local [all...] |
intrinsics_arm64.cc | [all...] |
intrinsics_mips.cc | 3066 Register src_base = locations->GetTemp(1).AsRegister<Register>(); local [all...] |
intrinsics_mips64.cc | 2168 GpuRegister src_base = locations->GetTemp(1).AsRegister<GpuRegister>(); local [all...] |
intrinsics_x86.cc | 1257 Register src_base = locations->GetTemp(0).AsRegister<Register>(); local [all...] |
/external/mesa3d/src/compiler/glsl/ |
ast_function.cpp | [all...] |
/prebuilts/go/darwin-x86/src/crypto/aes/ |
asm_s390x.s | 127 MOVD src_base+56(FP), R6 // src
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gcm_amd64.s | 553 MOVQ src_base+32(FP), ptx 1036 MOVQ src_base+32(FP), ctx
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/prebuilts/go/linux-x86/src/crypto/aes/ |
asm_s390x.s | 127 MOVD src_base+56(FP), R6 // src
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gcm_amd64.s | 553 MOVQ src_base+32(FP), ptx 1036 MOVQ src_base+32(FP), ctx
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/art/compiler/utils/arm64/ |
jni_macro_assembler_arm64.cc | 406 ManagedRegister src_base, 411 Arm64ManagedRegister base = src_base.AsArm64(); 450 FrameOffset /*src_base*/, [all...] |
/art/compiler/utils/x86_64/ |
jni_macro_assembler_x86_64.cc | 415 ManagedRegister /*src_base*/, 434 FrameOffset src_base, 440 __ movq(scratch, Address(CpuRegister(RSP), src_base));
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/art/compiler/utils/arm/ |
jni_macro_assembler_arm_vixl.cc | 429 ManagedRegister src_base ATTRIBUTE_UNUSED, 445 FrameOffset src_base ATTRIBUTE_UNUSED,
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/hardware/qcom/media/msm8974/mm-video-legacy/vidc/venc/inc/ |
omx_video_base.h | 172 bool convert(int src_fd, void *src_base, void *src_viraddr,
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/hardware/qcom/media/msm8974/mm-video-v4l2/vidc/venc/inc/ |
omx_video_base.h | 176 bool convert(int src_fd, void *src_base, void *src_viraddr,
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/hardware/qcom/media/msm8996/mm-video-v4l2/vidc/venc/inc/ |
omx_video_base.h | 181 bool convert(int src_fd, void *src_base, void *src_viraddr,
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/hardware/qcom/media/msm8998/mm-video-v4l2/vidc/venc/inc/ |
omx_video_base.h | 193 bool convert(int src_fd, void *src_base, void *src_viraddr,
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/art/compiler/utils/mips/ |
assembler_mips.h | 354 void ShiftAndAdd(Register dst, Register src_idx, Register src_base, int shamt, Register tmp = AT); [all...] |
assembler_mips.cc | 703 Register src_base, 707 CHECK_NE(src_base, tmp); 710 Addu(dst, src_base, src_idx); 712 Lsa(dst, src_idx, src_base, shamt); 715 Addu(dst, src_base, tmp); [all...] |
/art/compiler/utils/mips64/ |
assembler_mips64.h | [all...] |