| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPURegisterInfo.td | 182 def VECREG : RegisterClass<"SPU", [v16i8,v8i16,v4i32,v4f32,v2i64,v2f64], 128,
|
| SPUISelLowering.cpp | 397 addRegisterClass(MVT::v2i64, SPU::VECREGRegisterClass);
[all...] |
| /prebuilts/clang/host/darwin-x86/clang-4393122/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4479392/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4579689/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4630689/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4639204/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/darwin-x86/clang-4691093/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/linux-x86/clang-4393122/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/linux-x86/clang-4479392/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/linux-x86/clang-4579689/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/linux-x86/clang-4630689/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/linux-x86/clang-4639204/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /prebuilts/clang/host/linux-x86/clang-4691093/include/llvm/CodeGen/ |
| ValueTypes.td | 74 def v2i64 : ValueType<128, 48>; // 2 x i64 vector value
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 98 addQRTypeForNEON(MVT::v2i64);
572 setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Custom);
573 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Custom);
580 setOperationAction(ISD::CTLZ, MVT::v2i64, Expand);
589 setOperationAction(ISD::CTTZ, MVT::v2i64, Expand);
592 setOperationAction(ISD::MUL, MVT::v2i64, Expand);
596 setOperationAction(ISD::MUL, MVT::v2i64, Custom);
643 AddPromotedToType(ISD::LOAD, VT, MVT::v2i64);
646 AddPromotedToType(ISD::STORE, VT, MVT::v2i64);
698 if (!VT.isFloatingPoint() && VT != MVT::v2i64 && VT != MVT::v1i64
[all...] |
| /external/clang/test/CodeGen/ |
| builtins-nvptx.c | 366 // CHECK: call <2 x i64> @llvm.nvvm.ldg.global.i.v2i64.p0v2i64(<2 x i64>* {{%[0-9]+}}, i32 16)
367 // CHECK: call <2 x i64> @llvm.nvvm.ldg.global.i.v2i64.p0v2i64(<2 x i64>* {{%[0-9]+}}, i32 16)
|
| /external/llvm/test/Transforms/InstCombine/ |
| x86-masked-memops.ll | 112 ; CHECK-NEXT: %1 = call <2 x i64> @llvm.masked.load.v2i64.p0v2i64(<2 x i64>* %castvec, i32 1, <2 x i1> <i1 true, i1 false>, <2 x i64> zeroinitializer)
246 ; CHECK-NEXT: call void @llvm.masked.store.v2i64.p0v2i64(<2 x i64> %v, <2 x i64>* %castvec, i32 1, <2 x i1> <i1 true, i1 false>)
|
| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 106 case MVT::v2i64: return "MVT::v2i64";
|
| /external/swiftshader/third_party/LLVM/utils/TableGen/ |
| CodeGenTarget.cpp | 82 case MVT::v2i64: return "MVT::v2i64";
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 108 addRegisterClass(MVT::v2i64, &SystemZ::VR128BitRegClass);
309 if (VT != MVT::v2i64)
345 setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal);
346 setOperationAction(ISD::FP_TO_UINT, MVT::v2i64, Legal);
347 setOperationAction(ISD::SINT_TO_FP, MVT::v2i64, Legal);
348 setOperationAction(ISD::UINT_TO_FP, MVT::v2i64, Legal);
828 Value = DAG.getBuildVector(MVT::v2i64, DL, {Value, DAG.getUNDEF(MVT::i64)});
[all...] |
| /prebuilts/vndk/v27/x86/arch-x86-x86/shared/vndk-sp/ |
| libbcinfo.so | |
| /prebuilts/vndk/v27/x86_64/arch-x86-x86_64/shared/vndk-sp/ |
| libbcinfo.so | |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 90 addMSAIntType(MVT::v2i64, &Mips::MSA128DRegClass);
278 if (Ty == MVT::v4i32 || Ty == MVT::v2i64) {
[all...] |
| /external/swiftshader/third_party/llvm-subzero/build/Android/include/llvm/IR/ |
| Intrinsics.gen | [all...] |
| /external/swiftshader/third_party/llvm-subzero/build/Linux/include/llvm/IR/ |
| Intrinsics.gen | [all...] |
