| /external/vixl/test/aarch32/config/ |
| cond-rd-rn-operand-const-t32.json | 1 // Copyright 2016, VIXL authors
|
| cond-rd-rn-operand-imm12-t32.json | 1 // Copyright 2016, VIXL authors
|
| cond-rd-rn-operand-rm-ror-amount-a32.json | 1 // Copyright 2016, VIXL authors
|
| cond-rd-rn-operand-rm-ror-amount-t32.json | 1 // Copyright 2016, VIXL authors
|
| cond-rd-rn-t32.json | 1 // Copyright 2016, VIXL authors
|
| cond-rdlow-rnlow-rmlow-t32.json | 1 // Copyright 2016, VIXL authors
|
| rd-rn-rm.json | 1 // Copyright 2016, VIXL authors
|
| /external/vixl/test/aarch64/traces/ |
| sim-abs-2d-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-abs-2s-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-abs-4h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-abs-4s-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-abs-d-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-addp-scalar-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-addv-s-4s-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cls-2s-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cls-4h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cls-4s-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-clz-2s-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-clz-4h-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-clz-4s-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cmeq-2d-2opimm-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cmeq-2s-2opimm-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cmeq-4h-2opimm-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cmeq-4s-2opimm-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
| sim-cmeq-d-2opimm-trace-aarch64.h | 1 // Copyright 2015, VIXL authors
|
