| /external/capstone/bindings/java/capstone/ |
| Ppc.java | 44 public static class Operand extends Structure {
73 public Operand [] op;
76 op = new Operand[8];
84 op = new Operand[op_count];
100 public Operand [] op;
|
| Sparc.java | 33 public static class Operand extends Structure {
59 public Operand [] op;
62 op = new Operand[4];
69 op = new Operand[op_count];
84 public Operand [] op;
|
| Systemz.java | 34 public static class Operand extends Structure {
61 public Operand [] op;
64 op = new Operand[6];
70 op = new Operand[op_count];
84 public Operand [] op;
|
| Xcore.java | 34 public static class Operand extends Structure {
57 public Operand [] op;
60 op = new Operand[8];
65 op = new Operand[op_count];
77 public Operand [] op;
|
| Arm64.java | 53 public static class Operand extends Structure {
92 public Operand [] op;
95 op = new Operand[8];
103 op = new Operand[op_count];
118 public Operand [] op = null;
|
| /external/v8/src/x64/ |
| assembler-x64.h | 369 class Operand BASE_EMBEDDED {
372 Operand(Register base, int32_t disp);
375 Operand(Register base,
381 Operand(Register index,
385 // Offset from existing memory operand.
388 Operand(const Operand& base, int32_t offset);
391 explicit Operand(Label* label);
394 // Does not check the "reg" part of the Operand.
418 // Adds operand displacement fields (offsets added to the memory address)
[all...] |
| deoptimizer-x64.cc | 125 __ Movsd(Operand(rsp, offset), xmm_reg);
146 __ movp(arg_reg_3, Operand(rsp, kSavedRegistersAreaSize));
150 __ movp(arg_reg_4, Operand(rsp, kSavedRegistersAreaSize + 1 * kRegisterSize));
151 __ leap(arg5, Operand(rsp, kSavedRegistersAreaSize + 1 * kRegisterSize +
161 __ movp(rdi, Operand(rbp, CommonFrameConstants::kContextOrFrameTypeOffset));
163 __ movp(rax, Operand(rbp, JavaScriptFrameConstants::kFunctionOffset));
172 __ movq(Operand(rsp, 4 * kRegisterSize), arg5);
174 __ movq(Operand(rsp, 5 * kRegisterSize), arg5);
185 __ movp(rbx, Operand(rax, Deoptimizer::input_offset()));
190 __ PopQuad(Operand(rbx, offset))
[all...] |
| /external/v8/src/ia32/ |
| deoptimizer-ia32.cc | 204 __ movsd(Operand(esp, offset), xmm_reg);
210 __ mov(Operand::StaticVariable(c_entry_fp_address), ebp);
216 __ mov(ebx, Operand(esp, kSavedRegistersAreaSize));
220 __ mov(ecx, Operand(esp, kSavedRegistersAreaSize + 1 * kPointerSize));
221 __ lea(edx, Operand(esp, kSavedRegistersAreaSize + 2 * kPointerSize));
230 __ mov(edi, Operand(ebp, CommonFrameConstants::kContextOrFrameTypeOffset));
232 __ mov(eax, Operand(ebp, JavaScriptFrameConstants::kFunctionOffset));
234 __ mov(Operand(esp, 0 * kPointerSize), eax); // Function.
235 __ mov(Operand(esp, 1 * kPointerSize), Immediate(type())); // Bailout type.
236 __ mov(Operand(esp, 2 * kPointerSize), ebx); // Bailout id
[all...] |
| codegen-ia32.cc | 49 __ movsd(xmm0, Operand(esp, 1 * kPointerSize));
51 __ movsd(Operand(esp, 1 * kPointerSize), xmm0);
53 __ fld_d(Operand(esp, 1 * kPointerSize));
93 __ movdq(alignment == MOVE_ALIGNED, xmm0, Operand(src, 0x00));
94 __ movdq(alignment == MOVE_ALIGNED, xmm1, Operand(src, 0x10));
95 __ movdq(alignment == MOVE_ALIGNED, xmm2, Operand(src, 0x20));
96 __ movdq(alignment == MOVE_ALIGNED, xmm3, Operand(src, 0x30));
99 __ movdqa(Operand(dst, 0x00), xmm0);
100 __ movdqa(Operand(dst, 0x10), xmm1);
101 __ movdqa(Operand(dst, 0x20), xmm2)
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceTargetLoweringX86Base.h | 47 /// Operand *createNaClReadTPSrcOperand()
217 typename std::enable_if<!T::Is64Bit, Operand>::type *
218 loOperand(Operand *Operand);
220 typename std::enable_if<T::Is64Bit, Operand>::type *loOperand(Operand *) {
226 typename std::enable_if<!T::Is64Bit, Operand>::type *
227 hiOperand(Operand *Operand);
229 typename std::enable_if<T::Is64Bit, Operand>::type *hiOperand(Operand *)
[all...] |
| IceAssemblerARM32.cpp | 244 // Defines layouts of an operand representing a (register) memory address,
265 // The way an operand is encoded into a sequence of bits in functions
278 // EncodedAsImmRegOffset is a memory operand that can take three forms, based
349 // Defines the set of registers expected in an operand.
352 EncodedOperand encodeOperand(const Operand *Opnd, IValueT &Value,
388 Operand *Amt = FlexReg->getShiftAmt();
480 EncodedOperand encodeAddress(const Operand *Opnd, IValueT &Value,
540 IValueT encodeRegister(const Operand *OpReg, RegSetWanted WantedRegSet,
549 IValueT encodeGPRegister(const Operand *OpReg, const char *RegName,
554 IValueT encodeSRegister(const Operand *OpReg, const char *RegName
[all...] |
| IceInst.h | 30 // validated for things like valid operand types, valid branch targets, proper
107 Operand *getSrc(SizeT I) const {
111 void replaceSource(SizeT Index, Operand *Replacement) {
117 bool isLastUse(const Operand *Src) const;
204 void addSource(Operand *Src) {
243 CfgVector<Operand *> Srcs;
247 /// operands (e.g. a call instruction), and each source operand can contain 0
282 static InstAlloca *create(Cfg *Func, Variable *Dest, Operand *ByteCount,
288 Operand *getSizeInBytes() const { return getSrc(0); }
296 InstAlloca(Cfg *Func, Variable *Dest, Operand *ByteCount
[all...] |
| /frameworks/compile/mclinker/include/mcld/Script/ |
| NullaryOp.h | 18 class Operand;
39 void appendOperand(Operand* pOperand) { assert(0); }
|
| /external/v8/src/mips64/ |
| code-stubs-mips64.cc | 61 __ Dsubu(sp, sp, Operand(param_count * kPointerSize));
116 __ Branch(&error, ne, scratch, Operand(zero_reg));
141 __ Branch(&done, eq, scratch, Operand(zero_reg));
146 Operand(HeapNumber::kExponentBias + HeapNumber::kMantissaBits + 31));
150 __ Branch(&normal_exponent, le, result_reg, Operand(zero_reg));
157 __ Addu(scratch, result_reg, Operand(kShiftBase + HeapNumber::kMantissaBits));
162 __ And(sign, input_high, Operand(HeapNumber::kSignMask));
167 __ Branch(&high_shift_needed, lt, scratch, Operand(32));
175 Operand(1 << HeapNumber::kMantissaBitsInTopWord));
187 __ Branch(&pos_shift, ge, scratch, Operand(zero_reg))
[all...] |
| /external/v8/src/mips/ |
| code-stubs-mips.cc | 32 __ Addu(a0, a0, Operand(3));
62 __ Subu(sp, sp, Operand(param_count * kPointerSize));
118 __ Branch(&error, ne, scratch, Operand(zero_reg));
143 __ Branch(&done, eq, scratch, Operand(zero_reg));
148 Operand(HeapNumber::kExponentBias + HeapNumber::kMantissaBits + 31));
152 __ Branch(&normal_exponent, le, result_reg, Operand(zero_reg));
159 __ Addu(scratch, result_reg, Operand(kShiftBase + HeapNumber::kMantissaBits));
164 __ And(sign, input_high, Operand(HeapNumber::kSignMask));
169 __ Branch(&high_shift_needed, lt, scratch, Operand(32));
177 Operand(1 << HeapNumber::kMantissaBitsInTopWord))
[all...] |
| /external/v8/src/regexp/ppc/ |
| regexp-macro-assembler-ppc.cc | 122 __ li(r3, Operand(FAILURE));
150 Operand(by * char_size()));
160 __ mov(r0, Operand(by));
180 __ Cmpli(current_character(), Operand(c), r0);
186 __ Cmpli(current_character(), Operand(limit), r0);
193 __ addi(r3, current_input_offset(), Operand(-char_size()));
203 Operand(-char_size() + cp_offset * char_size()));
210 __ Cmpli(current_character(), Operand(limit), r0);
221 Operand(kPointerSize));
271 __ addi(r3, r3, Operand(char_size()))
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.cc | 42 mov(pc, Operand(target, rmode), LeaveCC, cond);
80 Operand mov_operand = Operand(reinterpret_cast<intptr_t>(target), rmode);
123 mov(ip, Operand(reinterpret_cast<int32_t>(target), rmode));
201 add(sp, sp, Operand(count * kPointerSize), LeaveCC, cond);
206 add(sp, sp, Operand(count, LSL, kPointerSizeLog2), LeaveCC, cond);
220 eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
221 eor(reg2, reg2, Operand(reg1), LeaveCC, cond);
222 eor(reg1, reg1, Operand(reg2), LeaveCC, cond);
237 mov(ip, Operand(handle))
[all...] |
| code-stubs-arm.cc | 28 __ lsl(r5, r0, Operand(kPointerSizeLog2));
32 __ add(r0, r0, Operand(3));
101 __ sub(scratch, result_reg, Operand(1));
102 __ cmp(scratch, Operand(0x7ffffffe));
120 __ sub(scratch, scratch, Operand(HeapNumber::kExponentBias + 1));
125 __ cmp(scratch, Operand(83));
133 __ rsb(scratch, scratch, Operand(51), SetCC);
137 __ mov(scratch_low, Operand(scratch_low, LSR, scratch));
141 __ rsb(scratch, scratch, Operand(32));
146 Operand(1 << HeapNumber::kMantissaBitsInTopWord))
[all...] |
| /hardware/interfaces/neuralnetworks/1.1/ |
| types.hal | 19 import @1.0::Operand;
375 vec<Operand> operands;
387 * Each value corresponds to the index of the operand in "operands".
394 * Each value corresponds to the index of the operand in "operands".
399 * A byte buffer containing operand data that were copied into the model.
401 * An operand's value must be located here if and only if Operand::lifetime
407 * A collection of shared memory pools containing operand data that were
410 * An operand's value must be located here if and only if Operand::lifetim
[all...] |
| /external/vixl/test/aarch64/ |
| test-api-aarch64.cc | 288 VIXL_CHECK(Operand(x0).IsPlainRegister());
289 VIXL_CHECK(Operand(x1, LSL, 0).IsPlainRegister());
290 VIXL_CHECK(Operand(x2, LSR, 0).IsPlainRegister());
291 VIXL_CHECK(Operand(x3, ASR, 0).IsPlainRegister());
292 VIXL_CHECK(Operand(x4, ROR, 0).IsPlainRegister());
293 VIXL_CHECK(Operand(x5, UXTX).IsPlainRegister());
294 VIXL_CHECK(Operand(x6, SXTX).IsPlainRegister());
295 VIXL_CHECK(Operand(w7).IsPlainRegister());
296 VIXL_CHECK(Operand(w8, LSL, 0).IsPlainRegister());
297 VIXL_CHECK(Operand(w9, LSR, 0).IsPlainRegister())
[all...] |
| /external/v8/src/regexp/x64/ |
| regexp-macro-assembler-x64.cc | 176 __ leap(rax, Operand(rdi, -char_size()));
177 __ cmpp(rax, Operand(rbp, kStringStartMinusOne));
184 __ leap(rax, Operand(rdi, -char_size() + cp_offset * char_size()));
185 __ cmpp(rax, Operand(rbp, kStringStartMinusOne));
198 __ cmpl(rdi, Operand(backtrack_stackpointer(), 0));
227 __ movl(rax, Operand(rbp, kStringStartMinusOne));
243 __ leap(r9, Operand(rsi, rdx, times_1, 0));
244 __ leap(r11, Operand(rsi, rdi, times_1, 0));
256 __ movzxbl(rdx, Operand(r9, 0));
257 __ movzxbl(rax, Operand(r11, 0))
[all...] |
| /external/llvm/lib/CodeGen/ |
| RegUsageInfoPropagate.cpp | 116 MachineOperand &Operand = MI.getOperand(0);
117 if (Operand.isGlobal())
118 UpdateRegMask(cast<Function>(Operand.getGlobal()));
119 else if (Operand.isSymbol())
120 UpdateRegMask(M->getFunction(Operand.getSymbolName()));
|
| /external/v8/src/regexp/ia32/ |
| regexp-macro-assembler-ia32.cc | 160 __ lea(eax, Operand(edi, -char_size()));
161 __ cmp(eax, Operand(ebp, kStringStartMinusOne));
168 __ lea(eax, Operand(edi, -char_size() + cp_offset * char_size()));
169 __ cmp(eax, Operand(ebp, kStringStartMinusOne));
182 __ cmp(edi, Operand(backtrack_stackpointer(), 0));
204 __ mov(eax, Operand(ebp, kStringStartMinusOne));
232 __ movzx_b(eax, Operand(edi, 0));
233 __ cmpb_al(Operand(edx, 0));
238 __ lea(ecx, Operand(eax, -'a'));
250 __ movzx_b(ecx, Operand(edx, 0))
[all...] |
| /external/v8/src/regexp/x87/ |
| regexp-macro-assembler-x87.cc | 160 __ lea(eax, Operand(edi, -char_size()));
161 __ cmp(eax, Operand(ebp, kStringStartMinusOne));
168 __ lea(eax, Operand(edi, -char_size() + cp_offset * char_size()));
169 __ cmp(eax, Operand(ebp, kStringStartMinusOne));
182 __ cmp(edi, Operand(backtrack_stackpointer(), 0));
203 __ mov(eax, Operand(ebp, kStringStartMinusOne));
231 __ movzx_b(eax, Operand(edi, 0));
232 __ cmpb_al(Operand(edx, 0));
237 __ lea(ecx, Operand(eax, -'a'));
249 __ movzx_b(ecx, Operand(edx, 0))
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| PhiInsn.java | 48 private final ArrayList<Operand> operands = new ArrayList<Operand>();
73 * operand and will be derived later.
95 for (Operand o : operands) {
127 * Adds an operand to this phi instruction.
129 * @param registerSpec register spec, including type and reg of operand
130 * @param predBlock predecessor block to be associated with this operand
134 operands.add(new Operand(registerSpec, predBlock.getIndex(),
142 * Removes all operand uses of a register from this phi instruction.
144 * @param registerSpec register spec, including type and reg of operand
[all...] |
