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    Searched refs:getSubtarget (Results 276 - 300 of 443) sorted by null

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  /external/llvm/lib/Target/AMDGPU/
AMDGPUTargetMachine.cpp 467 const SISubtarget &ST = C->MF->getSubtarget<SISubtarget>();
R600MachineScheduler.cpp 30 const R600Subtarget &ST = DAG->MF.getSubtarget<R600Subtarget>();
R600OptimizeVectorRegisters.cpp 321 const R600Subtarget &ST = Fn.getSubtarget<R600Subtarget>();
R600Packetizer.cpp 329 const R600Subtarget &ST = Fn.getSubtarget<R600Subtarget>();
SIInsertWaits.cpp 517 ST = &MF.getSubtarget<SISubtarget>();
SILoadStoreOptimizer.cpp 414 const SISubtarget &STM = MF.getSubtarget<SISubtarget>();
SIWholeQuadMode.cpp 466 const SISubtarget &ST = MF.getSubtarget<SISubtarget>();
  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.h 112 const ARMSubtarget &getSubtarget() const { return Subtarget; }
  /external/llvm/lib/Target/Hexagon/
HexagonStoreWidening.cpp 601 auto &ST = MFn.getSubtarget<HexagonSubtarget>();
HexagonCopyToCombine.cpp 449 TRI = MF.getSubtarget().getRegisterInfo();
450 TII = MF.getSubtarget<HexagonSubtarget>().getInstrInfo();
HexagonOptAddrMode.cpp 617 auto &HST = MF.getSubtarget<HexagonSubtarget>();
622 const auto &TRI = *MF.getSubtarget().getRegisterInfo();
  /external/llvm/lib/Target/Sparc/
SparcISelDAGToDAG.cpp 40 Subtarget = &MF.getSubtarget<SparcSubtarget>();
  /external/llvm/lib/Target/SystemZ/
SystemZElimCompare.cpp 503 TII = static_cast<const SystemZInstrInfo *>(F.getSubtarget().getInstrInfo());
  /external/llvm/lib/Target/WebAssembly/
WebAssemblyCFGStackify.cpp 524 const auto &TII = *MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
  /external/llvm/lib/Target/X86/
X86CallFrameOptimization.cpp 217 STI = &MF.getSubtarget<X86Subtarget>();
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.cpp 271 *static_cast<const XCoreInstrInfo *>(MF.getSubtarget().getInstrInfo());
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMISelLowering.h 335 const ARMSubtarget* getSubtarget() const {
  /external/llvm/lib/CodeGen/
AggressiveAntiDepBreaker.cpp 117 TII(MF.getSubtarget().getInstrInfo()),
118 TRI(MF.getSubtarget().getRegisterInfo()), RegClassInfo(RCI),
    [all...]
LiveDebugVariables.cpp 728 TRI = mf.getSubtarget().getRegisterInfo();
    [all...]
MachineScheduler.cpp 334 } else if (!mf.getSubtarget().enableMachineScheduler())
372 } else if (!mf.getSubtarget().enablePostRAScheduler()) {
415 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
    [all...]
RegAllocFast.cpp     [all...]
TailDuplicator.cpp 61 TII = MF.getSubtarget().getInstrInfo();
62 TRI = MF.getSubtarget().getRegisterInfo();
    [all...]
  /external/llvm/lib/CodeGen/GlobalISel/
RegBankSelect.cpp 59 RBI = MF.getSubtarget().getRegBankInfo();
62 TRI = MF.getSubtarget().getRegisterInfo();
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  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGSDNodes.cpp 50 InstrItins(mf.getSubtarget().getInstrItineraryData()) {}
420 const TargetSubtargetInfo &ST = MF.getSubtarget();
    [all...]
SelectionDAGDumper.cpp 46 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
477 G ? G->getSubtarget().getRegisterInfo() : nullptr);

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