| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| advsimd-across.s | 28 .irp op, saddlv, uaddlv
36 .irp op, smaxv, umaxv, sminv, uminv, addv
44 .irp op, fmaxnmv, fminnmv, fmaxv, fminv
|
| pan.s | 35 .irp N,2,3,4,5,6,7,8,9,10,11,12,13,14,15
|
| bitfield-bfm.s | 108 .irp shift 0, 16, 31 // asr wzr, w7, #\shift
112 .irp shift 0, 31, 63 // asr xzr, x7, #\shift
116 .irp shift 0, 16, 31 // lsr wzr, w7, #\shift
120 .irp shift 0, 31, 63 // lsr xzr, x7, #\shift
124 .irp shift 0, 16, 31 // lsl wzr, w7, #\shift
128 .irp shift 0, 31, 63 // lsl xzr, x7, #\shift
136 .irp signed, s, , u
137 .irp whichm, ins2bfm, x2bfm
|
| ldst-reg-uns-imm.s | 44 .irp simm, -256, -171
48 .irp simm, 0, 2, 4, 8, 16, 85, 255
56 .irp reg, b, h, s, d, q
57 .irp simm, -256, -171
61 .irp simm, 0, 2, 4, 8, 16, 85, 255
|
| float-fp16.s | 46 .irp op, fabs, fneg, fsqrt, frintn, frintp, frintm, frintz
50 .irp op, frinta, frintx, frinti
62 .irp op, fmul, fdiv, fadd, fsub, fmax, fmin, fmaxnm, fminnm, fnmul
74 .irp op, fmadd, fmsub, fnmadd, fnmsub
99 .irp op, scvtf, ucvtf
103 .irp op, fcvtzs, fcvtzu
122 .irp op, fcvtns, fcvtnu, fcvtau, fcvtas
127 .irp op, fcvtps, fcvtpu, fcvtms, fcvtmu
131 .irp op, scvtf, ucvtf
|
| system.s | 68 .irp op, pld, pli, pst
69 .irp l, l1, l2, l3
70 .irp t, keep, strm
|
| addsub.s | 102 .irp extend, UXTB, UXTH, UXTW, UXTX, SXTB, SXTH, SXTW, SXTX
103 .irp amount, , 0, 1, 2, 3, 4
109 .irp amount, 0, 1, 2, 3, 4
160 .irp shift, LSL, LSR, ASR
161 .irp amount, 0, 1, 2, 3, 4, 5, 16, 31
176 .irp op, ADD, ADDS, SUB, SUBS
183 .irp op, ADDS, SUBS
190 .irp op, CMN, CMP
201 .irp op, ADD, ADDS, SUB, SUBS
206 .irp op, ADDS, SUB
[all...] |
| bitfield-alias.s | 83 .irp op, asr, lsr, lsl
84 .irp shift, 0, 16, 31
87 .irp shift, 0, 31, 63
96 .irp op, sbfiz, sbfx, bfi, bfxil, ubfiz, ubfx
|
| neon-not.s | 6 .irp r, 1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31
|
| neon-vfp-reglist-post.s | 16 .irp instr ld,st
17 .irp bits_64 8b, 4h, 2s, 1d
29 .irp instr ld,st
30 .irp bits_128 16b, 8h, 4s, 2d
42 .irp instr ld,st
43 .irp bits 8b, 4h, 2s, 1d, 16b, 8h, 4s, 2d
62 .irp instr ld,st
63 .irp bits_64 8b, 4h, 2s
68 .irp instr ld,st
69 .irp bits_128 16b, 8h, 4s, 2
[all...] |
| ldst-reg-imm-post-ind.s | 29 .irp simm, -256, -171, 0, 2, 4, 8, 16, 85, 255
36 .irp reg, b, h, s, d, q
37 .irp simm, -256, -171, 0, 2, 4, 8, 16, 85, 255
|
| ldst-reg-imm-pre-ind.s | 29 .irp simm, -256, -171, 0, 2, 4, 8, 16, 85, 255
36 .irp reg, b, h, s, d, q
37 .irp simm, -256, -171, 0, 2, 4, 8, 16, 85, 255
|
| ldst-exclusive.s | 95 .irp op, stxrb, stxrh, stxr
101 .irp op, ldxrb, ldxrh, ldxr
112 .irp op, stlxrb, stlxrh, stlxr
118 .irp op, ldaxrb, ldaxrh, ldaxr
129 .irp op, stlrb, stlrh, stlr
135 .irp op, ldarb, ldarh, ldar
|
| advsisd-copy.s | 34 .irp op, dup, mov
|
| sysreg-2.s | 47 .irp reg, pmblimitr_el1, pmbptr_el1, pmbsr_el1 pmbidr_el1
51 .irp reg, pmscr_el1, pmsicr_el1, pmsirr_el1, pmsfcr_el1
55 .irp reg, pmsevfr_el1, pmslatfr_el1, pmscr_el2, pmscr_el12
59 .irp reg, pmbidr_el1, pmsidr_el1
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mach-o/ |
| macro-irp.d | 2 #name: macro irp
3 #source: ../macros/irp.s
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/ |
| armv8-2-fp16-scalar.s | 2 .irp op, vdiv.f16, vfma.f16, vfms.f16, vfnma.f16, vfnms.f16, vmaxnm.f16, vminnm.f16, vmla.f16, vmls.f16, vmul.f16, vnmla.f16, vnmls.f16, vnmul.f16, vsub.f16
8 .irp op, vabs.f16, vadd.f16, vsqrt.f16, vneg.f16
14 .irp op, vcmp.f16, vcmpe.f16
20 .irp op, vcmp.f16, vcmpe.f16
26 .irp op, vseleq.f16 vselge.f16, vselvs.f16
32 .irp op, vcvt.s32.f16, vcvt.u32.f16, vcvt.f16.s32, vcvt.f16.u32
38 .irp op, vcvt.f16.s32, vcvt.f16.u32, vcvt.s32.f16, vcvt.u32.f16
44 .irp op, vcvta.s32.f16, vcvta.u32.f16, vcvtm.s32.f16, vcvtm.u32.f16, vcvtn.s32.f16, vcvtn.u32.f16, vcvtp.s32.f16, vcvtp.u32.f16, vcvtr.u32.f16, vcvtr.s32.f16
50 .irp op, vrinta.f16, vrintm.f16, vrintn.f16, vrintp.f16, vrintr.f16, vrintx.f16, vrintz.f16
56 .irp op, vins.f16, vmovx.f1
[all...] |
| armv8-2-fp16-simd.s | 2 .irp op, vabd.f16, vmax.f16, vmin.f16
9 .irp op, vabdq.f16, vmaxq.f16, vminq.f16
15 .irp op, vabs.f16, vneg.f16
22 .irp op, vabsq.f16, vnegq.f16
28 .irp op, vacge.f16, vacgt.f16, vaclt.f16, vacle.f16, vceq.f16, vcge.f16, vcgt.f16, vcle.f16, vclt.f16
35 .irp op, vceq.f16, vcge.f16, vcgt.f16, vcle.f16, vclt.f16
42 .irp op, vacgeq.f16, vacgtq.f16, vacltq.f16, vacleq.f16, vceqq.f16, vcgeq.f16, vcgtq.f16, vcleq.f16, vcltq.f16
48 .irp op, vadd.f16, vsub.f16
55 .irp op, vaddq.f16, vsubq.f16
61 .irp op, vmaxnm.f16, vminnm.f1
[all...] |
| thumb2_pool.s | 17 .irp regindex, 1, 4, 9, 12, 13
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/tic6x/ |
| insns-c674x-pcrel.s | 9 .globl irp
35 b .S2 (irp)
53 call .S2 (irp)
71 bdec .S2 (irp),b2
89 bpos .S2 (irp),b2
107 bnop .S2 (irp),3
125 callnop .S2 (irp),3
143 callp .S2 (irp),b3
161 callret .S2 (irp)
179 ret .S2 (irp)
[all...] |
| /external/llvm/test/MC/AsmParser/ |
| at-pseudo-variable.s | 28 .irp reg,%eax,%ebx
34 # Test that .irp(c) and .rep(t) do not increase \@.
45 .irp reg,%eax,%ebx
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/i386/ |
| mwaitx-reg.s | 1 .irp reg ax,bx,cx,dx,sp,bp,si,di
|
| x86-64-mwaitx-reg.s | 1 .irp reg ax,bx,cx,dx,sp,bp,si,di,8,9,10,11,12,13,14,15
|
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/macros/ |
| irp.d | 2 #name: macro irp
|
| /bionic/libc/arch-arm/cortex-a15/bionic/ |
| memset.S | 91 .irp offset, #0, #8, #16, #24, #32, #40, #48, #56
105 .irp offset, #0, #8, #16, #24
113 .irp offset, #0, #8
|
