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  /external/swiftshader/third_party/subzero/src/DartARM32/
assembler_arm.cc 311 // Moved to ARM32::AssemblerARM32::mvn()
312 void Assembler::mvn(Register rd, Operand o, Condition cond) {
313 EmitType01(cond, o.type(), MVN, 0, R0, rd, o);
316 // Moved to ARM32::AssemblerARM32::mvn()
318 EmitType01(cond, o.type(), MVN, 1, R0, rd, o);
    [all...]
assembler_arm.h 507 // Moved to ARM32::IceAssemblerARM32::mvn()
508 void mvn(Register rd, Operand o, Condition cond = AL);
    [all...]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/
thumb32.s 455 mt mvn mvns mvn.w mvns.w
thumb2_bad_reg.l 175 [^:]*:[0-9]+: Error: r13 not allowed here -- `mvn r13,#1'
176 [^:]*:[0-9]+: Error: r15 not allowed here -- `mvn r15,#1'
177 [^:]*:[0-9]+: Error: r13 not allowed here -- `mvn.w r13,r0'
178 [^:]*:[0-9]+: Error: r15 not allowed here -- `mvn.w r15,r0'
179 [^:]*:[0-9]+: Error: r13 not allowed here -- `mvn.w r0,r13'
180 [^:]*:[0-9]+: Error: r15 not allowed here -- `mvn.w r0,r15'
    [all...]
  /external/llvm/test/MC/AArch64/
arm64-advsimd.s 637 ; CHECK: mvn.8b v0, v0 ; encoding: [0x00,0x58,0x20,0x2e]
    [all...]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/s390/
esa-g5.s 316 mvn 4095(256,%r5),4095(%r10)
esa-g5.d 322 .*: d1 ff 5f ff af ff [ ]*mvn 4095\(256,%r5\),4095\(%r10\)
  /external/vixl/src/aarch64/
macro-assembler-aarch64.cc 859 Mvn(rd, rn);
928 // could also be achieved using an orr instruction (like orn used by Mvn),
    [all...]
assembler-aarch64.h     [all...]
  /external/swiftshader/third_party/subzero/src/
IceAssemblerARM32.h 255 void mvn(const Operand *OpRd, const Operand *OpScc, CondARM32::Cond Cond);
    [all...]
  /external/vixl/test/aarch32/
test-assembler-cond-rd-operand-const-cannot-use-pc-a32.cc 54 M(mvn) \
    [all...]
test-assembler-cond-rd-operand-const-t32.cc 56 M(mvn) \
    [all...]
test-assembler-cond-rd-operand-rn-shift-amount-1to32-a32.cc 56 M(mvn) \
    [all...]
test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32.cc 56 M(mvn) \
    [all...]
  /external/vixl/src/aarch32/
assembler-aarch32.h 2657 void mvn(Register rd, const Operand& operand) { mvn(al, Best, rd, operand); } function in class:vixl::aarch32::Assembler
2658 void mvn(Condition cond, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler
2661 void mvn(EncodingSize size, Register rd, const Operand& operand) { function in class:vixl::aarch32::Assembler
    [all...]
  /external/v8/src/arm64/
macro-assembler-arm64.cc 112 Mvn(rd, rn);
260 // could also be achieved using an orr instruction (like orn used by Mvn),
296 void MacroAssembler::Mvn(const Register& rd, const Operand& operand) {
301 mvn(rd, rd);
312 mvn(rd, rd);
315 mvn(rd, operand);
    [all...]
assembler-arm64.h     [all...]
  /external/v8/src/s390/
assembler-s390.h     [all...]
assembler-s390.cc     [all...]
  /external/vixl/benchmarks/aarch32/
asm-disasm-speed-test.cc     [all...]
  /art/runtime/interpreter/mterp/out/
mterp_arm.S     [all...]
  /external/boringssl/ios-arm/crypto/fipsmodule/
aes-armv4.S 804 mvn r9,r7
  /external/boringssl/linux-arm/crypto/fipsmodule/
aes-armv4.S 795 mvn r9,r7
  /external/boringssl/src/crypto/fipsmodule/aes/asm/
aes-armv4.pl 827 mvn $mask7f,$mask80
    [all...]
  /external/v8/src/arm/
assembler-arm.h 530 // the instruction this operand is used for is a MOV or MVN instruction the
880 void mvn(Register dst, const Operand& src,
    [all...]

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