| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 256 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
257 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/mips64r5/ |
| valid.s | 257 sll $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
258 sllv $a3,$zero,$9 # CHECK: sllv $7, $zero, $9 # encoding: [0x01,0x20,0x38,0x04]
|
| /external/llvm/test/MC/Mips/micromips64r6/ |
| valid.s | 242 sllv $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
247 sll $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
250 sll $2, $3 # CHECK: sllv $2, $2, $3 # encoding: [0x00,0x43,0x10,0x10]
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 322 sllv $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
327 sll $2, $3, $5 # CHECK: sllv $2, $3, $5 # encoding: [0x00,0x65,0x10,0x10]
330 sll $2, $3 # CHECK: sllv $2, $2, $3 # encoding: [0x00,0x43,0x10,0x10]
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceAssemblerMIPS32.h | 261 void sllv(const Operand *OpRd, const Operand *OpRt, const Operand *OpRs);
|
| IceAssemblerMIPS32.cpp | 986 void AssemblerMIPS32::sllv(const Operand *OpRd, const Operand *OpRt, function in class:Ice::MIPS32::AssemblerMIPS32
989 emitRdRsRt(Opcode, OpRd, OpRs, OpRt, "sllv");
[all...] |
| IceInstMIPS32.cpp | 131 template <> const char *InstMIPS32Sllv::Opcode = "sllv";
[all...] |
| /external/v8/src/mips/ |
| code-stubs-mips.cc | 181 __ sllv(input_high, input_high, scratch);
193 __ sllv(input_low, input_low, scratch);
[all...] |
| disasm-mips.cc | 1074 case SLLV:
1075 Format(instr, "sllv 'rd, 'rt, 'rs");
[all...] |
| macro-assembler-mips.cc | 994 sllv(at, rs, at);
[all...] |
| assembler-mips.h | 759 void sllv(Register rd, Register rt, Register rs);
[all...] |
| assembler-mips.cc | 1726 void Assembler::sllv(Register rd, Register rt, Register rs) { function in class:v8::Assembler
[all...] |
| /external/v8/src/mips64/ |
| disasm-mips64.cc | [all...] |
| assembler-mips64.h | 785 void sllv(Register rd, Register rt, Register rs);
[all...] |
| code-stubs-mips64.cc | 179 __ sllv(input_high, input_high, scratch);
191 __ sllv(input_low, input_low, scratch);
[all...] |
| assembler-mips64.cc | 1810 void Assembler::sllv(Register rd, Register rt, Register rs) { function in class:v8::internal::Assembler
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| mips16-64.d | 600 7a4: eb44 sllv v0,v1
|
| mips16.d | 599 7a4: eb44 sllv v0,v1
|
| micromips.s | 1884 sllv $2, $3, $4
1885 sllv $2, $2, $4
[all...] |
| /art/runtime/arch/mips/ |
| quick_entrypoints_mips.S | [all...] |
| /external/v8/src/compiler/mips/ |
| code-generator-mips.cc | [all...] |
| /external/v8/src/compiler/mips64/ |
| code-generator-mips64.cc | [all...] |
| /external/v8/src/full-codegen/mips/ |
| full-codegen-mips.cc | [all...] |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| mips-opc.c | [all...] |
| /external/v8/src/crankshaft/mips/ |
| lithium-codegen-mips.cc | [all...] |
