/external/mesa3d/src/mesa/drivers/dri/i915/ |
i915_program.c | 144 GLuint saturate, GLuint src0, GLuint src1, GLuint src2) 155 if (GET_UREG_TYPE(src1) == REG_TYPE_CONST) 169 s[1] = src1; 185 src1 = s[1]; 196 *(p->csr++) = (A1_SRC0(src0) | A1_SRC1(src1)); 197 *(p->csr++) = (A2_SRC1(src1) | A2_SRC2(src2));
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i915_program.h | 125 GLuint src0, GLuint src1, GLuint src2);
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/external/v8/src/mips/ |
macro-assembler-mips.h | 351 Condition cond, Register src1, const Operand& src2); 358 Condition cond, Register src1, const Operand& src2); 701 void Push(Register src1, Register src2) { 703 sw(src1, MemOperand(sp, 1 * kPointerSize)); 708 void Push(Register src1, Register src2, Register src3) { 710 sw(src1, MemOperand(sp, 2 * kPointerSize)); 716 void Push(Register src1, Register src2, Register src3, Register src4) { 718 sw(src1, MemOperand(sp, 3 * kPointerSize)); 725 void Push(Register src1, Register src2, Register src3, Register src4, 728 sw(src1, MemOperand(sp, 4 * kPointerSize)) [all...] |
macro-assembler-mips.cc | 78 Register src1, const Operand& src2) { 79 Branch(2, NegateCondition(cond), src1, src2); 94 Register src1, const Operand& src2) { 96 Branch(2, NegateCondition(cond), src1, src2); [all...] |
/external/v8/src/mips64/ |
macro-assembler-mips64.h | 384 Condition cond, Register src1, const Operand& src2); 391 Condition cond, Register src1, const Operand& src2); 745 void Push(Register src1, Register src2) { 747 sd(src1, MemOperand(sp, 1 * kPointerSize)); 752 void Push(Register src1, Register src2, Register src3) { 754 sd(src1, MemOperand(sp, 2 * kPointerSize)); 760 void Push(Register src1, Register src2, Register src3, Register src4) { 762 sd(src1, MemOperand(sp, 3 * kPointerSize)); 769 void Push(Register src1, Register src2, Register src3, Register src4, 772 sd(src1, MemOperand(sp, 4 * kPointerSize)) [all...] |
/build/blueprint/parser/ |
printer_test.go | 245 "src1.c", 257 "src1.c",
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/external/curl/packages/vms/ |
pcsi_product_gnv_curl.com | 147 $ src1 = "new_gnu:[usr.bin]," 156 $ gnu_src = src1 + src2 + src3 + src4 + src5 + src6 + src7 + src8 + src9
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/external/eigen/unsupported/Eigen/CXX11/src/Tensor/ |
TensorConversion.h | 78 SrcPacket src1 = m_impl.template packet<LoadMode>(index); local 80 TgtPacket result = internal::pcast<SrcPacket, TgtPacket>(src1, src2); 98 SrcPacket src1 = m_impl.template packet<LoadMode>(index); local 102 TgtPacket result = internal::pcast<SrcPacket, TgtPacket>(src1, src2, src3, src4);
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/external/mesa3d/src/gallium/drivers/nouveau/codegen/ |
nv50_ir_build_util.h | 281 Value *src0, Value *src1) 283 mkOp2(op, ty, dst, src0, src1); 289 Value *src0, Value *src1, Value *src2) 291 mkOp3(op, ty, dst, src0, src1, src2);
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nv50_ir_lowering_nv50.cpp | 47 ImmediateValue src1; local 48 bool src1imm = mul->src(1).getImmediate(src1); 82 src1.reg.data.s32 = abs(src1.reg.data.s32); 92 if (src1imm && (src1.reg.data.u32 & 0xffff0000) == 0) { 94 bld->mkImm(src1.reg.data.u32 & 0xffff)); 97 src1imm ? bld->mkImm(src1.reg.data.u32 >> 16) : b[1]); 98 if (src1imm && (src1.reg.data.u32 & 0x0000ffff) == 0) { 106 if (src1imm && (src1.reg.data.u32 & 0x0000ffff) == 0) { 1064 Value *src1 = bld.getSSA(); local 1095 Value *src1 = bld.getSSA(); local [all...] |
nv50_ir_from_tgsi.cpp | [all...] |
nv50_ir_build_util.cpp | 79 Value *src0, Value *src1) 85 insn->setSrc(1, src1); 93 Value *src0, Value *src1, Value *src2) 99 insn->setSrc(1, src1); 224 DataType srcTy, Value *src0, Value *src1, Value *src2) 233 insn->setSrc(1, src1); 264 BuildUtil::mkQuadop(uint8_t q, Value *def, uint8_t l, Value *src0, Value *src1) 266 Instruction *quadop = mkOp2(OP_QUADOP, TYPE_F32, def, src0, src1);
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nv50_ir_peephole.cpp | 384 ImmediateValue src0, src1, src2; local 388 i->src(1).getImmediate(src1) && 390 expr(i, src0, src1, src2); 393 i->src(0).getImmediate(src0) && i->src(1).getImmediate(src1)) 394 expr(i, src0, src1); 399 if (i->srcExists(1) && i->src(1).getImmediate(src1)) 400 opnd(i, src1, 1); 706 ImmediateValue src0, src1 = *i->getSrc(0)->asImm(); local 719 expr(i, src0, src1); 721 opnd(i, src1, 1) 1638 Value *src1 = sub->getSrc(1); local 1666 Value *src1 = add->getSrc(1); local 1685 Value *src1 = add->getSrc(1); local 1750 Value *src1 = minmax->getSrc(1); local 1804 Value *src1 = logop->getSrc(1); local 2178 Value *src1 = add->getSrc(1); local 2192 Value *src1 = add->getSrc(1); local [all...] |
/external/mesa3d/src/gallium/drivers/vc4/ |
vc4_nir_lower_blend.c | 168 vc4_nir_set_packed_chan(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1, 174 nir_iand(b, src1, nir_imm_int(b, chan_mask))); 454 nir_ssa_def *src0, nir_ssa_def *src1) 465 return nir_feq(b, src0, src1); 467 return nir_fne(b, src0, src1); 469 return nir_flt(b, src1, src0); 471 return nir_fge(b, src0, src1); 473 return nir_flt(b, src0, src1); 475 return nir_fge(b, src1, src0);
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/external/swiftshader/src/OpenGL/compiler/ |
OutputASM.h | 269 Instruction *emit(sw::Shader::Opcode op, TIntermTyped *dst = 0, TIntermNode *src0 = 0, TIntermNode *src1 = 0, TIntermNode *src2 = 0, TIntermNode *src3 = 0, TIntermNode *src4 = 0); 270 Instruction *emit(sw::Shader::Opcode op, TIntermTyped *dst, int dstIndex, TIntermNode *src0 = 0, int index0 = 0, TIntermNode *src1 = 0, int index1 = 0, 274 void emitBinary(sw::Shader::Opcode op, TIntermTyped *dst = 0, TIntermNode *src0 = 0, TIntermNode *src1 = 0, TIntermNode *src2 = 0); 275 void emitAssign(sw::Shader::Opcode op, TIntermTyped *result, TIntermTyped *lhs, TIntermTyped *src0, TIntermTyped *src1 = 0);
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.15-4.8/include/isl/ |
seq.h | 36 void isl_seq_combine(isl_int *dst, isl_int m1, isl_int *src1,
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_vec4_generator.cpp | 58 struct brw_reg src1) 64 if (src1.file == BRW_GENERAL_REGISTER_FILE) 65 check_gen6_math_src_arg(src1); 68 gen6_math(p, dst, brw_math_function(inst->opcode), src0, src1); 77 struct brw_reg src1) 89 struct brw_reg &op0 = is_int_div ? src1 : src0; 90 struct brw_reg &op1 = is_int_div ? src0 : src1; 418 struct brw_reg src1) 432 * immediate value in src1, and store the result in DWORDs 3 and 4 of dst. 436 * mul(2) dst.3<1>UD src0<8;2,4>UD src1<...>UW { Align1 WE_all [all...] |
brw_fs_surface_builder.cpp | 97 const fs_reg &src0, const fs_reg &src1, 104 const unsigned n = (src0.file != BAD_FILE) + (src1.file != BAD_FILE); 105 const fs_reg srcs[] = { src0, src1 }; 148 const fs_reg &src0, const fs_reg &src1, 155 const unsigned n = (src0.file != BAD_FILE) + (src1.file != BAD_FILE); 156 const fs_reg srcs[] = { src0, src1 }; [all...] |
/external/boringssl/src/crypto/perlasm/ |
x86asm.pl | 151 my ($dst,$src1,$src2,$rxb)=@_; 155 $rxb&=~(0x01<<5) if($src1>=8);
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/external/libvpx/libvpx/vp8/encoder/mips/msa/ |
denoising_msa.c | 29 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local 293 LD_UB8(sig_start, sig_stride, src0, src1, src2, src3, src4, src5, src6, src7); 298 ST_UB8(src0, src1, src2, src3, src4, src5, src6, src7, running_avg_y_start, 319 int64_t dst0, dst1, src0, src1, src2, src3; local 559 LD4(sig_start, sig_stride, src0, src1, src2, src3); 561 SD4(src0, src1, src2, src3, running_avg_y_start, avg_y_stride); 564 LD4(sig_start, sig_stride, src0, src1, src2, src3); 565 SD4(src0, src1, src2, src3, running_avg_y_start, avg_y_stride);
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/external/libvpx/libvpx/vp9/encoder/arm/neon/ |
vp9_frame_scale_neon.c | 106 const uint8_t *src1 = src + src_stride; local 121 const uint8x16x2_t s1 = vld2q_u8(src1); 125 src1 += 32; 130 src1 += 2 * (src_stride - max_width); 141 const uint8_t *src1 = src + src_stride; local 161 const uint8x16x4_t s1 = vld4q_u8(src1); 165 src1 += 64; 170 src1 += 4 * (src_stride - max_width);
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/external/skia/gm/ |
poly2poly.cpp | 244 const int src1[] = { 0, 0 }; variable 246 doDraw(canvas, &paint, src1, dst1, 1);
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/external/skqp/gm/ |
poly2poly.cpp | 244 const int src1[] = { 0, 0 }; variable 246 doDraw(canvas, &paint, src1, dst1, 1);
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/external/mesa3d/src/gallium/auxiliary/tgsi/ |
tgsi_lowering.c | 172 * dst.y = src0.y \times src1.y 174 * dst.w = src1.w 183 * if (dst.yz aliases src1.w) { 184 * MOV tmpB.yw, src1.yw 185 * src1 = tmpB 187 * MUL dst.y, src0.y, src1.y 189 * MOV dst.w, src1.w 202 struct tgsi_full_src_register *src1 = &inst->Src[1]; local 210 if (aliases(dst, TGSI_WRITEMASK_YZ, src1, TGSI_WRITEMASK_W)) { 211 create_mov(tctx, &ctx->tmp[B].dst, src1, TGSI_WRITEMASK_YW, 0) 281 struct tgsi_full_src_register *src1 = &inst->Src[1]; local 407 struct tgsi_full_src_register *src1 = &inst->Src[1]; local 502 struct tgsi_full_src_register *src1 = &inst->Src[1]; local 951 struct tgsi_full_src_register *src1 = &inst->Src[1]; local [all...] |
/cts/apps/CtsVerifier/libs/ |
opencv3-android.jar | |