| /external/libvpx/libvpx/vpx_dsp/arm/ |
| loopfilter_16_neon.asm | 36 vld1.8 {d16[]}, [r2] ; load *blimit
37 vld1.8 {d17[]}, [r3] ; load *limit
38 vld1.8 {d18[]}, [r4] ; load *thresh
42 vld1.u8 {d0}, [r8@64], r1 ; p7
43 vld1.u8 {d1}, [r8@64], r1 ; p6
44 vld1.u8 {d2}, [r8@64], r1 ; p5
45 vld1.u8 {d3}, [r8@64], r1 ; p4
46 vld1.u8 {d4}, [r8@64], r1 ; p3
47 vld1.u8 {d5}, [r8@64], r1 ; p2
48 vld1.u8 {d6}, [r8@64], r1 ; p
[all...] |
| loopfilter_8_neon.asm | 34 vld1.8 {d0[]}, [r2] ; duplicate *blimit
38 vld1.8 {d1[]}, [r3] ; duplicate *limit
39 vld1.8 {d2[]}, [r2] ; duplicate *thresh
44 vld1.u8 {d3}, [r3@64], r1 ; p3
45 vld1.u8 {d4}, [r2@64], r1 ; p2
46 vld1.u8 {d5}, [r3@64], r1 ; p1
47 vld1.u8 {d6}, [r2@64], r1 ; p0
48 vld1.u8 {d7}, [r3@64], r1 ; q0
49 vld1.u8 {d16}, [r2@64], r1 ; q1
50 vld1.u8 {d17}, [r3@64] ; q
[all...] |
| /external/libavc/encoder/arm/ |
| ih264e_evaluate_intra_chroma_modes_a9q.s | 98 vld1.32 {q4}, [r1]!
100 vld1.32 {q5}, [r1]!
158 vld1.32 {q4}, [r12]!
161 vld1.32 {q5}, [r12]!
164 vld1.32 {q0}, [r0], r3
172 vld1.32 {q1}, [r12], r3
199 vld1.32 {q0}, [r0], r3
208 vld1.32 {q1}, [r12], r3
|
| /external/libhevc/common/arm/ |
| ihevc_weighted_pred_bi.s | 201 vld1.s16 {d0},[r0]! @load and increment the pi2_src1
203 vld1.s16 {d1},[r1]! @load and increment the pi2_src2
205 vld1.s16 {d2},[r6],r3 @load and increment the pi2_src_tmp1 ii iteration
207 vld1.s16 {d3},[r8],r4 @load and increment the pi2_src_tmp1 ii iteration
210 vld1.s16 {d0},[r6],r3 @load and increment the pi2_src1 iii iteration
213 vld1.s16 {d1},[r8],r4 @load and increment the pi2_src2 iii iteration
217 vld1.s16 {d2},[r6],r3 @load and increment the pi2_src_tmp1 iv iteration
221 vld1.s16 {d3},[r8],r4 @load and increment the pi2_src_tmp1 iv iteration
|
| ihevc_deblk_chroma_vert.s | 69 vld1.8 {d5},[r8],r1
71 vld1.8 {d17},[r8],r1
73 vld1.8 {d16},[r8],r1
75 vld1.8 {d4},[r8]
|
| ihevc_intra_pred_luma_horz.s | 120 vld1.8 {q0},[r12] @load 16 values. d1[7] will have the 1st value.
195 vld1.8 {q15},[r12] @pu1_ref[two_nt + 1 + col]
199 vld1.8 {q0},[r12]
271 vld1.8 {d30},[r12] @pu1_ref[two_nt + 1 + col]
274 vld1.8 {d0},[r12]
314 vld1.8 {d30},[r12] @pu1_ref[two_nt + 1 + col]
317 vld1.8 {d0},[r12]
|
| ihevc_intra_pred_luma_planar.s | 184 vld1.s8 d8, [r12] @(1-8)load 8 coeffs [col+1]
186 vld1.s8 d4, [r6] @(1-8)src[2nt-1-row]
192 vld1.s8 d3, [r14] @(1-8)load 8 src[2nt+1+col]
328 vld1.s8 d8, [r12] @(1n)(1-8)load 8 coeffs [col+1]
331 vld1.s8 d3, [r14] @(1n)(1-8)load 8 src[2nt+1+col]
336 vld1.s8 d5, [r5]
338 vld1.s8 d4, [r6] @(1n)(1-8)src[2nt-1-row]
479 vld1.s8 d4, [r6] @(1n)(1-8)src[2nt-1-row]
489 vld1.s8 d5, [r5] @(row+1 value)
498 vld1.s8 d8, [r12] @(1n)(1-8)load 8 coeffs [col+1
[all...] |
| /external/libavc/common/arm/ |
| ih264_intra_pred_luma_8x8_a9q.s | 108 vld1.u8 {q0}, [r0]! @
109 vld1.u8 {q1}, [r0]
115 vld1.8 {d10[7]}, [r0] @ LOADING SRC[24] AGIN TO THE END FOR p'[ 15, -1 ] = ( p[ 14, -1 ] + 3 * p[ 15, -1 ] + 2 ) >> 2
199 vld1.8 d0, [r0]
271 vld1.u8 {d0}, [r0]
357 vld1.u8 {d0}, [r0] @BOTH LEFT AND TOP AVAILABLE
359 vld1.u8 {d1}, [r0]
373 vld1.u8 {d0}, [r0]
382 vld1.u8 {d0}, [r0]
464 vld1.8 {q0}, [r0
[all...] |
| ih264_iquant_itrans_recon_a9.s | 167 vld1.32 d30[0], [r1], r3 @I row Load pu1_pred buffer
177 vld1.32 d30[1], [r1], r3 @II row Load pu1_pred buffer
184 vld1.32 d31[0], [r1], r3 @III row Load pu1_pred buf
203 vld1.32 d31[1], [r1], r3 @IV row Load pu1_pred buffer
393 vld1.u8 d0, [r2], r4 @Loading out buffer 16 coeffs
394 vld1.u8 d1, [r2], r4
395 vld1.u8 d2, [r2], r4
396 vld1.u8 d3, [r2], r4
501 vld1.32 {q13}, [r5]! @ Q13 = dequant values row 0
502 vld1.32 {q10}, [r6]! @ Q10 = scaling factors row
[all...] |
| ih264_weighted_pred_a9q.s | 136 vld1.32 d4[0], [r0], r2 @load row 1 in source
137 vld1.32 d4[1], [r0], r2 @load row 2 in source
138 vld1.32 d6[0], [r0], r2 @load row 3 in source
139 vld1.32 d6[1], [r0], r2 @load row 4 in source
168 vld1.8 d4, [r0], r2 @load row 1 in source
169 vld1.8 d6, [r0], r2 @load row 2 in source
170 vld1.8 d8, [r0], r2 @load row 3 in source
172 vld1.8 d10, [r0], r2 @load row 4 in source
208 vld1.8 {q2}, [r0], r2 @load row 1 in source
209 vld1.8 {q3}, [r0], r2 @load row 2 in sourc
[all...] |
| ih264_intra_pred_luma_16x16_a9q.s | 113 vld1.8 {q0}, [r0]
192 vld1.u8 {q0}, [r0]
276 vld1.u8 {q0}, [r0] @BOTH LEFT AND TOP AVAILABLE
279 vld1.u8 {q1}, [r0]
294 vld1.u8 {q0}, [r0]
304 vld1.u8 {q0}, [r0]
401 vld1.32 d2, [r1], r8
406 vld1.32 d0, [r1]
408 vld1.32 {q3}, [r7]
|
| ih264_inter_pred_filters_luma_horz_a9q.s | 123 vld1.8 {d2, d3, d4}, [r0], r2 @// Load row0 ;for checking loop
125 vld1.8 {d5, d6, d7}, [r0], r2 @// Load row1
180 vld1.8 {d5, d6}, [r0], r2 @// Load row1
182 vld1.8 {d2, d3}, [r0], r2 @// Load row0
213 vld1.8 {d5, d6}, [r0], r2 @// Load row1
215 vld1.8 {d2, d3}, [r0], r2 @// Load row0
|
| ih264_intra_pred_luma_4x4_a9q.s | 111 vld1.32 d0[0], [r0]
405 vld1.8 {d0}, [r0]
408 vld1.8 {d2[6]}, [r6]
485 vld1.u8 {d0}, [r0]
487 vld1.u8 {d1}, [r0]
565 vld1.u8 {d0}, [r0]
567 vld1.u8 {d1}, [r0]
646 vld1.u8 {d0}, [r0]
648 vld1.u8 {d1}, [r0]
728 vld1.u8 {d0}, [r0
[all...] |
| /external/arm-neon-tests/ |
| ref_vld1.c | 34 #define TEST_MSG "VLD1/VLD1Q"
37 /* Basic test vec=vld1(buffer); then store vec: vst1(result, vector) */
40 VECT_VAR(VAR, T1, W, N) = vld1##Q##_##T2##W(VECT_VAR(BUF, T1, W, N)); \
|
| ref_vld1_dup.c | 42 vld1##Q##_dup_##T2##W(&VECT_VAR(BUF, T1, W, N)[i]); \
|
| ref_vld1_lane.c | 41 vld1##Q##_##T2##W(VECT_VAR(buffer_src, T1, W, N)); \
43 vld1##Q##_lane_##T2##W(VECT_VAR(buffer, T1, W, N), \
|
| /frameworks/rs/cpu_ref/ |
| rsCpuIntrinsics_neon_Blend.S | 450 vld1.8 {d0-d3}, [r0]!
451 vld1.8 {d4-d7}, [r0]!
460 vld1.8 {d16-d19}, [r1]!
461 vld1.8 {d20-d23}, [r1]!
502 .if \lddst ; vld1.64 {d4-d7}, [r0]! ; .endif
503 .if \ldsrc ; vld1.64 {d20-d23}, [r1]! ; .endif
506 .if \lddst ; vld1.64 {d2-d3}, [r0]! ; .endif
507 .if \ldsrc ; vld1.64 {d18-d19}, [r1]! ; .endif
510 .if \lddst ; vld1.64 {d1}, [r0]! ; .endif
511 .if \ldsrc ; vld1.64 {d17}, [r1]! ; .endi
[all...] |
| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| ghashv8-armx32.S | 14 vld1.64 {q9},[r1] @ load input H
67 vld1.64 {q9},[r0] @ load Xi
69 vld1.64 {q12,q13},[r1] @ load twisted H, ...
112 vld1.64 {q0},[r0] @ load [rotated] Xi
128 vld1.64 {q12,q13},[r1]! @ load twisted H, ..., H^2
130 vld1.64 {q14},[r1]
133 vld1.64 {q8},[r2]! @ load [rotated] I[0]
141 vld1.64 {q9},[r2],r12 @ load [rotated] I[1]
164 vld1.64 {q8},[r2],r12 @ load [rotated] I[i+2]
173 vld1.64 {q9},[r2],r12 @ load [rotated] I[i+3
[all...] |
| /external/boringssl/linux-arm/crypto/fipsmodule/ |
| ghashv8-armx32.S | 13 vld1.64 {q9},[r1] @ load input H
64 vld1.64 {q9},[r0] @ load Xi
66 vld1.64 {q12,q13},[r1] @ load twisted H, ...
107 vld1.64 {q0},[r0] @ load [rotated] Xi
123 vld1.64 {q12,q13},[r1]! @ load twisted H, ..., H^2
125 vld1.64 {q14},[r1]
128 vld1.64 {q8},[r2]! @ load [rotated] I[0]
136 vld1.64 {q9},[r2],r12 @ load [rotated] I[1]
159 vld1.64 {q8},[r2],r12 @ load [rotated] I[i+2]
168 vld1.64 {q9},[r2],r12 @ load [rotated] I[i+3
[all...] |
| /external/boringssl/src/crypto/fipsmodule/modes/asm/ |
| ghashv8-armx.pl | 91 vld1.64 {$t1},[x1] @ load input H
150 vld1.64 {$t1},[$Xi] @ load Xi
152 vld1.64 {$H-$Hhl},[$Htbl] @ load twisted H, ...
207 vld1.64 {$Xl},[$Xi] @ load [rotated] Xi
223 vld1.64 {$H-$Hhl},[$Htbl],#32 @ load twisted H, ..., H^2
225 vld1.64 {$H2},[$Htbl]
228 vld1.64 {$t0},[$inp],#16 @ load [rotated] I[0]
244 vld1.64 {$t1},[$inp],$inc @ load [rotated] I[1]
267 vld1.64 {$t0},[$inp],$inc @ load [rotated] I[i+2]
276 vld1.64 {$t1},[$inp],$inc @ load [rotated] I[i+3
[all...] |
| ghash-armv4.pl | 442 vld1.64 $IN#hi,[r1]! @ load H
444 vld1.64 $IN#lo,[r1]
463 vld1.64 $IN#hi,[$Xi]! @ load Xi
464 vld1.64 $IN#lo,[$Xi]!
481 vld1.64 $Xl#hi,[$Xi]! @ load Xi
482 vld1.64 $Xl#lo,[$Xi]!
493 vld1.64 $IN#hi,[$inp]! @ load inp
494 vld1.64 $IN#lo,[$inp]!
|
| /external/boringssl/src/crypto/fipsmodule/bn/asm/ |
| armv4-mont.pl | 327 vld1.32 {${Bi}[0]}, [$bptr,:32]!
330 vld1.32 {$A0-$A3}, [$aptr]! @ can't specify :32 :-(
332 vld1.32 {${M0}[0]}, [$n0,:32]
347 vld1.32 {$N0-$N3}, [$nptr]!
380 vld1.32 {${Bi}[0]}, [$bptr,:32]!
463 vld1.32 {$A0-$A3},[$aptr]!
465 vld1.32 {${M0}[0]},[$n0,:32]
471 vld1.32 {${Bi}[0]},[$bptr,:32]! @ *b++
475 vld1.32 {$N0-$N3},[$nptr]!
494 vld1.32 {${Bi}[0]},[$bptr,:32]! @ *b+
[all...] |
| /external/boringssl/src/crypto/chacha/asm/ |
| chacha-armv4.pl | 681 vld1.32 {$b0-$c0},[r3] @ load key
685 vld1.32 {$d0},[r12] @ load counter and nonce
688 vld1.32 {$a0},[r14]! @ load sigma
689 vld1.32 {$t0},[r14] @ one
761 vld1.32 {$t0-$t1},[sp] @ load key material
762 vld1.32 {$t2-$t3},[@t[3]]
801 vld1.8 {$t0-$t1},[r12]! @ load input
803 vld1.8 {$t2-$t3},[r12]!
806 vld1.8 {$t0-$t1},[r12]!
809 vld1.8 {$t2-$t3},[r12]
[all...] |
| /external/v8/src/arm/ |
| codegen-arm.cc | 76 __ vld1(Neon8, NeonListOperand(d0, 4), NeonMemOperand(src, PostIndex));
80 __ vld1(Neon8, NeonListOperand(d4, 4), NeonMemOperand(src, PostIndex));
88 __ vld1(Neon8, NeonListOperand(d0, 4), NeonMemOperand(src, PostIndex));
89 __ vld1(Neon8, NeonListOperand(d4, 4), NeonMemOperand(src, PostIndex));
93 __ vld1(Neon8, NeonListOperand(d0, 4), NeonMemOperand(src, PostIndex));
94 __ vld1(Neon8, NeonListOperand(d4, 4), NeonMemOperand(src, PostIndex));
101 __ vld1(Neon8, NeonListOperand(d0, 4), NeonMemOperand(src, PostIndex));
102 __ vld1(Neon8, NeonListOperand(d4, 4), NeonMemOperand(src, PostIndex));
110 __ vld1(Neon8, NeonListOperand(d0, 4), NeonMemOperand(src, PostIndex));
117 __ vld1(Neon8, NeonListOperand(d0, 2), NeonMemOperand(src, PostIndex))
[all...] |
| /external/libhevc/decoder/arm/ |
| ihevcd_fmt_conv_420sp_to_420p.s | 118 vld1.8 {d0,d1},[r0]!
127 @// and written using VLD1 and VST1
131 vld1.8 {d0,d1}, [r0]!
181 @// and written using VLD1 and VST1
|
