| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mt/ |
| relocs1.s | 19 ; Test the %hi16 and %lo16 relocs
20 addui R1,R2,#%hi16(d2)
22 addui R1,R2,#%hi16(65536)
24 addui R1,R2,#%hi16($FFFFEEEE)
|
| /toolchain/binutils/binutils-2.27/ld/testsuite/ld-tilepro/ |
| reloc.s | 17 { addli r2,r2,hi16(external_32a); addli r3,r3,hi16(external_32b) }
28 moveli r0, hi16(external_data1 - . + 30000)
44 .short hi16(external_32a)
45 .short hi16(external_32b)
|
| /toolchain/binutils/binutils-2.27/gas/config/ |
| tc-iq2000.h | 51 for HI16 relocs and queue them up for later sorting. */
|
| tc-m32r.h | 77 HI16 relocs and queue them up for later sorting. */
|
| tc-mep.h | 65 to check for HI16 relocs and queue them up for later sorting. */
|
| tc-pj.c | 61 if (strncmp (input_line_pointer, "%hi16", 5) == 0)
144 turns ipush <foo> into sipush lo16<foo>, sethi hi16<foo>. */
|
| /toolchain/binutils/binutils-2.27/cpu/ |
| iq2000m.cpu | 25 "andoui $rt,$rs,$hi16"
26 (+ OP_ANDOUI rs rt hi16)
27 (set rt (and rs (or (sll hi16 16) #xFFFF)))
31 "andoui ${rt-rs},$hi16"
32 (+ OP_ANDOUI rt-rs hi16)
33 (set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
37 "orui ${rt-rs},$hi16"
38 (+ OP_ORUI rt-rs hi16)
39 (set rt-rs (or rt-rs (sll hi16 16)))
43 "orui $rt,$rs,$hi16"
[all...] |
| lm32.cpu | 159 (name hi16)
164 (handlers (parse "hi16"))
315 "andhi $r1,$r0,$hi16"
316 (+ OP_ANDHI r0 r1 hi16)
317 (set r1 (and r0 (sll SI hi16 16)))
585 "orhi $r1,$r0,$hi16"
586 (+ OP_ORHI r0 r1 hi16)
587 (set r1 (or r0 (sll SI hi16 16)))
783 "mvhi $r1,$hi16"
784 (+ OP_ORHI (f-r0 0) r1 hi16)
[all...] |
| iq10.cpu | 28 "andoui $rt,$rs,$hi16"
29 (+ OP10_ANDOUI rs rt hi16)
30 (set rt (and rs (or (sll hi16 16) #xFFFF)))
34 "andoui ${rt-rs},$hi16"
35 (+ OP10_ANDOUI rt-rs hi16)
36 (set rt-rs (and rt-rs (or (sll hi16 16) #xFFFF)))
40 "orui $rt,$rs,$hi16"
41 (+ OP10_ORUI rs rt hi16)
42 (set rt (or rs (sll hi16 16)))
46 "orui ${rt-rs},$hi16"
[all...] |
| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
| elf-rel.d | 5 # Test the HI16/LO16 generation.
|
| elfel-rel.d | 6 # Test the HI16/LO16 generation.
|
| /toolchain/binutils/binutils-2.27/gas/doc/ |
| c-m32c.texi | 114 @item %hi16
123 mov.w #%hi16(sym),a1
|
| c-rl78.texi | 77 @item %hi16()
83 movw ax,#%hi16(_sym)
|
| c-tilepro.texi | 167 @item hi16
174 @code{ha16(N)} is identical to @code{hi16(N)}, except if
175 @code{lo16(N)} is negative it adds one to the @code{hi16(N)}
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinRegisterInfo.td | 20 def hi16 : SubRegIndex;
68 let SubRegIndices = [hi16, lo16];
226 let SubRegClasses = [(D16L lo16), (D16H hi16)];
230 let SubRegClasses = [(P16L lo16), (P16H hi16)];
234 let SubRegClasses = [(DP16L lo16), (DP16H hi16)];
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 653 MachineInstrBuilder LO16, HI16;
659 HI16 = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(ARM::ORRri))
668 HI16 = HI16.addImm(SOImmValV2);
670 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end())
[all...] |
| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCMCExpr.cpp | 32 case VK_PPC_HI: OS << "hi16"; break;
|
| /toolchain/binutils/binutils-2.27/opcodes/ |
| lm32-opinst.c | 66 { INPUT, "hi16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (HI16), 0, 0 },
225 { INPUT, "hi16", HW_H_UINT, CGEN_MODE_UINT, OP_ENT (HI16), 0, 0 },
|
| lm32-opc.c | 175 /* andhi $r1,$r0,$hi16 */
178 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
391 /* orhi $r1,$r0,$hi16 */
394 { { MNEM, ' ', OP (R1), ',', OP (R0), ',', OP (HI16), 0 } },
559 /* mvhi $r1,$hi16 */
562 { { MNEM, ' ', OP (R1), ',', OP (HI16), 0 } },
|
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | [all...] |
| /external/libffi/src/m88k/ |
| ffi.c | 382 /* or.u %r10, %r0, %hi16(fn) */
384 /* or.u %r13, %r0, %hi16(closure) */
|
| /external/python/cpython2/Modules/_ctypes/libffi/src/m88k/ |
| ffi.c | 382 /* or.u %r10, %r0, %hi16(fn) */
384 /* or.u %r13, %r0, %hi16(closure) */
|
| /external/python/cpython3/Modules/_ctypes/libffi/src/m88k/ |
| ffi.c | 382 /* or.u %r10, %r0, %hi16(fn) */
384 /* or.u %r13, %r0, %hi16(closure) */
|
| /external/valgrind/coregrind/m_dispatch/ |
| dispatch-arm-linux.S | 130 4 = movt r12, hi16(disp_cp_chain_me_to_slowEP)
145 4 = movt r12, hi16(disp_cp_chain_me_to_fastEP)
|
| /frameworks/compile/mclinker/lib/Target/Mips/ |
| MipsRelocationFunctions.h | 20 DECL_MIPS_APPLY_RELOC_FUNC(hi16) \
52 { &hi16, 5, "R_MIPS_HI16", 16}, \
|
