/external/llvm/lib/Target/Mips/ |
MipsInstrInfo.cpp | 348 return Mips::JIALC; 432 // For MIPSR6 JI*C requires an immediate 0 as an operand, JIALC(64) an 436 if (NewOpc == Mips::JIC || NewOpc == Mips::JIALC || NewOpc == Mips::JIC64 || 439 if (NewOpc == Mips::JIALC || NewOpc == Mips::JIALC64)
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Mips32r6InstrInfo.td | 451 class JIALC_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16, [all...] |
Mips64r6InstrInfo.td | 79 class JIALC64_DESC : JMP_IDX_COMPACT_DESC_BASE<"jialc", calloffset16,
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/toolchain/binutils/binutils-2.27/gas/testsuite/gas/mips/ |
r6.s | 239 jialc $3,-32768 240 jialc $3,32767
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r6-n32.d | 470 0+0544 <[^>]*> f8038000 jialc v1,-32768 471 0+0548 <[^>]*> f8037fff jialc v1,32767
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r6.d | 469 0+0544 <[^>]*> f8038000 jialc v1,-32768 470 0+0548 <[^>]*> f8037fff jialc v1,32767
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r6-n64.d | 714 0+0544 <[^>]*> f8038000 jialc v1,-32768 715 0+0548 <[^>]*> f8037fff jialc v1,32767
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/external/llvm/test/MC/Mips/mips32r6/ |
valid.s | 108 jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0xf8,0x05,0x01,0x00] 170 jialc $15, 16161 # CHECK: jialc $15, 16161 # encoding: [0xf8,0x0f,0x3f,0x21]
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/external/v8/src/mips/ |
constants-mips.h | 396 POP76 = ((7U << 3) + 6) << kOpcodeShift, // bnezc, jialc 640 JIALC = ((0U << 5) + 0), [all...] |
disasm-mips.cc | [all...] |
/external/v8/src/mips64/ |
constants-mips64.h | 673 JIALC = ((0U << 5) + 0), [all...] |
disasm-mips64.cc | [all...] |
/art/compiler/utils/mips64/ |
assembler_mips64_test.cc | [all...] |
assembler_mips64.cc | 745 void Mips64Assembler::Jialc(GpuRegister rt, uint16_t imm16) { [all...] |
/art/disassembler/ |
disassembler_mips.cc | 372 { kITypeMask | (0x1f << 21), 62u << kOpcodeShift, "jialc", "Ti" }, [all...] |
/external/llvm/test/MC/Mips/mips64r6/ |
valid.s | 149 jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0xf8,0x05,0x01,0x00]
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/external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
valid-mips32r6-el.txt | 162 0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
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valid-mips32r6.txt | 189 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
valid-mips64r6-el.txt | 123 0x00 0x01 0x05 0xf8 # CHECK: jialc $5, 256
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valid-mips64r6.txt | 214 0xf8 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/external/llvm/test/MC/Mips/micromips32r6/ |
valid.s | 62 jialc $5, 256 # CHECK: jialc $5, 256 # encoding: [0x80,0x05,0x01,0x00] [all...] |
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
valid.txt | 73 0x80 0x05 0x01 0x00 # CHECK: jialc $5, 256
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/art/runtime/arch/mips/ |
quick_entrypoints_mips.S | [all...] |
/art/runtime/arch/mips64/ |
quick_entrypoints_mips64.S | [all...] |
/toolchain/binutils/binutils-2.27/opcodes/ |
ChangeLog-2014 | 15 JIALC. Remove the operand from NAL. [all...] |