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  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/arm/
ldrd-unpredictable.d 1 # name: Unpredictable LDRD and STRD instructions. - ARM
2 # error-output: ldrd-unpredictable.l
ldrd-unpredictable.s 5 @ LDRD
6 ldrd r0,r1,[r0,r1] @ unpredictable label
7 ldrd r0,r1,[r1,r0] @ ditto label
8 ldrd r0,r1,[r0,r2]! @ ditto label
9 ldrd r0,r1,[r1,r2]! @ ditto label
thumb2_ldstd_unpredictable.d 1 # name: Unpredictable LDRD and STRD instructions. - Thumb-2
thumb2_ldstd_unpredictable.s 10 ldrd r4,r6,[r4, #4]! @ Ditto
11 ldrd r4,r6,[r6, #4]! @ Ditto
12 ldrd r10,r11,[r10], #4 @ Ditto
13 ldrd r10,r11,[r11], #4 @ Ditto
group-reloc-ldrs-encoding-bad.s 27 @ LDRD/STRD/LDRH/STRH/LDRSH/LDRSB only have 8 bits available for the
30 ldrtest ldrd strd f "+ 256"
35 ldrtest ldrd strd f "- 256"
42 ldrtest ldrd strd localsym "+ 256"
47 ldrtest ldrd strd localsym "- 256"
group-reloc-ldrs-parsing-bad.s 7 ldrd r0, [r0, #:pc_g0_nc:(f)]
8 ldrd r0, [r0, #:pc_g1_nc:(f)]
9 ldrd r0, [r0, #:sb_g0_nc:(f)]
10 ldrd r0, [r0, #:sb_g1_nc:(f)]
38 ldrd r0, [r0, #:foo:(f)]
group-reloc-ldrs.s 27 @ LDRD/STRD/LDRH/STRH/LDRSH/LDRSB only have 8 bits available for the
30 ldrtest ldrd strd f "+ 255"
35 ldrtest ldrd strd f "- 255"
42 ldrtest ldrd strd localsym "+ 255"
47 ldrtest ldrd strd localsym "- 255"
sp-pc-validations-bad-t.s 78 @ LDRD (immediate)
79 ldrd pc, r0, [r1] @ BadReg label
80 ldrd sp, r0, [r1] @ ditto label
81 ldrd r12, [r1] @ ditto label
82 ldrd r14, [r1] @ ditto label
83 ldrd r0, pc, [r1] @ ditto label
84 ldrd r0, sp, [r1] @ ditto label
85 ldrd pc, r0, [r1], #4 @ ditto label
86 ldrd sp, r0, [r1], #4 @ ditto label
87 ldrd r0, pc, [r1], #4 @ ditt label
88 ldrd r0, sp, [r1], #4 @ ditto label
89 ldrd r12, [r1], #4 @ ditto label
90 ldrd r14, [r1], #4 @ ditto label
91 ldrd pc, r0, [r1, #4]! @ ditto label
92 ldrd sp, r0, [r1, #4]! @ ditto label
93 ldrd r0, pc, [r1, #4]! @ ditto label
94 ldrd r0, sp, [r1, #4]! @ ditto label
95 ldrd r12, [r1, #4]! @ ditto label
96 ldrd r14, [r1, #4]! @ ditto label
99 ldrd pc, r0, label @ BadReg label
100 ldrd sp, r0, label @ ditto label
101 ldrd r0, pc, label @ ditto label
102 ldrd r0, sp, label @ ditto label
103 ldrd pc, r0, [pc, #-0] @ ditto label
104 ldrd sp, r0, [pc, #-0] @ ditto label
105 ldrd r0, pc, [pc, #-0] @ ditto label
106 ldrd r0, sp, [pc, #-0] @ ditto label
    [all...]
  /external/llvm/test/MC/ARM/
arm-ldrd.s 5 ldrd r1, r2, [pc, #0] label
6 ldrd r1, r2, [r3, #4] label
7 ldrd r1, r2, [r3], #4 label
8 ldrd r1, r2, [r3, #4]! label
9 ldrd r1, r2, [r3, -r4]! label
10 ldrd r1, r2, [r3, r4] label
11 ldrd r1, r2, [r3], r4 label
20 ldrd r0, r3, [pc, #0] label
21 ldrd r0, r3, [r4, #4] label
22 ldrd r0, r3, [r4], # label
23 ldrd r0, r3, [r4, #4]! label
24 ldrd r0, r3, [r4, -r5]! label
25 ldrd r0, r3, [r4, r5] label
26 ldrd r0, r3, [r4], r5 label
35 ldrd lr, pc, [pc, #0] label
36 ldrd lr, pc, [r3, #4] label
37 ldrd lr, pc, [r3], #4 label
38 ldrd lr, pc, [r3, #4]! label
39 ldrd lr, pc, [r3, -r4]! label
40 ldrd lr, pc, [r3, r4] label
41 ldrd lr, pc, [r3], r4 label
50 ldrd r0, r1, [r0], #4 label
51 ldrd r0, r1, [r1], #4 label
52 ldrd r0, r1, [r0, #4]! label
53 ldrd r0, r1, [r1, #4]! label
    [all...]
thumb2-ldrd.s 6 ldrd r0, r0, [pc, #0] label
7 ldrd r0, r0, [r1, #4] label
8 ldrd r0, r0, [r1], #4 label
9 ldrd r0, r0, [r1, #4]! label
invalid-vector-index.s 3 ldrd r6, r7 [r2, #15] label
ldrd-strd-gnu-arm-bad-imm.s 4 @ CHECK: ldrd r0, [r0, #512]
5 ldrd r0, [r0, #512]
ldrd-strd-gnu-sp.s 5 // CHECK: ldrd r12, sp, [r0, #32] @ encoding: [0xd0,0xc2,0xc0,0xe1]
6 ldrd r12, [r0, #32]
ldrd-strd-gnu-thumb-bad-regs.s 5 @ CHECK: ldrd r12, [r0, #512]
6 ldrd r12, [r0, #512]
ldrd-strd-gnu-arm.s 8 @ CHECK: ldrd r0, r1, [r10, #32]! @ encoding: [0xd0,0x02,0xea,0xe1]
9 @ CHECK: ldrd r0, r1, [r10], #32 @ encoding: [0xd0,0x02,0xca,0xe0]
10 @ CHECK: ldrd r0, r1, [r10, #32] @ encoding: [0xd0,0x02,0xca,0xe1]
11 ldrd r0, [r10, #32]!
12 ldrd r0, [r10], #32
13 ldrd r0, [r10, #32]
ldrd-strd-gnu-thumb.s 8 @ CHECK: ldrd r0, r1, [r10, #512]! @ encoding: [0xfa,0xe9,0x80,0x01]
9 @ CHECK: ldrd r0, r1, [r10], #512 @ encoding: [0xfa,0xe8,0x80,0x01]
10 @ CHECK: ldrd r0, r1, [r10, #512] @ encoding: [0xda,0xe9,0x80,0x01]
11 ldrd r0, [r10, #512]!
12 ldrd r0, [r10], #512
13 ldrd r0, [r10, #512]
  /toolchain/binutils/binutils-2.27/gas/testsuite/gas/epiphany/
badpostmod.s 4 ldrd r0,[r1],r2 ; tricky because r1 is implied as destination
12 ldrd r12,[r13],-256 ; ERROR
addr-syntax.s 8 ldrd r10,[r12]
addr-syntax.d 14 c: 506c 2400 ldrd r10,\[r12,\+0x0\]
  /external/llvm/test/CodeGen/ARM/
gpr-paired-spill.ll 1 ; RUN: llc -mtriple=armv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITH-LDRD
2 ; RUN: llc -mtriple=armv4-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITHOUT-LDRD
3 ; RUN: llc -mtriple=thumbv7-none-linux-gnueabi -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK-WITH-LDRD
19 ; CHECK-WITH-LDRD: strd {{r[0-9]+}}, {{r[0-9]+}}, [sp, #8]
20 ; CHECK-WITH-LDRD: strd {{r[0-9]+}}, {{r[0-9]+}}, [sp]
22 ; CHECK-WITH-LDRD: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp, #8]
23 ; CHECK-WITH-LDRD: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp]
27 ; CHECK-WITHOUT-LDRD: add [[ADDRREG:[a-z0-9]+]], sp, #{{[0-9]+}
    [all...]
ldrd.ll 21 ; A8: ldrd r0, r1, [r0]
22 ; Cortex-M3 errata 602117: LDRD with base in list may result in incorrect base
24 ; M3-NOT: ldrd r[[REGNUM:[0-9]+]], {{r[0-9]+}}, [r[[REGNUM]]]
25 ; CONSERVATIVE-NOT: ldrd
36 ; able to generate an LDRD pair here, but this is highly sensitive to
40 ; R0/R1/R2 live as the three arguments, forcing the LDRD's odd
41 ; destination into R3. We then sensibly split LDRD again rather then
47 ; BASIC: ldrd
50 ; GREEDY: ldrd
86 ; A8: ldrd [[FIELD1:r[0-9]+]], [[FIELD2:r[0-9]+]], {{\[}}[[BASE]], #4
    [all...]
  /toolchain/binutils/binutils-2.27/ld/testsuite/ld-arm/
group-relocs-ldrs-bad-2.s 10 ldrd r2, [r0, #:pc_g1:(bar + 4)]
group-relocs-ldrs-bad.s 10 ldrd r2, [r0, #:sb_g1:(bar)]
  /external/llvm/test/CodeGen/Thumb2/
thumb2-ldrd.ll 7 ; CHECK: ldrd
  /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
thumb2-ldrd.ll 7 ;CHECK: ldrd r2, r3, [r2]

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