| /toolchain/binutils/binutils-2.27/gas/testsuite/gas/aarch64/ |
| ldst-exclusive.d | 8 0: 080f7ce1 stxrb w15, w1, \[x7\]
9 4: 080f7ce1 stxrb w15, w1, \[x7\]
10 8: 080f7ce1 stxrb w15, w1, \[x7\]
|
| ldst-exclusive.s | 95 .irp op, stxrb, stxrh, stxr
|
| illegal.s | 73 stxrb x2, w1, [sp]
|
| /prebuilts/go/darwin-x86/src/cmd/internal/obj/arm64/ |
| anames.go | 184 "STXRB",
|
| /prebuilts/go/linux-x86/src/cmd/internal/obj/arm64/ |
| anames.go | 184 "STXRB",
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrAtomics.td | 293 (STXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
302 (STXRB GPR32:$val, GPR64sp:$addr)>;
309 (STXRB (EXTRACT_SUBREG GPR64:$val, sub_32), GPR64sp:$addr)>;
|
| /external/llvm/test/CodeGen/AArch64/ |
| atomic-ops.ll | 107 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
347 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
426 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], w0, [x[[ADDR]]]
508 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
703 ; CHECK-NEXT: stxrb [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
894 ; CHECK: stxrb [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x[[ADDR]]]
[all...] |
| arm64-ldxr-stxr.ll | 97 ; CHECK: stxrb w0, w1, [x2]
|
| /external/vixl/ |
| README.md | 124 `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
|
| /prebuilts/go/darwin-x86/src/cmd/asm/internal/asm/testdata/ |
| arm64enc.s | 350 STXRB R7, (R9), R24 // 277d1808
|
| /prebuilts/go/darwin-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| plan9x.go | 221 case STLXRB, STLXRH, STXRB, STXRH:
|
| tables.go | 379 STXRB
848 STXRB: "STXRB",
[all...] |
| /prebuilts/go/linux-x86/src/cmd/asm/internal/asm/testdata/ |
| arm64enc.s | 350 STXRB R7, (R9), R24 // 277d1808
|
| /prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| plan9x.go | 221 case STLXRB, STLXRH, STXRB, STXRH:
|
| tables.go | 379 STXRB
848 STXRB: "STXRB",
[all...] |
| /external/llvm/test/MC/AArch64/ |
| arm64-memory.s | 470 stxrb w1, w4, [x3]
477 ; CHECK: stxrb w1, w4, [x3] ; encoding: [0x64,0x7c,0x01,0x08]
|
| /external/valgrind/memcheck/tests/ |
| atomic_incs.c | 127 "stxrb w4, w8, [x9]" "\n\t"
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| arm64-memory.txt | 458 # CHECK: stxrb w1, w4, [x3]
|
| /prebuilts/vndk/v27/x86/arch-x86-x86/shared/vndk-core/ |
| libvixl-arm64.so | |
| /prebuilts/vndk/v27/x86_64/arch-x86-x86_64/shared/vndk-core/ |
| libvixl-arm64.so | |
| /toolchain/binutils/binutils-2.27/opcodes/ |
| aarch64-asm.c | 489 /* Encode the address operand for e.g. STXRB <Ws>, <Wt>, [<Xn|SP>{,#0}]. */
[all...] |
| /external/vixl/doc/aarch64/ |
| supported-instructions-aarch64.md | 1202 ### STXRB ###
1206 void stxrb(const Register& rs, const Register& rt, const MemOperand& dst)
[all...] |
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.h | [all...] |
| /external/vixl/test/aarch64/ |
| test-disasm-aarch64.cc | [all...] |
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | [all...] |
