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      1 /*
      2  * Copyright (C) 2011 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 
     17 #include "context_mips.h"
     18 
     19 #include "base/bit_utils.h"
     20 #include "base/bit_utils_iterator.h"
     21 #include "quick/quick_method_frame_info.h"
     22 
     23 namespace art {
     24 namespace mips {
     25 
     26 static constexpr uint32_t gZero = 0;
     27 
     28 void MipsContext::Reset() {
     29   std::fill_n(gprs_, arraysize(gprs_), nullptr);
     30   std::fill_n(fprs_, arraysize(fprs_), nullptr);
     31   gprs_[SP] = &sp_;
     32   gprs_[T9] = &t9_;
     33   gprs_[A0] = &arg0_;
     34   // Initialize registers with easy to spot debug values.
     35   sp_ = MipsContext::kBadGprBase + SP;
     36   t9_ = MipsContext::kBadGprBase + T9;
     37   arg0_ = 0;
     38 }
     39 
     40 void MipsContext::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) {
     41   int spill_pos = 0;
     42 
     43   // Core registers come first, from the highest down to the lowest.
     44   for (uint32_t core_reg : HighToLowBits(frame_info.CoreSpillMask())) {
     45     // If the $ZERO register shows up in the list of registers to
     46     // be saved this was only done to properly align the floating
     47     // point register save locations to addresses which are
     48     // multiples of 8. We only store the address of a register in
     49     // gprs_ if the register is not the $ZERO register.  The $ZERO
     50     // register is read-only so there's never a reason to save it
     51     // on the stack.
     52     if (core_reg != 0u) {
     53       gprs_[core_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes());
     54     }
     55     ++spill_pos;
     56   }
     57   DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()));
     58 
     59   // FP registers come second, from the highest down to the lowest.
     60   for (uint32_t fp_reg : HighToLowBits(frame_info.FpSpillMask())) {
     61     fprs_[fp_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes());
     62     ++spill_pos;
     63   }
     64   DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask()));
     65 }
     66 
     67 void MipsContext::SetGPR(uint32_t reg, uintptr_t value) {
     68   CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCoreRegisters));
     69   DCHECK(IsAccessibleGPR(reg));
     70   CHECK_NE(gprs_[reg], &gZero);  // Can't overwrite this static value since they are never reset.
     71   *gprs_[reg] = value;
     72 }
     73 
     74 void MipsContext::SetFPR(uint32_t reg, uintptr_t value) {
     75   CHECK_LT(reg, static_cast<uint32_t>(kNumberOfFRegisters));
     76   DCHECK(IsAccessibleFPR(reg));
     77   CHECK_NE(fprs_[reg], &gZero);  // Can't overwrite this static value since they are never reset.
     78   *fprs_[reg] = value;
     79 }
     80 
     81 void MipsContext::SmashCallerSaves() {
     82   // This needs to be 0 because we want a null/zero return value.
     83   gprs_[V0] = const_cast<uint32_t*>(&gZero);
     84   gprs_[V1] = const_cast<uint32_t*>(&gZero);
     85   gprs_[A1] = nullptr;
     86   gprs_[A2] = nullptr;
     87   gprs_[A3] = nullptr;
     88   gprs_[T0] = nullptr;
     89   gprs_[T1] = nullptr;
     90 
     91   fprs_[F8] = nullptr;
     92   fprs_[F9] = nullptr;
     93   fprs_[F10] = nullptr;
     94   fprs_[F11] = nullptr;
     95   fprs_[F12] = nullptr;
     96   fprs_[F13] = nullptr;
     97   fprs_[F14] = nullptr;
     98   fprs_[F15] = nullptr;
     99   fprs_[F16] = nullptr;
    100   fprs_[F17] = nullptr;
    101   fprs_[F18] = nullptr;
    102   fprs_[F19] = nullptr;
    103 }
    104 
    105 extern "C" NO_RETURN void art_quick_do_long_jump(uint32_t*, uint32_t*);
    106 
    107 void MipsContext::DoLongJump() {
    108   uintptr_t gprs[kNumberOfCoreRegisters];
    109   // Align fprs[] so that art_quick_do_long_jump() can load FPU
    110   // registers from it using the ldc1 instruction.
    111   uint32_t fprs[kNumberOfFRegisters] __attribute__((aligned(8)));
    112   for (size_t i = 0; i < kNumberOfCoreRegisters; ++i) {
    113     gprs[i] = gprs_[i] != nullptr ? *gprs_[i] : MipsContext::kBadGprBase + i;
    114   }
    115   for (size_t i = 0; i < kNumberOfFRegisters; ++i) {
    116     fprs[i] = fprs_[i] != nullptr ? *fprs_[i] : MipsContext::kBadFprBase + i;
    117   }
    118   art_quick_do_long_jump(gprs, fprs);
    119 }
    120 
    121 }  // namespace mips
    122 }  // namespace art
    123