1 /* 2 * Copyright (C) 2011 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_ 18 #define ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_ 19 20 #include <android-base/logging.h> 21 22 #include "arch/context.h" 23 #include "base/macros.h" 24 #include "registers_x86.h" 25 26 namespace art { 27 namespace x86 { 28 29 class X86Context FINAL : public Context { 30 public: 31 X86Context() { 32 Reset(); 33 } 34 virtual ~X86Context() {} 35 36 void Reset() OVERRIDE; 37 38 void FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& fr) OVERRIDE; 39 40 void SetSP(uintptr_t new_sp) OVERRIDE { 41 SetGPR(ESP, new_sp); 42 } 43 44 void SetPC(uintptr_t new_pc) OVERRIDE { 45 eip_ = new_pc; 46 } 47 48 void SetArg0(uintptr_t new_arg0_value) OVERRIDE { 49 SetGPR(EAX, new_arg0_value); 50 } 51 52 bool IsAccessibleGPR(uint32_t reg) OVERRIDE { 53 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); 54 return gprs_[reg] != nullptr; 55 } 56 57 uintptr_t* GetGPRAddress(uint32_t reg) OVERRIDE { 58 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); 59 return gprs_[reg]; 60 } 61 62 uintptr_t GetGPR(uint32_t reg) OVERRIDE { 63 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); 64 DCHECK(IsAccessibleGPR(reg)); 65 return *gprs_[reg]; 66 } 67 68 void SetGPR(uint32_t reg, uintptr_t value) OVERRIDE; 69 70 bool IsAccessibleFPR(uint32_t reg) OVERRIDE { 71 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters)); 72 return fprs_[reg] != nullptr; 73 } 74 75 uintptr_t GetFPR(uint32_t reg) OVERRIDE { 76 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfFloatRegisters)); 77 DCHECK(IsAccessibleFPR(reg)); 78 return *fprs_[reg]; 79 } 80 81 void SetFPR(uint32_t reg, uintptr_t value) OVERRIDE; 82 83 void SmashCallerSaves() OVERRIDE; 84 NO_RETURN void DoLongJump() OVERRIDE; 85 86 private: 87 // Pretend XMM registers are made of uin32_t pieces, because they are manipulated 88 // in uint32_t chunks. 89 enum { 90 XMM0_0 = 0, XMM0_1, 91 XMM1_0, XMM1_1, 92 XMM2_0, XMM2_1, 93 XMM3_0, XMM3_1, 94 XMM4_0, XMM4_1, 95 XMM5_0, XMM5_1, 96 XMM6_0, XMM6_1, 97 XMM7_0, XMM7_1, 98 kNumberOfFloatRegisters}; 99 100 // Pointers to register locations. Values are initialized to null or the special registers below. 101 uintptr_t* gprs_[kNumberOfCpuRegisters]; 102 uint32_t* fprs_[kNumberOfFloatRegisters]; 103 // Hold values for esp, eip and arg0 if they are not located within a stack frame. EIP is somewhat 104 // special in that it cannot be encoded normally as a register operand to an instruction (except 105 // in 64bit addressing modes). 106 uintptr_t esp_, eip_, arg0_; 107 }; 108 } // namespace x86 109 } // namespace art 110 111 #endif // ART_RUNTIME_ARCH_X86_CONTEXT_X86_H_ 112
