Home | History | Annotate | Download | only in aarch64 
      1 /*
      2  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
      3  *
      4  * SPDX-License-Identifier: BSD-3-Clause
      5  */
      6 
      7 #include <arch_helpers.h>
      8 #include <arm_gic.h>
      9 #include <assert.h>
     10 #include <bl_common.h>
     11 #include <debug.h>
     12 #include <mmio.h>
     13 #include <platform.h>
     14 #include <platform_def.h>
     15 #include <xlat_tables.h>
     16 
     17 #include "../hikey_def.h"
     18 
     19 #define MAP_DDR		MAP_REGION_FLAT(DDR_BASE,			\
     20 					DDR_SIZE,			\
     21 					MT_DEVICE | MT_RW | MT_NS)
     22 
     23 #define MAP_DEVICE	MAP_REGION_FLAT(DEVICE_BASE,			\
     24 					DEVICE_SIZE,			\
     25 					MT_DEVICE | MT_RW | MT_SECURE)
     26 
     27 #define MAP_TSP_MEM	MAP_REGION_FLAT(TSP_SEC_MEM_BASE,		\
     28 					TSP_SEC_MEM_SIZE,		\
     29 					MT_MEMORY | MT_RW | MT_SECURE)
     30 
     31 #if LOAD_IMAGE_V2
     32 #ifdef SPD_opteed
     33 #define MAP_OPTEE_PAGEABLE	MAP_REGION_FLAT(		\
     34 					HIKEY_OPTEE_PAGEABLE_LOAD_BASE,	\
     35 					HIKEY_OPTEE_PAGEABLE_LOAD_SIZE,	\
     36 					MT_MEMORY | MT_RW | MT_SECURE)
     37 #endif
     38 #endif
     39 
     40 #define MAP_ROM_PARAM	MAP_REGION_FLAT(XG2RAM0_BASE,			\
     41 					BL1_XG2RAM0_OFFSET,		\
     42 					MT_DEVICE | MT_RO | MT_SECURE)
     43 
     44 #define MAP_SRAM	MAP_REGION_FLAT(SRAM_BASE,			\
     45 					SRAM_SIZE,			\
     46 					MT_DEVICE | MT_RW | MT_SECURE)
     47 
     48 /*
     49  * BL1 needs to access the areas of MMC_SRAM.
     50  * BL1 loads BL2 from eMMC into SRAM before DDR initialized.
     51  */
     52 #define MAP_MMC_SRAM	MAP_REGION_FLAT(HIKEY_BL1_MMC_DESC_BASE,	\
     53 					HIKEY_BL1_MMC_DESC_SIZE +	\
     54 					HIKEY_BL1_MMC_DATA_SIZE,	\
     55 					MT_DEVICE | MT_RW | MT_SECURE)
     56 
     57 /*
     58  * Table of regions for different BL stages to map using the MMU.
     59  * This doesn't include Trusted RAM as the 'mem_layout' argument passed to
     60  * hikey_init_mmu_elx() will give the available subset of that,
     61  */
     62 #ifdef IMAGE_BL1
     63 static const mmap_region_t hikey_mmap[] = {
     64 	MAP_DEVICE,
     65 	MAP_ROM_PARAM,
     66 	MAP_MMC_SRAM,
     67 	{0}
     68 };
     69 #endif
     70 
     71 #ifdef IMAGE_BL2
     72 static const mmap_region_t hikey_mmap[] = {
     73 	MAP_DDR,
     74 	MAP_DEVICE,
     75 	MAP_TSP_MEM,
     76 #if LOAD_IMAGE_V2
     77 #ifdef SPD_opteed
     78 	MAP_OPTEE_PAGEABLE,
     79 #endif
     80 #endif
     81 	{0}
     82 };
     83 #endif
     84 
     85 #ifdef IMAGE_BL31
     86 static const mmap_region_t hikey_mmap[] = {
     87 	MAP_DEVICE,
     88 	MAP_SRAM,
     89 	MAP_TSP_MEM,
     90 	{0}
     91 };
     92 #endif
     93 
     94 #ifdef IMAGE_BL32
     95 static const mmap_region_t hikey_mmap[] = {
     96 	MAP_DEVICE,
     97 	MAP_DDR,
     98 	{0}
     99 };
    100 #endif
    101 
    102 /*
    103  * Macro generating the code for the function setting up the pagetables as per
    104  * the platform memory map & initialize the mmu, for the given exception level
    105  */
    106 #define HIKEY_CONFIGURE_MMU_EL(_el)				\
    107 	void hikey_init_mmu_el##_el(unsigned long total_base,	\
    108 				  unsigned long total_size,	\
    109 				  unsigned long ro_start,	\
    110 				  unsigned long ro_limit,	\
    111 				  unsigned long coh_start,	\
    112 				  unsigned long coh_limit)	\
    113 	{							\
    114 	       mmap_add_region(total_base, total_base,		\
    115 			       total_size,			\
    116 			       MT_MEMORY | MT_RW | MT_SECURE);	\
    117 	       mmap_add_region(ro_start, ro_start,		\
    118 			       ro_limit - ro_start,		\
    119 			       MT_MEMORY | MT_RO | MT_SECURE);	\
    120 	       mmap_add_region(coh_start, coh_start,		\
    121 			       coh_limit - coh_start,		\
    122 			       MT_DEVICE | MT_RW | MT_SECURE);	\
    123 	       mmap_add(hikey_mmap);				\
    124 	       init_xlat_tables();				\
    125 								\
    126 	       enable_mmu_el##_el(0);				\
    127 	}
    128 
    129 /* Define EL1 and EL3 variants of the function initialising the MMU */
    130 HIKEY_CONFIGURE_MMU_EL(1)
    131 HIKEY_CONFIGURE_MMU_EL(3)
    132 
    133 unsigned long plat_get_ns_image_entrypoint(void)
    134 {
    135 	return HIKEY_NS_IMAGE_OFFSET;
    136 }
    137 
    138 unsigned int plat_get_syscnt_freq2(void)
    139 {
    140 	return 1200000;
    141 }
    142