1 /* 2 * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <debug.h> 8 #include <platform_def.h> 9 #include <xlat_tables_v2.h> 10 11 #define UNIPHIER_OCM_REGION_BASE 0x30000000 12 #define UNIPHIER_OCM_REGION_SIZE 0x00040000 13 14 #define UNIPHIER_REG_REGION_BASE 0x50000000 15 #define UNIPHIER_REG_REGION_SIZE 0x20000000 16 17 void uniphier_mmap_setup(uintptr_t total_base, size_t total_size, 18 const struct mmap_region *mmap) 19 { 20 VERBOSE("Trusted RAM seen by this BL image: %p - %p\n", 21 (void *)total_base, (void *)(total_base + total_size)); 22 mmap_add_region(total_base, total_base, 23 total_size, 24 MT_MEMORY | MT_RW | MT_SECURE); 25 26 /* remap the code section */ 27 VERBOSE("Code region: %p - %p\n", 28 (void *)BL_CODE_BASE, (void *)BL_CODE_END); 29 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 30 round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE, 31 MT_CODE | MT_SECURE); 32 33 /* remap the coherent memory region */ 34 VERBOSE("Coherent region: %p - %p\n", 35 (void *)BL_COHERENT_RAM_BASE, (void *)BL_COHERENT_RAM_END); 36 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, 37 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 38 MT_DEVICE | MT_RW | MT_SECURE); 39 40 /* 41 * on-chip SRAM region: should be DEVICE attribute because the USB 42 * load functions provided by the ROM use this memory region as a work 43 * area, but do not cater to cache coherency. 44 */ 45 mmap_add_region(UNIPHIER_OCM_REGION_BASE, UNIPHIER_OCM_REGION_BASE, 46 UNIPHIER_OCM_REGION_SIZE, 47 MT_DEVICE | MT_RW | MT_SECURE); 48 49 /* register region */ 50 mmap_add_region(UNIPHIER_REG_REGION_BASE, UNIPHIER_REG_REGION_BASE, 51 UNIPHIER_REG_REGION_SIZE, 52 MT_DEVICE | MT_RW | MT_SECURE); 53 54 /* additional regions if needed */ 55 if (mmap) 56 mmap_add(mmap); 57 58 init_xlat_tables(); 59 } 60
