1 ## @file 2 # FDF file of Clanton Peak CRB platform with 32-bit DXE 3 # 4 # This package provides QuarkNcSocId platform specific modules. 5 # Copyright (c) 2013 - 2016 Intel Corporation. 6 # 7 # This program and the accompanying materials 8 # are licensed and made available under the terms and conditions of the BSD License 9 # which accompanies this distribution. The full text of the license may be found at 10 # http://opensource.org/licenses/bsd-license.php 11 # 12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 # 15 ## 16 17 ################################################################################ 18 # 19 # Defines Section - statements that will be processed to create a Makefile. 20 # 21 ################################################################################ 22 [Defines] 23 # Address 0x100000000 (4 GB reset address) 24 # Base Size 25 # +---------------------------+ 26 # FLASH_BASE | FD.Quark: | 0x800000 (8 MB) 27 # 0xFF800000 | BaseAddress | 28 # +---------------------------+ 29 # 30 # Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part. 31 # 0xFF800000 + 0x400000 = 0xFFC00000. 32 # 33 # Address 0x0 (0xFF800000 for 8 MB SPI part) 34 # +---------------------------+ 35 # FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE 36 # 0x00400000 | | 0x00100000 37 # +---------------------------+ 38 # FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE 39 # 0x00500000 | | 0x001E0000 40 # +---------------------------+ 41 # NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE 42 # 0x006E0000 | Variable + FTW Working + | 43 # | FTW Spare | 44 # +---+-------------------+---+ 45 # NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE 46 # | | 47 # +-------------------+ 48 # FTW_WORKING_BASE | | FTW_WORKING_SIZE 49 # | | 50 # +-------------------+ 51 # FTW_SPARE_BASE | | FTW_SPARE_SIZE 52 # | | 53 # +---+-------------------+---+ 54 # RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE 55 # 0x00700000 | | 0x00008000 56 # +---------------------------+ 57 # PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE 58 # 0x00710000 | | 0x00001000 59 # +---------------------------+ 60 # FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE 61 # 0x720000 | | 0x000E0000 62 # +---------------------------+ 63 64 # 65 # Define value used to compute FLASH regions below reset vector location just below 4GB 66 # 67 DEFINE RESET_ADDRESS = 0x100000000 # 4 GB 68 69 # 70 # Set size of FLASH to 8MB 71 # 72 DEFINE FLASH_SIZE = 0x800000 73 DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device 74 75 # 76 # Set FLASH block size to 4KB 77 # 78 DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB 79 80 # 81 # Misc settings 82 # 83 DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks 84 85 # 86 # Start PAYLOAD at 4MB into 8MB FLASH 87 # 88 DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000 89 DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000 90 91 # 92 # Put FVMAIN between PAYLOAD and RMU Binary 93 # 94 DEFINE FLASH_FV_MAIN_BASE = 0x00500000 95 DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000 96 97 # 98 # Place NV Storage just above Platform Data Base 99 # 100 DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000 101 DEFINE NVRAM_AREA_SIZE = 0x00020000 102 103 DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000 104 DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE) 105 DEFINE FTW_WORKING_SIZE = 0x00002000 106 DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE) 107 DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE) 108 109 # 110 # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000) 111 # 112 DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address 113 DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size 114 115 # 116 # Platform Data Base must be 64KB above RMU 117 # 118 DEFINE VPD_BASE = 0x00708000 119 DEFINE VPD_SIZE = 0x00001000 120 121 # 122 # Place FV Recovery above NV Storage 123 # 124 DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000 125 DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE) 126 127 ################################################################################ 128 # 129 # FD Section 130 # The [FD] Section is made up of the definition statements and a 131 # description of what goes into the Flash Device Image. Each FD section 132 # defines one flash "device" image. A flash device image may be one of 133 # the following: Removable media bootable image (like a boot floppy 134 # image,) an Option ROM image (that would be "flashed" into an add-in 135 # card,) a System "Flash" image (that would be burned into a system's 136 # flash) or an Update ("Capsule") image that will be used to update and 137 # existing system flash. 138 # 139 ################################################################################ 140 [FD.Quark] 141 BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE. 142 Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE. 143 ErasePolarity = 1 144 BlockSize = $(FLASH_BLOCKSIZE) 145 NumBlocks = 0x800 #The number of blocks for the Flash Device. 146 147 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE) 148 SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE) 149 150 ################################################################################ 151 # 152 # Following are lists of FD Region layout which correspond to the locations of different 153 # images within the flash device. 154 # 155 # Regions must be defined in ascending order and may not overlap. 156 # 157 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by 158 # the pipe "|" character, followed by the size of the region, also in hex with the leading 159 # "0x" characters. Like: 160 # Offset|Size 161 # PcdOffsetCName|PcdSizeCName 162 # RegionType <FV, DATA, or FILE> 163 # 164 ################################################################################ 165 166 ######################################################## 167 # Quark Payload Image 168 ######################################################## 169 $(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE) 170 gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize 171 FV = PAYLOAD 172 173 ######################################################## 174 # Quark FVMAIN Image (Compressed) 175 ######################################################## 176 $(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE) 177 gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize 178 FV = FVMAIN_COMPACT 179 180 ############################################################################# 181 # Quark NVRAM Area 182 # Quark NVRAM Area contains: Variable + FTW Working + FTW Spare 183 ############################################################################# 184 $(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE) 185 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize 186 #NV_VARIABLE_STORE 187 DATA = { 188 ## This is the EFI_FIRMWARE_VOLUME_HEADER 189 # ZeroVector [] 190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 192 # FileSystemGuid: gEfiSystemNvDataFvGuid = 193 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }} 194 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C, 195 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50, 196 # FvLength: 0x20000 197 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 198 #Signature "_FVH" #Attributes 199 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00, 200 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision 201 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02, 202 #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block 203 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA), 204 #Blockmap[1]: End 205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 206 ## This is the VARIABLE_STORE_HEADER 207 !if $(SECURE_BOOT_ENABLE) 208 # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } } 209 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43, 210 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92, 211 !else 212 # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }} 213 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41, 214 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d, 215 !endif 216 #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8 217 # This can speed up the Variable Dispatch a bit. 218 0xB8, 0xDF, 0x00, 0x00, 219 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32 220 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 221 } 222 223 $(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE) 224 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize 225 #NV_FTW_WORKING 226 DATA = { 227 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid = 228 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }} 229 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49, 230 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95, 231 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved 232 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF, 233 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0 234 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 235 } 236 237 $(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE) 238 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize 239 #NV_FTW_SPARE 240 241 ######################################################### 242 # Quark Remote Management Unit Binary 243 ######################################################### 244 $(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE) 245 INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf 246 247 ######################################################### 248 # PlatformData Binary, default for standalone is none built-in so user selects. 249 ######################################################### 250 $(VPD_BASE)|$(VPD_SIZE) 251 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress 252 FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin 253 254 ####################### 255 # Quark FVRECOVERY Image 256 ####################### 257 $(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE) 258 gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize 259 FV = FVRECOVERY 260 261 ################################################################################ 262 # 263 # FV Section 264 # 265 # [FV] section is used to define what components or modules are placed within a flash 266 # device file. This section also defines order the components and modules are positioned 267 # within the image. The [FV] section consists of define statements, set statements and 268 # module statements. 269 # 270 ################################################################################ 271 [FV.FVRECOVERY] 272 BlockSize = $(FLASH_BLOCKSIZE) 273 FvAlignment = 16 #FV alignment and FV attributes setting. 274 ERASE_POLARITY = 1 275 MEMORY_MAPPED = TRUE 276 STICKY_WRITE = TRUE 277 LOCK_CAP = TRUE 278 LOCK_STATUS = TRUE 279 WRITE_DISABLED_CAP = TRUE 280 WRITE_ENABLED_CAP = TRUE 281 WRITE_STATUS = TRUE 282 WRITE_LOCK_CAP = TRUE 283 WRITE_LOCK_STATUS = TRUE 284 READ_DISABLED_CAP = TRUE 285 READ_ENABLED_CAP = TRUE 286 READ_STATUS = TRUE 287 READ_LOCK_CAP = TRUE 288 READ_LOCK_STATUS = TRUE 289 FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8 290 291 ################################################################################ 292 # 293 # The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image. 294 # Parsing tools will scan the INF file to determine the type of component or module. 295 # The component or module type is used to reference the standard rules 296 # defined elsewhere in the FDF file. 297 # 298 # The format for INF statements is: 299 # INF $(PathAndInfFileName) 300 # 301 ################################################################################ 302 303 ## 304 # PEI Apriori file example, more PEIM module added later. 305 ## 306 APRIORI PEI { 307 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf 308 # PlatformConfigPei should be immediately after Pcd driver. 309 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf 310 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf 311 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf 312 INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf 313 } 314 315 ## 316 # SEC Phase modules 317 ## 318 INF UefiCpuPkg/SecCore/SecCore.inf 319 320 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE) 321 # FMP image decriptor 322 INF RuleOverride = FMP_IMAGE_DESC QuarkPlatformPkg/Feature/Capsule/SystemFirmwareDescriptor/SystemFirmwareDescriptor.inf 323 !endif 324 325 INF MdeModulePkg/Core/Pei/PeiMain.inf 326 327 ## 328 # PEI Phase RAW Data files. 329 ## 330 FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) { 331 SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin 332 } 333 334 INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf 335 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf 336 INF RuleOverride = NORELOC MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf 337 INF RuleOverride = NORELOC MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf 338 INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf 339 INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf 340 INF RuleOverride = NORELOC UefiCpuPkg/CpuMpPei/CpuMpPei.inf 341 INF RuleOverride = NORELOC MdeModulePkg/Universal/CapsulePei/CapsulePei.inf 342 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf 343 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf 344 INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf 345 INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf 346 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf 347 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf 348 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf 349 INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf 350 !if $(MEASURED_BOOT_ENABLE) 351 INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf 352 INF SecurityPkg/Tcg/TcgPei/TcgPei.inf 353 !endif 354 355 !if $(RECOVERY_ENABLE) 356 FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 { 357 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid} 358 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID 359 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS 360 } 361 } 362 !endif 363 364 !if $(RECOVERY_ENABLE) 365 366 ################################################################################ 367 # 368 # FV Section 369 # 370 # [FV] section is used to define what components or modules are placed within a flash 371 # device file. This section also defines order the components and modules are positioned 372 # within the image. The [FV] section consists of define statements, set statements and 373 # module statements. 374 # 375 ################################################################################ 376 [FV.FVRECOVERY_COMPONENTS] 377 BlockSize = $(FLASH_BLOCKSIZE) 378 FvAlignment = 16 #FV alignment and FV attributes setting. 379 ERASE_POLARITY = 1 380 MEMORY_MAPPED = TRUE 381 STICKY_WRITE = TRUE 382 LOCK_CAP = TRUE 383 LOCK_STATUS = TRUE 384 WRITE_DISABLED_CAP = TRUE 385 WRITE_ENABLED_CAP = TRUE 386 WRITE_STATUS = TRUE 387 WRITE_LOCK_CAP = TRUE 388 WRITE_LOCK_STATUS = TRUE 389 READ_DISABLED_CAP = TRUE 390 READ_ENABLED_CAP = TRUE 391 READ_STATUS = TRUE 392 READ_LOCK_CAP = TRUE 393 READ_LOCK_STATUS = TRUE 394 395 INF QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf 396 INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf 397 INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf 398 INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf 399 INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf 400 INF FatPkg/FatPei/FatPei.inf 401 INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf 402 INF SignedCapsulePkg/Universal/RecoveryModuleLoadPei/RecoveryModuleLoadPei.inf 403 404 !endif 405 406 ################################################################################ 407 # 408 # FV Section 409 # 410 # [FV] section is used to define what components or modules are placed within a flash 411 # device file. This section also defines order the components and modules are positioned 412 # within the image. The [FV] section consists of define statements, set statements and 413 # module statements. 414 # 415 ################################################################################ 416 [FV.FVMAIN] 417 BlockSize = $(FLASH_BLOCKSIZE) 418 FvAlignment = 16 419 ERASE_POLARITY = 1 420 MEMORY_MAPPED = TRUE 421 STICKY_WRITE = TRUE 422 LOCK_CAP = TRUE 423 LOCK_STATUS = TRUE 424 WRITE_DISABLED_CAP = TRUE 425 WRITE_ENABLED_CAP = TRUE 426 WRITE_STATUS = TRUE 427 WRITE_LOCK_CAP = TRUE 428 WRITE_LOCK_STATUS = TRUE 429 READ_DISABLED_CAP = TRUE 430 READ_ENABLED_CAP = TRUE 431 READ_STATUS = TRUE 432 READ_LOCK_CAP = TRUE 433 READ_LOCK_STATUS = TRUE 434 FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F 435 436 ## 437 # DXE Phase modules 438 ## 439 INF MdeModulePkg/Core/Dxe/DxeMain.inf 440 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf 441 442 !if $(SOURCE_DEBUG_ENABLE) 443 INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf 444 !endif 445 446 # 447 # Early SoC / Platform modules 448 # 449 INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf 450 451 ## 452 # EDK Core modules 453 ## 454 INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf 455 INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf 456 INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf 457 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf 458 INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf 459 INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf 460 461 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf 462 INF UefiCpuPkg/CpuDxe/CpuDxe.inf 463 INF MdeModulePkg/Universal/Metronome/Metronome.inf 464 INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf 465 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf 466 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf 467 !if $(SECURE_BOOT_ENABLE) 468 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf 469 !endif 470 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf 471 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf 472 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf 473 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf 474 INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf 475 INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf 476 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf 477 INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf 478 479 # 480 # Platform 481 # 482 INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf 483 INF MdeModulePkg/Application/UiApp/UiApp.inf 484 485 INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf 486 INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf 487 INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf 488 INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf 489 INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf 490 INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf 491 INF QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf 492 INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf 493 INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf 494 INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf 495 496 # 497 # ACPI 498 # 499 INF QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf 500 INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf 501 #INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf 502 INF QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf 503 INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf 504 INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf 505 INF QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf 506 INF RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf 507 508 # 509 # SMM 510 # 511 INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf 512 INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf 513 INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf 514 INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf 515 INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf 516 INF QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf 517 INF QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf 518 INF QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf 519 INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf 520 INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf 521 522 # 523 # SMBIOS 524 # 525 INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf 526 INF QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf 527 INF QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf 528 529 # 530 # PCI 531 # 532 INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf 533 INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf 534 INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf 535 !if $(SOURCE_DEBUG_ENABLE) 536 !else 537 INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf 538 !endif 539 540 # 541 # USB 542 # 543 !if $(PERFORMANCE_ENABLE) 544 !else 545 INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf 546 INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf 547 INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf 548 INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf 549 INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf 550 INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf 551 !endif 552 553 # 554 # SDIO 555 # 556 !if $(PERFORMANCE_ENABLE) 557 !else 558 INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf 559 INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf 560 !endif 561 562 # 563 # Console 564 # 565 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf 566 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf 567 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf 568 569 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf 570 INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf 571 INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf 572 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf 573 574 # 575 # File System Modules 576 # 577 !if $(PERFORMANCE_ENABLE) 578 INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf 579 !else 580 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf 581 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf 582 INF FatPkg/EnhancedFatDxe/Fat.inf 583 !endif 584 585 # 586 # Trusted Platform Module 587 # 588 !if $(MEASURED_BOOT_ENABLE) 589 INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf 590 INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf 591 INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf 592 !endif 593 594 !if $(CAPSULE_ENABLE) 595 INF MdeModulePkg/Universal/EsrtDxe/EsrtDxe.inf 596 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareReportDxe.inf 597 !endif 598 599 !if $(RECOVERY_ENABLE) 600 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiRsa2048Sha256TestPublicKeyFileGuid) { 601 SECTION RAW = BaseTools/Source/Python/Rsa2048Sha256Sign/TestSigningPublicKey.bin 602 SECTION UI = "Rsa2048Sha256TestSigningPublicKey" 603 } 604 !endif 605 606 !if $(CAPSULE_ENABLE) 607 FILE FREEFORM = PCD(gEfiSignedCapsulePkgTokenSpaceGuid.PcdEdkiiPkcs7TestPublicKeyFileGuid) { 608 SECTION RAW = BaseTools/Source/Python/Pkcs7Sign/TestRoot.cer 609 SECTION UI = "Pkcs7TestRoot" 610 } 611 !endif 612 613 ################################################################################ 614 # 615 # FV Section 616 # 617 # [FV] section is used to define what components or modules are placed within a flash 618 # device file. This section also defines order the components and modules are positioned 619 # within the image. The [FV] section consists of define statements, set statements and 620 # module statements. 621 # 622 ################################################################################ 623 [FV.FVMAIN_COMPACT] 624 FvAlignment = 16 625 ERASE_POLARITY = 1 626 MEMORY_MAPPED = TRUE 627 STICKY_WRITE = TRUE 628 LOCK_CAP = TRUE 629 LOCK_STATUS = TRUE 630 WRITE_DISABLED_CAP = TRUE 631 WRITE_ENABLED_CAP = TRUE 632 WRITE_STATUS = TRUE 633 WRITE_LOCK_CAP = TRUE 634 WRITE_LOCK_STATUS = TRUE 635 READ_DISABLED_CAP = TRUE 636 READ_ENABLED_CAP = TRUE 637 READ_STATUS = TRUE 638 READ_LOCK_CAP = TRUE 639 READ_LOCK_STATUS = TRUE 640 641 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { 642 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID 643 SECTION FV_IMAGE = FVMAIN 644 } 645 } 646 647 ################################################################################ 648 # 649 # FV Section 650 # 651 # [FV] section is used to define what components or modules are placed within a flash 652 # device file. This section also defines order the components and modules are positioned 653 # within the image. The [FV] section consists of define statements, set statements and 654 # module statements. 655 # 656 ################################################################################ 657 [FV.PAYLOAD] 658 BlockSize = $(FLASH_BLOCKSIZE) 659 FvAlignment = 16 #FV alignment and FV attributes setting. 660 ERASE_POLARITY = 1 661 MEMORY_MAPPED = TRUE 662 STICKY_WRITE = TRUE 663 LOCK_CAP = TRUE 664 LOCK_STATUS = TRUE 665 WRITE_DISABLED_CAP = TRUE 666 WRITE_ENABLED_CAP = TRUE 667 WRITE_STATUS = TRUE 668 WRITE_LOCK_CAP = TRUE 669 WRITE_LOCK_STATUS = TRUE 670 READ_DISABLED_CAP = TRUE 671 READ_ENABLED_CAP = TRUE 672 READ_STATUS = TRUE 673 READ_LOCK_CAP = TRUE 674 READ_LOCK_STATUS = TRUE 675 676 # 677 # Shell and Applications 678 # 679 INF RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf 680 !if $(PERFORMANCE_ENABLE) 681 INF RuleOverride = TIANOCOMPRESSED PerformancePkg/Dp_App/Dp.inf 682 !endif 683 684 !if $(CAPSULE_ENABLE) || $(RECOVERY_ENABLE) 685 686 [FV.CapsuleDispatchFv] 687 FvAlignment = 16 688 ERASE_POLARITY = 1 689 MEMORY_MAPPED = TRUE 690 STICKY_WRITE = TRUE 691 LOCK_CAP = TRUE 692 LOCK_STATUS = TRUE 693 WRITE_DISABLED_CAP = TRUE 694 WRITE_ENABLED_CAP = TRUE 695 WRITE_STATUS = TRUE 696 WRITE_LOCK_CAP = TRUE 697 WRITE_LOCK_STATUS = TRUE 698 READ_DISABLED_CAP = TRUE 699 READ_ENABLED_CAP = TRUE 700 READ_STATUS = TRUE 701 READ_LOCK_CAP = TRUE 702 READ_LOCK_STATUS = TRUE 703 704 !if $(CAPSULE_ENABLE) 705 INF SignedCapsulePkg/Universal/SystemFirmwareUpdate/SystemFirmwareUpdateDxe.inf 706 !endif 707 708 [FV.SystemFirmwareUpdateCargo] 709 FvAlignment = 16 710 ERASE_POLARITY = 1 711 MEMORY_MAPPED = TRUE 712 STICKY_WRITE = TRUE 713 LOCK_CAP = TRUE 714 LOCK_STATUS = TRUE 715 WRITE_DISABLED_CAP = TRUE 716 WRITE_ENABLED_CAP = TRUE 717 WRITE_STATUS = TRUE 718 WRITE_LOCK_CAP = TRUE 719 WRITE_LOCK_STATUS = TRUE 720 READ_DISABLED_CAP = TRUE 721 READ_ENABLED_CAP = TRUE 722 READ_STATUS = TRUE 723 READ_LOCK_CAP = TRUE 724 READ_LOCK_STATUS = TRUE 725 726 FILE RAW = 14D83A59-A810-4556-8192-1C0A593C065C { # PcdEdkiiSystemFirmwareFileGuid 727 FD = Quark 728 } 729 730 FILE RAW = ce57b167-b0e4-41e8-a897-5f4feb781d40 { # gEdkiiSystemFmpCapsuleDriverFvFileGuid 731 FV = CapsuleDispatchFv 732 } 733 734 FILE RAW = 812136D3-4D3A-433A-9418-29BB9BF78F6E { # gEdkiiSystemFmpCapsuleConfigFileGuid 735 QuarkPlatformPkg/Feature/Capsule/SystemFirmwareUpdateConfig/SystemFirmwareUpdateConfig.ini 736 } 737 738 !endif 739 740 !if $(CAPSULE_ENABLE) 741 [FmpPayload.FmpPayloadSystemFirmwarePkcs7] 742 IMAGE_HEADER_INIT_VERSION = 0x02 743 IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid 744 IMAGE_INDEX = 0x1 745 HARDWARE_INSTANCE = 0x0 746 MONOTONIC_COUNT = 0x2 747 CERTIFICATE_GUID = 4AAFD29D-68DF-49EE-8AA9-347D375665A7 # PKCS7 748 749 FV = SystemFirmwareUpdateCargo 750 751 [Capsule.QuarkFirmwareUpdateCapsuleFmpPkcs7] 752 CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid 753 CAPSULE_FLAGS = PersistAcrossReset,InitiateReset 754 CAPSULE_HEADER_SIZE = 0x20 755 CAPSULE_HEADER_INIT_VERSION = 0x1 756 757 FMP_PAYLOAD = FmpPayloadSystemFirmwarePkcs7 758 !endif 759 760 !if $(RECOVERY_ENABLE) 761 [FmpPayload.FmpPayloadSystemFirmwareRsa2048] 762 IMAGE_HEADER_INIT_VERSION = 0x02 763 IMAGE_TYPE_ID = 62af20c0-7016-424a-9bf8-9ccc86584090 # PcdSystemFmpCapsuleImageTypeIdGuid 764 IMAGE_INDEX = 0x1 765 HARDWARE_INSTANCE = 0x0 766 MONOTONIC_COUNT = 0x2 767 CERTIFICATE_GUID = A7717414-C616-4977-9420-844712A735BF # RSA2048SHA256 768 769 FV = SystemFirmwareUpdateCargo 770 771 [Capsule.QuarkRec] 772 CAPSULE_GUID = 6dcbd5ed-e82d-4c44-bda1-7194199ad92a # gEfiFmpCapsuleGuid 773 CAPSULE_FLAGS = PersistAcrossReset,InitiateReset 774 CAPSULE_HEADER_SIZE = 0x20 775 CAPSULE_HEADER_INIT_VERSION = 0x1 776 777 FMP_PAYLOAD = FmpPayloadSystemFirmwareRsa2048 778 !endif 779 780 ################################################################################ 781 # 782 # Rules are use with the [FV] section's module INF type to define 783 # how an FFS file is created for a given INF file. The following Rule are the default 784 # rules for the different module type. User can add the customized rules to define the 785 # content of the FFS file. 786 # 787 ################################################################################ 788 [Rule.Common.SEC] 789 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { 790 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi 791 RAW BIN Align = 16 |.com 792 } 793 794 [Rule.Common.PEI_CORE] 795 FILE PEI_CORE = $(NAMED_GUID) { 796 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi 797 UI STRING="$(MODULE_NAME)" Optional 798 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 799 } 800 801 [Rule.Common.PEIM.NORELOC] 802 FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED { 803 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 804 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi 805 UI STRING="$(MODULE_NAME)" Optional 806 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 807 } 808 809 [Rule.Common.PEIM] 810 FILE PEIM = $(NAMED_GUID) { 811 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 812 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi 813 UI STRING="$(MODULE_NAME)" Optional 814 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 815 } 816 817 [Rule.Common.DXE_CORE] 818 FILE DXE_CORE = $(NAMED_GUID) { 819 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 820 UI STRING="$(MODULE_NAME)" Optional 821 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 822 } 823 824 [Rule.Common.UEFI_DRIVER] 825 FILE DRIVER = $(NAMED_GUID) { 826 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 827 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 828 UI STRING="$(MODULE_NAME)" Optional 829 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 830 } 831 832 [Rule.Common.DXE_DRIVER] 833 FILE DRIVER = $(NAMED_GUID) { 834 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 835 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 836 UI STRING="$(MODULE_NAME)" Optional 837 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 838 } 839 840 [Rule.Common.DXE_RUNTIME_DRIVER] 841 FILE DRIVER = $(NAMED_GUID) { 842 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 843 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 844 UI STRING="$(MODULE_NAME)" Optional 845 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 846 } 847 848 [Rule.Common.DXE_SMM_DRIVER] 849 FILE SMM = $(NAMED_GUID) { 850 SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 851 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 852 UI STRING="$(MODULE_NAME)" Optional 853 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 854 } 855 856 [Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE] 857 FILE SMM = $(NAMED_GUID) { 858 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 859 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 860 RAW ACPI Optional |.acpi 861 RAW ASL Optional |.aml 862 UI STRING="$(MODULE_NAME)" Optional 863 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 864 } 865 866 [Rule.Common.SMM_CORE] 867 FILE SMM_CORE = $(NAMED_GUID) { 868 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 869 UI STRING="$(MODULE_NAME)" Optional 870 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 871 } 872 873 [Rule.Common.UEFI_APPLICATION] 874 FILE APPLICATION = $(NAMED_GUID) { 875 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 876 UI STRING="$(MODULE_NAME)" Optional 877 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 878 } 879 880 [Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED] 881 FILE APPLICATION = $(NAMED_GUID) { 882 UI STRING="$(MODULE_NAME)" Optional 883 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 884 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { # TIANO COMPRESS GUID 885 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 886 } 887 } 888 889 [Rule.Common.UEFI_APPLICATION.UI] 890 FILE APPLICATION = $(NAMED_GUID) { 891 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi 892 UI STRING="Enter Setup" 893 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 894 } 895 896 [Rule.Common.USER_DEFINED.ACPITABLE] 897 FILE FREEFORM = $(NAMED_GUID) { 898 RAW ACPI |.acpi 899 RAW ASL |.aml 900 } 901 902 [Rule.Common.PEIM.FMP_IMAGE_DESC] 903 FILE PEIM = $(NAMED_GUID) { 904 RAW BIN |.acpi 905 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex 906 PE32 PE32 Align=4K $(INF_OUTPUT)/$(MODULE_NAME).efi 907 UI STRING="$(MODULE_NAME)" Optional 908 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) 909 } 910 911
