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      1 /* Capstone Disassembly Engine */
      2 /* By Nguyen Anh Quynh <aquynh (at) gmail.com>, 2013-2014 */
      3 
      4 #ifdef CAPSTONE_HAS_ARM
      5 
      6 #include <stdio.h>	// debug
      7 #include <string.h>
      8 
      9 #include "../../cs_priv.h"
     10 
     11 #include "ARMMapping.h"
     12 
     13 #define GET_INSTRINFO_ENUM
     14 #include "ARMGenInstrInfo.inc"
     15 
     16 #ifndef CAPSTONE_DIET
     17 static name_map reg_name_maps[] = {
     18 	{ ARM_REG_INVALID, NULL },
     19 	{ ARM_REG_APSR, "apsr"},
     20 	{ ARM_REG_APSR_NZCV, "apsr_nzcv"},
     21 	{ ARM_REG_CPSR, "cpsr"},
     22 	{ ARM_REG_FPEXC, "fpexc"},
     23 	{ ARM_REG_FPINST, "fpinst"},
     24 	{ ARM_REG_FPSCR, "fpscr"},
     25 	{ ARM_REG_FPSCR_NZCV, "fpscr_nzcv"},
     26 	{ ARM_REG_FPSID, "fpsid"},
     27 	{ ARM_REG_ITSTATE, "itstate"},
     28 	{ ARM_REG_LR, "lr"},
     29 	{ ARM_REG_PC, "pc"},
     30 	{ ARM_REG_SP, "sp"},
     31 	{ ARM_REG_SPSR, "spsr"},
     32 	{ ARM_REG_D0, "d0"},
     33 	{ ARM_REG_D1, "d1"},
     34 	{ ARM_REG_D2, "d2"},
     35 	{ ARM_REG_D3, "d3"},
     36 	{ ARM_REG_D4, "d4"},
     37 	{ ARM_REG_D5, "d5"},
     38 	{ ARM_REG_D6, "d6"},
     39 	{ ARM_REG_D7, "d7"},
     40 	{ ARM_REG_D8, "d8"},
     41 	{ ARM_REG_D9, "d9"},
     42 	{ ARM_REG_D10, "d10"},
     43 	{ ARM_REG_D11, "d11"},
     44 	{ ARM_REG_D12, "d12"},
     45 	{ ARM_REG_D13, "d13"},
     46 	{ ARM_REG_D14, "d14"},
     47 	{ ARM_REG_D15, "d15"},
     48 	{ ARM_REG_D16, "d16"},
     49 	{ ARM_REG_D17, "d17"},
     50 	{ ARM_REG_D18, "d18"},
     51 	{ ARM_REG_D19, "d19"},
     52 	{ ARM_REG_D20, "d20"},
     53 	{ ARM_REG_D21, "d21"},
     54 	{ ARM_REG_D22, "d22"},
     55 	{ ARM_REG_D23, "d23"},
     56 	{ ARM_REG_D24, "d24"},
     57 	{ ARM_REG_D25, "d25"},
     58 	{ ARM_REG_D26, "d26"},
     59 	{ ARM_REG_D27, "d27"},
     60 	{ ARM_REG_D28, "d28"},
     61 	{ ARM_REG_D29, "d29"},
     62 	{ ARM_REG_D30, "d30"},
     63 	{ ARM_REG_D31, "d31"},
     64 	{ ARM_REG_FPINST2, "fpinst2"},
     65 	{ ARM_REG_MVFR0, "mvfr0"},
     66 	{ ARM_REG_MVFR1, "mvfr1"},
     67 	{ ARM_REG_MVFR2, "mvfr2"},
     68 	{ ARM_REG_Q0, "q0"},
     69 	{ ARM_REG_Q1, "q1"},
     70 	{ ARM_REG_Q2, "q2"},
     71 	{ ARM_REG_Q3, "q3"},
     72 	{ ARM_REG_Q4, "q4"},
     73 	{ ARM_REG_Q5, "q5"},
     74 	{ ARM_REG_Q6, "q6"},
     75 	{ ARM_REG_Q7, "q7"},
     76 	{ ARM_REG_Q8, "q8"},
     77 	{ ARM_REG_Q9, "q9"},
     78 	{ ARM_REG_Q10, "q10"},
     79 	{ ARM_REG_Q11, "q11"},
     80 	{ ARM_REG_Q12, "q12"},
     81 	{ ARM_REG_Q13, "q13"},
     82 	{ ARM_REG_Q14, "q14"},
     83 	{ ARM_REG_Q15, "q15"},
     84 	{ ARM_REG_R0, "r0"},
     85 	{ ARM_REG_R1, "r1"},
     86 	{ ARM_REG_R2, "r2"},
     87 	{ ARM_REG_R3, "r3"},
     88 	{ ARM_REG_R4, "r4"},
     89 	{ ARM_REG_R5, "r5"},
     90 	{ ARM_REG_R6, "r6"},
     91 	{ ARM_REG_R7, "r7"},
     92 	{ ARM_REG_R8, "r8"},
     93 	{ ARM_REG_R9, "sb"},
     94 	{ ARM_REG_R10, "sl"},
     95 	{ ARM_REG_R11, "fp"},
     96 	{ ARM_REG_R12, "ip"},
     97 	{ ARM_REG_S0, "s0"},
     98 	{ ARM_REG_S1, "s1"},
     99 	{ ARM_REG_S2, "s2"},
    100 	{ ARM_REG_S3, "s3"},
    101 	{ ARM_REG_S4, "s4"},
    102 	{ ARM_REG_S5, "s5"},
    103 	{ ARM_REG_S6, "s6"},
    104 	{ ARM_REG_S7, "s7"},
    105 	{ ARM_REG_S8, "s8"},
    106 	{ ARM_REG_S9, "s9"},
    107 	{ ARM_REG_S10, "s10"},
    108 	{ ARM_REG_S11, "s11"},
    109 	{ ARM_REG_S12, "s12"},
    110 	{ ARM_REG_S13, "s13"},
    111 	{ ARM_REG_S14, "s14"},
    112 	{ ARM_REG_S15, "s15"},
    113 	{ ARM_REG_S16, "s16"},
    114 	{ ARM_REG_S17, "s17"},
    115 	{ ARM_REG_S18, "s18"},
    116 	{ ARM_REG_S19, "s19"},
    117 	{ ARM_REG_S20, "s20"},
    118 	{ ARM_REG_S21, "s21"},
    119 	{ ARM_REG_S22, "s22"},
    120 	{ ARM_REG_S23, "s23"},
    121 	{ ARM_REG_S24, "s24"},
    122 	{ ARM_REG_S25, "s25"},
    123 	{ ARM_REG_S26, "s26"},
    124 	{ ARM_REG_S27, "s27"},
    125 	{ ARM_REG_S28, "s28"},
    126 	{ ARM_REG_S29, "s29"},
    127 	{ ARM_REG_S30, "s30"},
    128 	{ ARM_REG_S31, "s31"},
    129 };
    130 static name_map reg_name_maps2[] = {
    131 	{ ARM_REG_INVALID, NULL },
    132 	{ ARM_REG_APSR, "apsr"},
    133 	{ ARM_REG_APSR_NZCV, "apsr_nzcv"},
    134 	{ ARM_REG_CPSR, "cpsr"},
    135 	{ ARM_REG_FPEXC, "fpexc"},
    136 	{ ARM_REG_FPINST, "fpinst"},
    137 	{ ARM_REG_FPSCR, "fpscr"},
    138 	{ ARM_REG_FPSCR_NZCV, "fpscr_nzcv"},
    139 	{ ARM_REG_FPSID, "fpsid"},
    140 	{ ARM_REG_ITSTATE, "itstate"},
    141 	{ ARM_REG_LR, "lr"},
    142 	{ ARM_REG_PC, "pc"},
    143 	{ ARM_REG_SP, "sp"},
    144 	{ ARM_REG_SPSR, "spsr"},
    145 	{ ARM_REG_D0, "d0"},
    146 	{ ARM_REG_D1, "d1"},
    147 	{ ARM_REG_D2, "d2"},
    148 	{ ARM_REG_D3, "d3"},
    149 	{ ARM_REG_D4, "d4"},
    150 	{ ARM_REG_D5, "d5"},
    151 	{ ARM_REG_D6, "d6"},
    152 	{ ARM_REG_D7, "d7"},
    153 	{ ARM_REG_D8, "d8"},
    154 	{ ARM_REG_D9, "d9"},
    155 	{ ARM_REG_D10, "d10"},
    156 	{ ARM_REG_D11, "d11"},
    157 	{ ARM_REG_D12, "d12"},
    158 	{ ARM_REG_D13, "d13"},
    159 	{ ARM_REG_D14, "d14"},
    160 	{ ARM_REG_D15, "d15"},
    161 	{ ARM_REG_D16, "d16"},
    162 	{ ARM_REG_D17, "d17"},
    163 	{ ARM_REG_D18, "d18"},
    164 	{ ARM_REG_D19, "d19"},
    165 	{ ARM_REG_D20, "d20"},
    166 	{ ARM_REG_D21, "d21"},
    167 	{ ARM_REG_D22, "d22"},
    168 	{ ARM_REG_D23, "d23"},
    169 	{ ARM_REG_D24, "d24"},
    170 	{ ARM_REG_D25, "d25"},
    171 	{ ARM_REG_D26, "d26"},
    172 	{ ARM_REG_D27, "d27"},
    173 	{ ARM_REG_D28, "d28"},
    174 	{ ARM_REG_D29, "d29"},
    175 	{ ARM_REG_D30, "d30"},
    176 	{ ARM_REG_D31, "d31"},
    177 	{ ARM_REG_FPINST2, "fpinst2"},
    178 	{ ARM_REG_MVFR0, "mvfr0"},
    179 	{ ARM_REG_MVFR1, "mvfr1"},
    180 	{ ARM_REG_MVFR2, "mvfr2"},
    181 	{ ARM_REG_Q0, "q0"},
    182 	{ ARM_REG_Q1, "q1"},
    183 	{ ARM_REG_Q2, "q2"},
    184 	{ ARM_REG_Q3, "q3"},
    185 	{ ARM_REG_Q4, "q4"},
    186 	{ ARM_REG_Q5, "q5"},
    187 	{ ARM_REG_Q6, "q6"},
    188 	{ ARM_REG_Q7, "q7"},
    189 	{ ARM_REG_Q8, "q8"},
    190 	{ ARM_REG_Q9, "q9"},
    191 	{ ARM_REG_Q10, "q10"},
    192 	{ ARM_REG_Q11, "q11"},
    193 	{ ARM_REG_Q12, "q12"},
    194 	{ ARM_REG_Q13, "q13"},
    195 	{ ARM_REG_Q14, "q14"},
    196 	{ ARM_REG_Q15, "q15"},
    197 	{ ARM_REG_R0, "r0"},
    198 	{ ARM_REG_R1, "r1"},
    199 	{ ARM_REG_R2, "r2"},
    200 	{ ARM_REG_R3, "r3"},
    201 	{ ARM_REG_R4, "r4"},
    202 	{ ARM_REG_R5, "r5"},
    203 	{ ARM_REG_R6, "r6"},
    204 	{ ARM_REG_R7, "r7"},
    205 	{ ARM_REG_R8, "r8"},
    206 	{ ARM_REG_R9, "r9"},
    207 	{ ARM_REG_R10, "r10"},
    208 	{ ARM_REG_R11, "r11"},
    209 	{ ARM_REG_R12, "r12"},
    210 	{ ARM_REG_S0, "s0"},
    211 	{ ARM_REG_S1, "s1"},
    212 	{ ARM_REG_S2, "s2"},
    213 	{ ARM_REG_S3, "s3"},
    214 	{ ARM_REG_S4, "s4"},
    215 	{ ARM_REG_S5, "s5"},
    216 	{ ARM_REG_S6, "s6"},
    217 	{ ARM_REG_S7, "s7"},
    218 	{ ARM_REG_S8, "s8"},
    219 	{ ARM_REG_S9, "s9"},
    220 	{ ARM_REG_S10, "s10"},
    221 	{ ARM_REG_S11, "s11"},
    222 	{ ARM_REG_S12, "s12"},
    223 	{ ARM_REG_S13, "s13"},
    224 	{ ARM_REG_S14, "s14"},
    225 	{ ARM_REG_S15, "s15"},
    226 	{ ARM_REG_S16, "s16"},
    227 	{ ARM_REG_S17, "s17"},
    228 	{ ARM_REG_S18, "s18"},
    229 	{ ARM_REG_S19, "s19"},
    230 	{ ARM_REG_S20, "s20"},
    231 	{ ARM_REG_S21, "s21"},
    232 	{ ARM_REG_S22, "s22"},
    233 	{ ARM_REG_S23, "s23"},
    234 	{ ARM_REG_S24, "s24"},
    235 	{ ARM_REG_S25, "s25"},
    236 	{ ARM_REG_S26, "s26"},
    237 	{ ARM_REG_S27, "s27"},
    238 	{ ARM_REG_S28, "s28"},
    239 	{ ARM_REG_S29, "s29"},
    240 	{ ARM_REG_S30, "s30"},
    241 	{ ARM_REG_S31, "s31"},
    242 };
    243 #endif
    244 
    245 const char *ARM_reg_name(csh handle, unsigned int reg)
    246 {
    247 #ifndef CAPSTONE_DIET
    248 	if (reg >= ARM_REG_ENDING)
    249 		return NULL;
    250 
    251 	return reg_name_maps[reg].name;
    252 #else
    253 	return NULL;
    254 #endif
    255 }
    256 
    257 const char *ARM_reg_name2(csh handle, unsigned int reg)
    258 {
    259 #ifndef CAPSTONE_DIET
    260 	if (reg >= ARM_REG_ENDING)
    261 		return NULL;
    262 
    263 	return reg_name_maps2[reg].name;
    264 #else
    265 	return NULL;
    266 #endif
    267 }
    268 
    269 static insn_map insns[] = {
    270 	// dummy item
    271 	{
    272 		0, 0,
    273 #ifndef CAPSTONE_DIET
    274 		{ 0 }, { 0 }, { 0 }, 0, 0
    275 #endif
    276 	},
    277 
    278 	{
    279 		ARM_ADCri, ARM_INS_ADC,
    280 #ifndef CAPSTONE_DIET
    281 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    282 #endif
    283 	},
    284 	{
    285 		ARM_ADCrr, ARM_INS_ADC,
    286 #ifndef CAPSTONE_DIET
    287 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    288 #endif
    289 	},
    290 	{
    291 		ARM_ADCrsi, ARM_INS_ADC,
    292 #ifndef CAPSTONE_DIET
    293 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    294 #endif
    295 	},
    296 	{
    297 		ARM_ADCrsr, ARM_INS_ADC,
    298 #ifndef CAPSTONE_DIET
    299 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    300 #endif
    301 	},
    302 	{
    303 		ARM_ADDri, ARM_INS_ADD,
    304 #ifndef CAPSTONE_DIET
    305 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    306 #endif
    307 	},
    308 	{
    309 		ARM_ADDrr, ARM_INS_ADD,
    310 #ifndef CAPSTONE_DIET
    311 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    312 #endif
    313 	},
    314 	{
    315 		ARM_ADDrsi, ARM_INS_ADD,
    316 #ifndef CAPSTONE_DIET
    317 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    318 #endif
    319 	},
    320 	{
    321 		ARM_ADDrsr, ARM_INS_ADD,
    322 #ifndef CAPSTONE_DIET
    323 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    324 #endif
    325 	},
    326 	{
    327 		ARM_ADR, ARM_INS_ADR,
    328 #ifndef CAPSTONE_DIET
    329 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    330 #endif
    331 	},
    332 	{
    333 		ARM_AESD, ARM_INS_AESD,
    334 #ifndef CAPSTONE_DIET
    335 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
    336 #endif
    337 	},
    338 	{
    339 		ARM_AESE, ARM_INS_AESE,
    340 #ifndef CAPSTONE_DIET
    341 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
    342 #endif
    343 	},
    344 	{
    345 		ARM_AESIMC, ARM_INS_AESIMC,
    346 #ifndef CAPSTONE_DIET
    347 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
    348 #endif
    349 	},
    350 	{
    351 		ARM_AESMC, ARM_INS_AESMC,
    352 #ifndef CAPSTONE_DIET
    353 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
    354 #endif
    355 	},
    356 	{
    357 		ARM_ANDri, ARM_INS_AND,
    358 #ifndef CAPSTONE_DIET
    359 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    360 #endif
    361 	},
    362 	{
    363 		ARM_ANDrr, ARM_INS_AND,
    364 #ifndef CAPSTONE_DIET
    365 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    366 #endif
    367 	},
    368 	{
    369 		ARM_ANDrsi, ARM_INS_AND,
    370 #ifndef CAPSTONE_DIET
    371 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    372 #endif
    373 	},
    374 	{
    375 		ARM_ANDrsr, ARM_INS_AND,
    376 #ifndef CAPSTONE_DIET
    377 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    378 #endif
    379 	},
    380 	{
    381 		ARM_BFC, ARM_INS_BFC,
    382 #ifndef CAPSTONE_DIET
    383 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
    384 #endif
    385 	},
    386 	{
    387 		ARM_BFI, ARM_INS_BFI,
    388 #ifndef CAPSTONE_DIET
    389 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
    390 #endif
    391 	},
    392 	{
    393 		ARM_BICri, ARM_INS_BIC,
    394 #ifndef CAPSTONE_DIET
    395 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    396 #endif
    397 	},
    398 	{
    399 		ARM_BICrr, ARM_INS_BIC,
    400 #ifndef CAPSTONE_DIET
    401 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    402 #endif
    403 	},
    404 	{
    405 		ARM_BICrsi, ARM_INS_BIC,
    406 #ifndef CAPSTONE_DIET
    407 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    408 #endif
    409 	},
    410 	{
    411 		ARM_BICrsr, ARM_INS_BIC,
    412 #ifndef CAPSTONE_DIET
    413 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    414 #endif
    415 	},
    416 	{
    417 		ARM_BKPT, ARM_INS_BKPT,
    418 #ifndef CAPSTONE_DIET
    419 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    420 #endif
    421 	},
    422 	{
    423 		ARM_BL, ARM_INS_BL,
    424 #ifndef CAPSTONE_DIET
    425 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_ARM, 0 }, 1, 0
    426 #endif
    427 	},
    428 	{
    429 		ARM_BLX, ARM_INS_BLX,
    430 #ifndef CAPSTONE_DIET
    431 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 1
    432 #endif
    433 	},
    434 	{
    435 		ARM_BLX_pred, ARM_INS_BLX,
    436 #ifndef CAPSTONE_DIET
    437 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 1
    438 #endif
    439 	},
    440 	{
    441 		ARM_BLXi, ARM_INS_BLX,
    442 #ifndef CAPSTONE_DIET
    443 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 1, 0
    444 #endif
    445 	},
    446 	{
    447 		ARM_BL_pred, ARM_INS_BL,
    448 #ifndef CAPSTONE_DIET
    449 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_ARM, 0 }, 1, 0
    450 #endif
    451 	},
    452 	{
    453 		ARM_BX, ARM_INS_BX,
    454 #ifndef CAPSTONE_DIET
    455 		{ 0 }, { 0 }, { ARM_GRP_JUMP, ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 1
    456 #endif
    457 	},
    458 	{
    459 		ARM_BXJ, ARM_INS_BXJ,
    460 #ifndef CAPSTONE_DIET
    461 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 1
    462 #endif
    463 	},
    464 	{
    465 		ARM_BX_RET, ARM_INS_BX,
    466 #ifndef CAPSTONE_DIET
    467 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 1
    468 #endif
    469 	},
    470 	{
    471 		ARM_BX_pred, ARM_INS_BX,
    472 #ifndef CAPSTONE_DIET
    473 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V4T, 0 }, 0, 1
    474 #endif
    475 	},
    476 	{
    477 		ARM_Bcc, ARM_INS_B,
    478 #ifndef CAPSTONE_DIET
    479 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 1, 0
    480 #endif
    481 	},
    482 	{
    483 		ARM_CDP, ARM_INS_CDP,
    484 #ifndef CAPSTONE_DIET
    485 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    486 #endif
    487 	},
    488 	{
    489 		ARM_CDP2, ARM_INS_CDP2,
    490 #ifndef CAPSTONE_DIET
    491 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    492 #endif
    493 	},
    494 	{
    495 		ARM_CLREX, ARM_INS_CLREX,
    496 #ifndef CAPSTONE_DIET
    497 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
    498 #endif
    499 	},
    500 	{
    501 		ARM_CLZ, ARM_INS_CLZ,
    502 #ifndef CAPSTONE_DIET
    503 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5T, 0 }, 0, 0
    504 #endif
    505 	},
    506 	{
    507 		ARM_CMNri, ARM_INS_CMN,
    508 #ifndef CAPSTONE_DIET
    509 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    510 #endif
    511 	},
    512 	{
    513 		ARM_CMNzrr, ARM_INS_CMN,
    514 #ifndef CAPSTONE_DIET
    515 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    516 #endif
    517 	},
    518 	{
    519 		ARM_CMNzrsi, ARM_INS_CMN,
    520 #ifndef CAPSTONE_DIET
    521 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    522 #endif
    523 	},
    524 	{
    525 		ARM_CMNzrsr, ARM_INS_CMN,
    526 #ifndef CAPSTONE_DIET
    527 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    528 #endif
    529 	},
    530 	{
    531 		ARM_CMPri, ARM_INS_CMP,
    532 #ifndef CAPSTONE_DIET
    533 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    534 #endif
    535 	},
    536 	{
    537 		ARM_CMPrr, ARM_INS_CMP,
    538 #ifndef CAPSTONE_DIET
    539 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    540 #endif
    541 	},
    542 	{
    543 		ARM_CMPrsi, ARM_INS_CMP,
    544 #ifndef CAPSTONE_DIET
    545 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    546 #endif
    547 	},
    548 	{
    549 		ARM_CMPrsr, ARM_INS_CMP,
    550 #ifndef CAPSTONE_DIET
    551 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    552 #endif
    553 	},
    554 	{
    555 		ARM_CPS1p, ARM_INS_CPS,
    556 #ifndef CAPSTONE_DIET
    557 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    558 #endif
    559 	},
    560 	{
    561 		ARM_CPS2p, ARM_INS_CPS,
    562 #ifndef CAPSTONE_DIET
    563 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    564 #endif
    565 	},
    566 	{
    567 		ARM_CPS3p, ARM_INS_CPS,
    568 #ifndef CAPSTONE_DIET
    569 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    570 #endif
    571 	},
    572 	{
    573 		ARM_CRC32B, ARM_INS_CRC32B,
    574 #ifndef CAPSTONE_DIET
    575 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
    576 #endif
    577 	},
    578 	{
    579 		ARM_CRC32CB, ARM_INS_CRC32CB,
    580 #ifndef CAPSTONE_DIET
    581 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
    582 #endif
    583 	},
    584 	{
    585 		ARM_CRC32CH, ARM_INS_CRC32CH,
    586 #ifndef CAPSTONE_DIET
    587 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
    588 #endif
    589 	},
    590 	{
    591 		ARM_CRC32CW, ARM_INS_CRC32CW,
    592 #ifndef CAPSTONE_DIET
    593 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
    594 #endif
    595 	},
    596 	{
    597 		ARM_CRC32H, ARM_INS_CRC32H,
    598 #ifndef CAPSTONE_DIET
    599 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
    600 #endif
    601 	},
    602 	{
    603 		ARM_CRC32W, ARM_INS_CRC32W,
    604 #ifndef CAPSTONE_DIET
    605 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
    606 #endif
    607 	},
    608 	{
    609 		ARM_DBG, ARM_INS_DBG,
    610 #ifndef CAPSTONE_DIET
    611 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
    612 #endif
    613 	},
    614 	{
    615 		ARM_DMB, ARM_INS_DMB,
    616 #ifndef CAPSTONE_DIET
    617 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
    618 #endif
    619 	},
    620 	{
    621 		ARM_DSB, ARM_INS_DSB,
    622 #ifndef CAPSTONE_DIET
    623 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
    624 #endif
    625 	},
    626 	{
    627 		ARM_EORri, ARM_INS_EOR,
    628 #ifndef CAPSTONE_DIET
    629 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    630 #endif
    631 	},
    632 	{
    633 		ARM_EORrr, ARM_INS_EOR,
    634 #ifndef CAPSTONE_DIET
    635 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    636 #endif
    637 	},
    638 	{
    639 		ARM_EORrsi, ARM_INS_EOR,
    640 #ifndef CAPSTONE_DIET
    641 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    642 #endif
    643 	},
    644 	{
    645 		ARM_EORrsr, ARM_INS_EOR,
    646 #ifndef CAPSTONE_DIET
    647 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    648 #endif
    649 	},
    650 	{
    651 		ARM_FCONSTD, ARM_INS_VMOV,
    652 #ifndef CAPSTONE_DIET
    653 		{ 0 }, { 0 }, { ARM_GRP_VFP3, ARM_GRP_DPVFP, 0 }, 0, 0
    654 #endif
    655 	},
    656 	{
    657 		ARM_FCONSTS, ARM_INS_VMOV,
    658 #ifndef CAPSTONE_DIET
    659 		{ 0 }, { 0 }, { ARM_GRP_VFP3, 0 }, 0, 0
    660 #endif
    661 	},
    662 	{
    663 		ARM_FLDMXDB_UPD, ARM_INS_FLDMDBX,
    664 #ifndef CAPSTONE_DIET
    665 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
    666 #endif
    667 	},
    668 	{
    669 		ARM_FLDMXIA, ARM_INS_FLDMIAX,
    670 #ifndef CAPSTONE_DIET
    671 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
    672 #endif
    673 	},
    674 	{
    675 		ARM_FLDMXIA_UPD, ARM_INS_FLDMIAX,
    676 #ifndef CAPSTONE_DIET
    677 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
    678 #endif
    679 	},
    680 	{
    681 		ARM_FMSTAT, ARM_INS_VMRS,
    682 #ifndef CAPSTONE_DIET
    683 		{ ARM_REG_FPSCR_NZCV, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
    684 #endif
    685 	},
    686 	{
    687 		ARM_FSTMXDB_UPD, ARM_INS_FSTMDBX,
    688 #ifndef CAPSTONE_DIET
    689 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
    690 #endif
    691 	},
    692 	{
    693 		ARM_FSTMXIA, ARM_INS_FSTMIAX,
    694 #ifndef CAPSTONE_DIET
    695 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
    696 #endif
    697 	},
    698 	{
    699 		ARM_FSTMXIA_UPD, ARM_INS_FSTMIAX,
    700 #ifndef CAPSTONE_DIET
    701 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
    702 #endif
    703 	},
    704 	{
    705 		ARM_HINT, ARM_INS_HINT,
    706 #ifndef CAPSTONE_DIET
    707 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
    708 #endif
    709 	},
    710 	{
    711 		ARM_HLT, ARM_INS_HLT,
    712 #ifndef CAPSTONE_DIET
    713 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    714 #endif
    715 	},
    716 	{
    717 		ARM_ISB, ARM_INS_ISB,
    718 #ifndef CAPSTONE_DIET
    719 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_DATABARRIER, 0 }, 0, 0
    720 #endif
    721 	},
    722 	{
    723 		ARM_LDA, ARM_INS_LDA,
    724 #ifndef CAPSTONE_DIET
    725 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    726 #endif
    727 	},
    728 	{
    729 		ARM_LDAB, ARM_INS_LDAB,
    730 #ifndef CAPSTONE_DIET
    731 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    732 #endif
    733 	},
    734 	{
    735 		ARM_LDAEX, ARM_INS_LDAEX,
    736 #ifndef CAPSTONE_DIET
    737 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    738 #endif
    739 	},
    740 	{
    741 		ARM_LDAEXB, ARM_INS_LDAEXB,
    742 #ifndef CAPSTONE_DIET
    743 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    744 #endif
    745 	},
    746 	{
    747 		ARM_LDAEXD, ARM_INS_LDAEXD,
    748 #ifndef CAPSTONE_DIET
    749 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    750 #endif
    751 	},
    752 	{
    753 		ARM_LDAEXH, ARM_INS_LDAEXH,
    754 #ifndef CAPSTONE_DIET
    755 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    756 #endif
    757 	},
    758 	{
    759 		ARM_LDAH, ARM_INS_LDAH,
    760 #ifndef CAPSTONE_DIET
    761 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
    762 #endif
    763 	},
    764 	{
    765 		ARM_LDC2L_OFFSET, ARM_INS_LDC2L,
    766 #ifndef CAPSTONE_DIET
    767 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    768 #endif
    769 	},
    770 	{
    771 		ARM_LDC2L_OPTION, ARM_INS_LDC2L,
    772 #ifndef CAPSTONE_DIET
    773 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    774 #endif
    775 	},
    776 	{
    777 		ARM_LDC2L_POST, ARM_INS_LDC2L,
    778 #ifndef CAPSTONE_DIET
    779 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    780 #endif
    781 	},
    782 	{
    783 		ARM_LDC2L_PRE, ARM_INS_LDC2L,
    784 #ifndef CAPSTONE_DIET
    785 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    786 #endif
    787 	},
    788 	{
    789 		ARM_LDC2_OFFSET, ARM_INS_LDC2,
    790 #ifndef CAPSTONE_DIET
    791 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    792 #endif
    793 	},
    794 	{
    795 		ARM_LDC2_OPTION, ARM_INS_LDC2,
    796 #ifndef CAPSTONE_DIET
    797 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    798 #endif
    799 	},
    800 	{
    801 		ARM_LDC2_POST, ARM_INS_LDC2,
    802 #ifndef CAPSTONE_DIET
    803 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    804 #endif
    805 	},
    806 	{
    807 		ARM_LDC2_PRE, ARM_INS_LDC2,
    808 #ifndef CAPSTONE_DIET
    809 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
    810 #endif
    811 	},
    812 	{
    813 		ARM_LDCL_OFFSET, ARM_INS_LDCL,
    814 #ifndef CAPSTONE_DIET
    815 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    816 #endif
    817 	},
    818 	{
    819 		ARM_LDCL_OPTION, ARM_INS_LDCL,
    820 #ifndef CAPSTONE_DIET
    821 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    822 #endif
    823 	},
    824 	{
    825 		ARM_LDCL_POST, ARM_INS_LDCL,
    826 #ifndef CAPSTONE_DIET
    827 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    828 #endif
    829 	},
    830 	{
    831 		ARM_LDCL_PRE, ARM_INS_LDCL,
    832 #ifndef CAPSTONE_DIET
    833 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    834 #endif
    835 	},
    836 	{
    837 		ARM_LDC_OFFSET, ARM_INS_LDC,
    838 #ifndef CAPSTONE_DIET
    839 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    840 #endif
    841 	},
    842 	{
    843 		ARM_LDC_OPTION, ARM_INS_LDC,
    844 #ifndef CAPSTONE_DIET
    845 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    846 #endif
    847 	},
    848 	{
    849 		ARM_LDC_POST, ARM_INS_LDC,
    850 #ifndef CAPSTONE_DIET
    851 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    852 #endif
    853 	},
    854 	{
    855 		ARM_LDC_PRE, ARM_INS_LDC,
    856 #ifndef CAPSTONE_DIET
    857 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    858 #endif
    859 	},
    860 	{
    861 		ARM_LDMDA, ARM_INS_LDMDA,
    862 #ifndef CAPSTONE_DIET
    863 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    864 #endif
    865 	},
    866 	{
    867 		ARM_LDMDA_UPD, ARM_INS_LDMDA,
    868 #ifndef CAPSTONE_DIET
    869 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    870 #endif
    871 	},
    872 	{
    873 		ARM_LDMDB, ARM_INS_LDMDB,
    874 #ifndef CAPSTONE_DIET
    875 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    876 #endif
    877 	},
    878 	{
    879 		ARM_LDMDB_UPD, ARM_INS_LDMDB,
    880 #ifndef CAPSTONE_DIET
    881 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    882 #endif
    883 	},
    884 	{
    885 		ARM_LDMIA, ARM_INS_LDM,
    886 #ifndef CAPSTONE_DIET
    887 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    888 #endif
    889 	},
    890 	{
    891 		ARM_LDMIA_UPD, ARM_INS_LDM,
    892 #ifndef CAPSTONE_DIET
    893 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    894 #endif
    895 	},
    896 	{
    897 		ARM_LDMIB, ARM_INS_LDMIB,
    898 #ifndef CAPSTONE_DIET
    899 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    900 #endif
    901 	},
    902 	{
    903 		ARM_LDMIB_UPD, ARM_INS_LDMIB,
    904 #ifndef CAPSTONE_DIET
    905 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    906 #endif
    907 	},
    908 	{
    909 		ARM_LDRBT_POST_IMM, ARM_INS_LDRBT,
    910 #ifndef CAPSTONE_DIET
    911 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    912 #endif
    913 	},
    914 	{
    915 		ARM_LDRBT_POST_REG, ARM_INS_LDRBT,
    916 #ifndef CAPSTONE_DIET
    917 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    918 #endif
    919 	},
    920 	{
    921 		ARM_LDRB_POST_IMM, ARM_INS_LDRB,
    922 #ifndef CAPSTONE_DIET
    923 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    924 #endif
    925 	},
    926 	{
    927 		ARM_LDRB_POST_REG, ARM_INS_LDRB,
    928 #ifndef CAPSTONE_DIET
    929 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    930 #endif
    931 	},
    932 	{
    933 		ARM_LDRB_PRE_IMM, ARM_INS_LDRB,
    934 #ifndef CAPSTONE_DIET
    935 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    936 #endif
    937 	},
    938 	{
    939 		ARM_LDRB_PRE_REG, ARM_INS_LDRB,
    940 #ifndef CAPSTONE_DIET
    941 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    942 #endif
    943 	},
    944 	{
    945 		ARM_LDRBi12, ARM_INS_LDRB,
    946 #ifndef CAPSTONE_DIET
    947 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    948 #endif
    949 	},
    950 	{
    951 		ARM_LDRBrs, ARM_INS_LDRB,
    952 #ifndef CAPSTONE_DIET
    953 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    954 #endif
    955 	},
    956 	{
    957 		ARM_LDRD, ARM_INS_LDRD,
    958 #ifndef CAPSTONE_DIET
    959 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
    960 #endif
    961 	},
    962 	{
    963 		ARM_LDRD_POST, ARM_INS_LDRD,
    964 #ifndef CAPSTONE_DIET
    965 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    966 #endif
    967 	},
    968 	{
    969 		ARM_LDRD_PRE, ARM_INS_LDRD,
    970 #ifndef CAPSTONE_DIET
    971 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    972 #endif
    973 	},
    974 	{
    975 		ARM_LDREX, ARM_INS_LDREX,
    976 #ifndef CAPSTONE_DIET
    977 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    978 #endif
    979 	},
    980 	{
    981 		ARM_LDREXB, ARM_INS_LDREXB,
    982 #ifndef CAPSTONE_DIET
    983 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    984 #endif
    985 	},
    986 	{
    987 		ARM_LDREXD, ARM_INS_LDREXD,
    988 #ifndef CAPSTONE_DIET
    989 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    990 #endif
    991 	},
    992 	{
    993 		ARM_LDREXH, ARM_INS_LDREXH,
    994 #ifndef CAPSTONE_DIET
    995 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
    996 #endif
    997 	},
    998 	{
    999 		ARM_LDRH, ARM_INS_LDRH,
   1000 #ifndef CAPSTONE_DIET
   1001 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1002 #endif
   1003 	},
   1004 	{
   1005 		ARM_LDRHTi, ARM_INS_LDRHT,
   1006 #ifndef CAPSTONE_DIET
   1007 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1008 #endif
   1009 	},
   1010 	{
   1011 		ARM_LDRHTr, ARM_INS_LDRHT,
   1012 #ifndef CAPSTONE_DIET
   1013 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1014 #endif
   1015 	},
   1016 	{
   1017 		ARM_LDRH_POST, ARM_INS_LDRH,
   1018 #ifndef CAPSTONE_DIET
   1019 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1020 #endif
   1021 	},
   1022 	{
   1023 		ARM_LDRH_PRE, ARM_INS_LDRH,
   1024 #ifndef CAPSTONE_DIET
   1025 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1026 #endif
   1027 	},
   1028 	{
   1029 		ARM_LDRSB, ARM_INS_LDRSB,
   1030 #ifndef CAPSTONE_DIET
   1031 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1032 #endif
   1033 	},
   1034 	{
   1035 		ARM_LDRSBTi, ARM_INS_LDRSBT,
   1036 #ifndef CAPSTONE_DIET
   1037 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1038 #endif
   1039 	},
   1040 	{
   1041 		ARM_LDRSBTr, ARM_INS_LDRSBT,
   1042 #ifndef CAPSTONE_DIET
   1043 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1044 #endif
   1045 	},
   1046 	{
   1047 		ARM_LDRSB_POST, ARM_INS_LDRSB,
   1048 #ifndef CAPSTONE_DIET
   1049 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1050 #endif
   1051 	},
   1052 	{
   1053 		ARM_LDRSB_PRE, ARM_INS_LDRSB,
   1054 #ifndef CAPSTONE_DIET
   1055 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1056 #endif
   1057 	},
   1058 	{
   1059 		ARM_LDRSH, ARM_INS_LDRSH,
   1060 #ifndef CAPSTONE_DIET
   1061 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1062 #endif
   1063 	},
   1064 	{
   1065 		ARM_LDRSHTi, ARM_INS_LDRSHT,
   1066 #ifndef CAPSTONE_DIET
   1067 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1068 #endif
   1069 	},
   1070 	{
   1071 		ARM_LDRSHTr, ARM_INS_LDRSHT,
   1072 #ifndef CAPSTONE_DIET
   1073 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1074 #endif
   1075 	},
   1076 	{
   1077 		ARM_LDRSH_POST, ARM_INS_LDRSH,
   1078 #ifndef CAPSTONE_DIET
   1079 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1080 #endif
   1081 	},
   1082 	{
   1083 		ARM_LDRSH_PRE, ARM_INS_LDRSH,
   1084 #ifndef CAPSTONE_DIET
   1085 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1086 #endif
   1087 	},
   1088 	{
   1089 		ARM_LDRT_POST_IMM, ARM_INS_LDRT,
   1090 #ifndef CAPSTONE_DIET
   1091 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1092 #endif
   1093 	},
   1094 	{
   1095 		ARM_LDRT_POST_REG, ARM_INS_LDRT,
   1096 #ifndef CAPSTONE_DIET
   1097 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1098 #endif
   1099 	},
   1100 	{
   1101 		ARM_LDR_POST_IMM, ARM_INS_LDR,
   1102 #ifndef CAPSTONE_DIET
   1103 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1104 #endif
   1105 	},
   1106 	{
   1107 		ARM_LDR_POST_REG, ARM_INS_LDR,
   1108 #ifndef CAPSTONE_DIET
   1109 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1110 #endif
   1111 	},
   1112 	{
   1113 		ARM_LDR_PRE_IMM, ARM_INS_LDR,
   1114 #ifndef CAPSTONE_DIET
   1115 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1116 #endif
   1117 	},
   1118 	{
   1119 		ARM_LDR_PRE_REG, ARM_INS_LDR,
   1120 #ifndef CAPSTONE_DIET
   1121 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1122 #endif
   1123 	},
   1124 	{
   1125 		ARM_LDRcp, ARM_INS_LDR,
   1126 #ifndef CAPSTONE_DIET
   1127 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1128 #endif
   1129 	},
   1130 	{
   1131 		ARM_LDRi12, ARM_INS_LDR,
   1132 #ifndef CAPSTONE_DIET
   1133 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1134 #endif
   1135 	},
   1136 	{
   1137 		ARM_LDRrs, ARM_INS_LDR,
   1138 #ifndef CAPSTONE_DIET
   1139 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1140 #endif
   1141 	},
   1142 	{
   1143 		ARM_MCR, ARM_INS_MCR,
   1144 #ifndef CAPSTONE_DIET
   1145 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1146 #endif
   1147 	},
   1148 	{
   1149 		ARM_MCR2, ARM_INS_MCR2,
   1150 #ifndef CAPSTONE_DIET
   1151 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   1152 #endif
   1153 	},
   1154 	{
   1155 		ARM_MCRR, ARM_INS_MCRR,
   1156 #ifndef CAPSTONE_DIET
   1157 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1158 #endif
   1159 	},
   1160 	{
   1161 		ARM_MCRR2, ARM_INS_MCRR2,
   1162 #ifndef CAPSTONE_DIET
   1163 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   1164 #endif
   1165 	},
   1166 	{
   1167 		ARM_MLA, ARM_INS_MLA,
   1168 #ifndef CAPSTONE_DIET
   1169 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
   1170 #endif
   1171 	},
   1172 	{
   1173 		ARM_MLS, ARM_INS_MLS,
   1174 #ifndef CAPSTONE_DIET
   1175 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, ARM_GRP_MULOPS, 0 }, 0, 0
   1176 #endif
   1177 	},
   1178 	{
   1179 		ARM_MOVPCLR, ARM_INS_MOV,
   1180 #ifndef CAPSTONE_DIET
   1181 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1182 #endif
   1183 	},
   1184 	{
   1185 		ARM_MOVTi16, ARM_INS_MOVT,
   1186 #ifndef CAPSTONE_DIET
   1187 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
   1188 #endif
   1189 	},
   1190 	{
   1191 		ARM_MOVi, ARM_INS_MOV,
   1192 #ifndef CAPSTONE_DIET
   1193 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1194 #endif
   1195 	},
   1196 	{
   1197 		ARM_MOVi16, ARM_INS_MOVW,
   1198 #ifndef CAPSTONE_DIET
   1199 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
   1200 #endif
   1201 	},
   1202 	{
   1203 		ARM_MOVr, ARM_INS_MOV,
   1204 #ifndef CAPSTONE_DIET
   1205 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1206 #endif
   1207 	},
   1208 	{
   1209 		ARM_MOVr_TC, ARM_INS_MOV,
   1210 #ifndef CAPSTONE_DIET
   1211 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1212 #endif
   1213 	},
   1214 	{
   1215 		ARM_MOVsi, ARM_INS_MOV,
   1216 #ifndef CAPSTONE_DIET
   1217 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1218 #endif
   1219 	},
   1220 	{
   1221 		ARM_MOVsr, ARM_INS_MOV,
   1222 #ifndef CAPSTONE_DIET
   1223 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1224 #endif
   1225 	},
   1226 	{
   1227 		ARM_MRC, ARM_INS_MRC,
   1228 #ifndef CAPSTONE_DIET
   1229 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1230 #endif
   1231 	},
   1232 	{
   1233 		ARM_MRC2, ARM_INS_MRC2,
   1234 #ifndef CAPSTONE_DIET
   1235 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   1236 #endif
   1237 	},
   1238 	{
   1239 		ARM_MRRC, ARM_INS_MRRC,
   1240 #ifndef CAPSTONE_DIET
   1241 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1242 #endif
   1243 	},
   1244 	{
   1245 		ARM_MRRC2, ARM_INS_MRRC2,
   1246 #ifndef CAPSTONE_DIET
   1247 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   1248 #endif
   1249 	},
   1250 	{
   1251 		ARM_MRS, ARM_INS_MRS,
   1252 #ifndef CAPSTONE_DIET
   1253 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1254 #endif
   1255 	},
   1256 	{
   1257 		ARM_MRSsys, ARM_INS_MRS,
   1258 #ifndef CAPSTONE_DIET
   1259 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1260 #endif
   1261 	},
   1262 	{
   1263 		ARM_MSR, ARM_INS_MSR,
   1264 #ifndef CAPSTONE_DIET
   1265 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1266 #endif
   1267 	},
   1268 	{
   1269 		ARM_MSRi, ARM_INS_MSR,
   1270 #ifndef CAPSTONE_DIET
   1271 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1272 #endif
   1273 	},
   1274 	{
   1275 		ARM_MUL, ARM_INS_MUL,
   1276 #ifndef CAPSTONE_DIET
   1277 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1278 #endif
   1279 	},
   1280 	{
   1281 		ARM_MVNi, ARM_INS_MVN,
   1282 #ifndef CAPSTONE_DIET
   1283 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1284 #endif
   1285 	},
   1286 	{
   1287 		ARM_MVNr, ARM_INS_MVN,
   1288 #ifndef CAPSTONE_DIET
   1289 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1290 #endif
   1291 	},
   1292 	{
   1293 		ARM_MVNsi, ARM_INS_MVN,
   1294 #ifndef CAPSTONE_DIET
   1295 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1296 #endif
   1297 	},
   1298 	{
   1299 		ARM_MVNsr, ARM_INS_MVN,
   1300 #ifndef CAPSTONE_DIET
   1301 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1302 #endif
   1303 	},
   1304 	{
   1305 		ARM_ORRri, ARM_INS_ORR,
   1306 #ifndef CAPSTONE_DIET
   1307 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1308 #endif
   1309 	},
   1310 	{
   1311 		ARM_ORRrr, ARM_INS_ORR,
   1312 #ifndef CAPSTONE_DIET
   1313 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1314 #endif
   1315 	},
   1316 	{
   1317 		ARM_ORRrsi, ARM_INS_ORR,
   1318 #ifndef CAPSTONE_DIET
   1319 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1320 #endif
   1321 	},
   1322 	{
   1323 		ARM_ORRrsr, ARM_INS_ORR,
   1324 #ifndef CAPSTONE_DIET
   1325 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1326 #endif
   1327 	},
   1328 	{
   1329 		ARM_PKHBT, ARM_INS_PKHBT,
   1330 #ifndef CAPSTONE_DIET
   1331 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1332 #endif
   1333 	},
   1334 	{
   1335 		ARM_PKHTB, ARM_INS_PKHTB,
   1336 #ifndef CAPSTONE_DIET
   1337 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1338 #endif
   1339 	},
   1340 	{
   1341 		ARM_PLDWi12, ARM_INS_PLDW,
   1342 #ifndef CAPSTONE_DIET
   1343 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
   1344 #endif
   1345 	},
   1346 	{
   1347 		ARM_PLDWrs, ARM_INS_PLDW,
   1348 #ifndef CAPSTONE_DIET
   1349 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
   1350 #endif
   1351 	},
   1352 	{
   1353 		ARM_PLDi12, ARM_INS_PLD,
   1354 #ifndef CAPSTONE_DIET
   1355 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1356 #endif
   1357 	},
   1358 	{
   1359 		ARM_PLDrs, ARM_INS_PLD,
   1360 #ifndef CAPSTONE_DIET
   1361 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1362 #endif
   1363 	},
   1364 	{
   1365 		ARM_PLIi12, ARM_INS_PLI,
   1366 #ifndef CAPSTONE_DIET
   1367 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
   1368 #endif
   1369 	},
   1370 	{
   1371 		ARM_PLIrs, ARM_INS_PLI,
   1372 #ifndef CAPSTONE_DIET
   1373 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V7, 0 }, 0, 0
   1374 #endif
   1375 	},
   1376 	{
   1377 		ARM_QADD, ARM_INS_QADD,
   1378 #ifndef CAPSTONE_DIET
   1379 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1380 #endif
   1381 	},
   1382 	{
   1383 		ARM_QADD16, ARM_INS_QADD16,
   1384 #ifndef CAPSTONE_DIET
   1385 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1386 #endif
   1387 	},
   1388 	{
   1389 		ARM_QADD8, ARM_INS_QADD8,
   1390 #ifndef CAPSTONE_DIET
   1391 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1392 #endif
   1393 	},
   1394 	{
   1395 		ARM_QASX, ARM_INS_QASX,
   1396 #ifndef CAPSTONE_DIET
   1397 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1398 #endif
   1399 	},
   1400 	{
   1401 		ARM_QDADD, ARM_INS_QDADD,
   1402 #ifndef CAPSTONE_DIET
   1403 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1404 #endif
   1405 	},
   1406 	{
   1407 		ARM_QDSUB, ARM_INS_QDSUB,
   1408 #ifndef CAPSTONE_DIET
   1409 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1410 #endif
   1411 	},
   1412 	{
   1413 		ARM_QSAX, ARM_INS_QSAX,
   1414 #ifndef CAPSTONE_DIET
   1415 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1416 #endif
   1417 	},
   1418 	{
   1419 		ARM_QSUB, ARM_INS_QSUB,
   1420 #ifndef CAPSTONE_DIET
   1421 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1422 #endif
   1423 	},
   1424 	{
   1425 		ARM_QSUB16, ARM_INS_QSUB16,
   1426 #ifndef CAPSTONE_DIET
   1427 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1428 #endif
   1429 	},
   1430 	{
   1431 		ARM_QSUB8, ARM_INS_QSUB8,
   1432 #ifndef CAPSTONE_DIET
   1433 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1434 #endif
   1435 	},
   1436 	{
   1437 		ARM_RBIT, ARM_INS_RBIT,
   1438 #ifndef CAPSTONE_DIET
   1439 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
   1440 #endif
   1441 	},
   1442 	{
   1443 		ARM_REV, ARM_INS_REV,
   1444 #ifndef CAPSTONE_DIET
   1445 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1446 #endif
   1447 	},
   1448 	{
   1449 		ARM_REV16, ARM_INS_REV16,
   1450 #ifndef CAPSTONE_DIET
   1451 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1452 #endif
   1453 	},
   1454 	{
   1455 		ARM_REVSH, ARM_INS_REVSH,
   1456 #ifndef CAPSTONE_DIET
   1457 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1458 #endif
   1459 	},
   1460 	{
   1461 		ARM_RFEDA, ARM_INS_RFEDA,
   1462 #ifndef CAPSTONE_DIET
   1463 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1464 #endif
   1465 	},
   1466 	{
   1467 		ARM_RFEDA_UPD, ARM_INS_RFEDA,
   1468 #ifndef CAPSTONE_DIET
   1469 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1470 #endif
   1471 	},
   1472 	{
   1473 		ARM_RFEDB, ARM_INS_RFEDB,
   1474 #ifndef CAPSTONE_DIET
   1475 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1476 #endif
   1477 	},
   1478 	{
   1479 		ARM_RFEDB_UPD, ARM_INS_RFEDB,
   1480 #ifndef CAPSTONE_DIET
   1481 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1482 #endif
   1483 	},
   1484 	{
   1485 		ARM_RFEIA, ARM_INS_RFEIA,
   1486 #ifndef CAPSTONE_DIET
   1487 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1488 #endif
   1489 	},
   1490 	{
   1491 		ARM_RFEIA_UPD, ARM_INS_RFEIA,
   1492 #ifndef CAPSTONE_DIET
   1493 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1494 #endif
   1495 	},
   1496 	{
   1497 		ARM_RFEIB, ARM_INS_RFEIB,
   1498 #ifndef CAPSTONE_DIET
   1499 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1500 #endif
   1501 	},
   1502 	{
   1503 		ARM_RFEIB_UPD, ARM_INS_RFEIB,
   1504 #ifndef CAPSTONE_DIET
   1505 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1506 #endif
   1507 	},
   1508 	{
   1509 		ARM_RSBri, ARM_INS_RSB,
   1510 #ifndef CAPSTONE_DIET
   1511 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1512 #endif
   1513 	},
   1514 	{
   1515 		ARM_RSBrr, ARM_INS_RSB,
   1516 #ifndef CAPSTONE_DIET
   1517 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1518 #endif
   1519 	},
   1520 	{
   1521 		ARM_RSBrsi, ARM_INS_RSB,
   1522 #ifndef CAPSTONE_DIET
   1523 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1524 #endif
   1525 	},
   1526 	{
   1527 		ARM_RSBrsr, ARM_INS_RSB,
   1528 #ifndef CAPSTONE_DIET
   1529 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1530 #endif
   1531 	},
   1532 	{
   1533 		ARM_RSCri, ARM_INS_RSC,
   1534 #ifndef CAPSTONE_DIET
   1535 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1536 #endif
   1537 	},
   1538 	{
   1539 		ARM_RSCrr, ARM_INS_RSC,
   1540 #ifndef CAPSTONE_DIET
   1541 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1542 #endif
   1543 	},
   1544 	{
   1545 		ARM_RSCrsi, ARM_INS_RSC,
   1546 #ifndef CAPSTONE_DIET
   1547 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1548 #endif
   1549 	},
   1550 	{
   1551 		ARM_RSCrsr, ARM_INS_RSC,
   1552 #ifndef CAPSTONE_DIET
   1553 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1554 #endif
   1555 	},
   1556 	{
   1557 		ARM_SADD16, ARM_INS_SADD16,
   1558 #ifndef CAPSTONE_DIET
   1559 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1560 #endif
   1561 	},
   1562 	{
   1563 		ARM_SADD8, ARM_INS_SADD8,
   1564 #ifndef CAPSTONE_DIET
   1565 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1566 #endif
   1567 	},
   1568 	{
   1569 		ARM_SASX, ARM_INS_SASX,
   1570 #ifndef CAPSTONE_DIET
   1571 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1572 #endif
   1573 	},
   1574 	{
   1575 		ARM_SBCri, ARM_INS_SBC,
   1576 #ifndef CAPSTONE_DIET
   1577 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1578 #endif
   1579 	},
   1580 	{
   1581 		ARM_SBCrr, ARM_INS_SBC,
   1582 #ifndef CAPSTONE_DIET
   1583 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1584 #endif
   1585 	},
   1586 	{
   1587 		ARM_SBCrsi, ARM_INS_SBC,
   1588 #ifndef CAPSTONE_DIET
   1589 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1590 #endif
   1591 	},
   1592 	{
   1593 		ARM_SBCrsr, ARM_INS_SBC,
   1594 #ifndef CAPSTONE_DIET
   1595 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1596 #endif
   1597 	},
   1598 	{
   1599 		ARM_SBFX, ARM_INS_SBFX,
   1600 #ifndef CAPSTONE_DIET
   1601 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
   1602 #endif
   1603 	},
   1604 	{
   1605 		ARM_SDIV, ARM_INS_SDIV,
   1606 #ifndef CAPSTONE_DIET
   1607 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1608 #endif
   1609 	},
   1610 	{
   1611 		ARM_SEL, ARM_INS_SEL,
   1612 #ifndef CAPSTONE_DIET
   1613 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1614 #endif
   1615 	},
   1616 	{
   1617 		ARM_SETEND, ARM_INS_SETEND,
   1618 #ifndef CAPSTONE_DIET
   1619 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1620 #endif
   1621 	},
   1622 	{
   1623 		ARM_SHA1C, ARM_INS_SHA1C,
   1624 #ifndef CAPSTONE_DIET
   1625 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1626 #endif
   1627 	},
   1628 	{
   1629 		ARM_SHA1H, ARM_INS_SHA1H,
   1630 #ifndef CAPSTONE_DIET
   1631 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1632 #endif
   1633 	},
   1634 	{
   1635 		ARM_SHA1M, ARM_INS_SHA1M,
   1636 #ifndef CAPSTONE_DIET
   1637 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1638 #endif
   1639 	},
   1640 	{
   1641 		ARM_SHA1P, ARM_INS_SHA1P,
   1642 #ifndef CAPSTONE_DIET
   1643 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1644 #endif
   1645 	},
   1646 	{
   1647 		ARM_SHA1SU0, ARM_INS_SHA1SU0,
   1648 #ifndef CAPSTONE_DIET
   1649 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1650 #endif
   1651 	},
   1652 	{
   1653 		ARM_SHA1SU1, ARM_INS_SHA1SU1,
   1654 #ifndef CAPSTONE_DIET
   1655 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1656 #endif
   1657 	},
   1658 	{
   1659 		ARM_SHA256H, ARM_INS_SHA256H,
   1660 #ifndef CAPSTONE_DIET
   1661 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1662 #endif
   1663 	},
   1664 	{
   1665 		ARM_SHA256H2, ARM_INS_SHA256H2,
   1666 #ifndef CAPSTONE_DIET
   1667 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1668 #endif
   1669 	},
   1670 	{
   1671 		ARM_SHA256SU0, ARM_INS_SHA256SU0,
   1672 #ifndef CAPSTONE_DIET
   1673 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1674 #endif
   1675 	},
   1676 	{
   1677 		ARM_SHA256SU1, ARM_INS_SHA256SU1,
   1678 #ifndef CAPSTONE_DIET
   1679 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   1680 #endif
   1681 	},
   1682 	{
   1683 		ARM_SHADD16, ARM_INS_SHADD16,
   1684 #ifndef CAPSTONE_DIET
   1685 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1686 #endif
   1687 	},
   1688 	{
   1689 		ARM_SHADD8, ARM_INS_SHADD8,
   1690 #ifndef CAPSTONE_DIET
   1691 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1692 #endif
   1693 	},
   1694 	{
   1695 		ARM_SHASX, ARM_INS_SHASX,
   1696 #ifndef CAPSTONE_DIET
   1697 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1698 #endif
   1699 	},
   1700 	{
   1701 		ARM_SHSAX, ARM_INS_SHSAX,
   1702 #ifndef CAPSTONE_DIET
   1703 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1704 #endif
   1705 	},
   1706 	{
   1707 		ARM_SHSUB16, ARM_INS_SHSUB16,
   1708 #ifndef CAPSTONE_DIET
   1709 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1710 #endif
   1711 	},
   1712 	{
   1713 		ARM_SHSUB8, ARM_INS_SHSUB8,
   1714 #ifndef CAPSTONE_DIET
   1715 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1716 #endif
   1717 	},
   1718 	{
   1719 		ARM_SMC, ARM_INS_SMC,
   1720 #ifndef CAPSTONE_DIET
   1721 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_TRUSTZONE, 0 }, 0, 0
   1722 #endif
   1723 	},
   1724 	{
   1725 		ARM_SMLABB, ARM_INS_SMLABB,
   1726 #ifndef CAPSTONE_DIET
   1727 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
   1728 #endif
   1729 	},
   1730 	{
   1731 		ARM_SMLABT, ARM_INS_SMLABT,
   1732 #ifndef CAPSTONE_DIET
   1733 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
   1734 #endif
   1735 	},
   1736 	{
   1737 		ARM_SMLAD, ARM_INS_SMLAD,
   1738 #ifndef CAPSTONE_DIET
   1739 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1740 #endif
   1741 	},
   1742 	{
   1743 		ARM_SMLADX, ARM_INS_SMLADX,
   1744 #ifndef CAPSTONE_DIET
   1745 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1746 #endif
   1747 	},
   1748 	{
   1749 		ARM_SMLAL, ARM_INS_SMLAL,
   1750 #ifndef CAPSTONE_DIET
   1751 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1752 #endif
   1753 	},
   1754 	{
   1755 		ARM_SMLALBB, ARM_INS_SMLALBB,
   1756 #ifndef CAPSTONE_DIET
   1757 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1758 #endif
   1759 	},
   1760 	{
   1761 		ARM_SMLALBT, ARM_INS_SMLALBT,
   1762 #ifndef CAPSTONE_DIET
   1763 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1764 #endif
   1765 	},
   1766 	{
   1767 		ARM_SMLALD, ARM_INS_SMLALD,
   1768 #ifndef CAPSTONE_DIET
   1769 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1770 #endif
   1771 	},
   1772 	{
   1773 		ARM_SMLALDX, ARM_INS_SMLALDX,
   1774 #ifndef CAPSTONE_DIET
   1775 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1776 #endif
   1777 	},
   1778 	{
   1779 		ARM_SMLALTB, ARM_INS_SMLALTB,
   1780 #ifndef CAPSTONE_DIET
   1781 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1782 #endif
   1783 	},
   1784 	{
   1785 		ARM_SMLALTT, ARM_INS_SMLALTT,
   1786 #ifndef CAPSTONE_DIET
   1787 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1788 #endif
   1789 	},
   1790 	{
   1791 		ARM_SMLATB, ARM_INS_SMLATB,
   1792 #ifndef CAPSTONE_DIET
   1793 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
   1794 #endif
   1795 	},
   1796 	{
   1797 		ARM_SMLATT, ARM_INS_SMLATT,
   1798 #ifndef CAPSTONE_DIET
   1799 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
   1800 #endif
   1801 	},
   1802 	{
   1803 		ARM_SMLAWB, ARM_INS_SMLAWB,
   1804 #ifndef CAPSTONE_DIET
   1805 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
   1806 #endif
   1807 	},
   1808 	{
   1809 		ARM_SMLAWT, ARM_INS_SMLAWT,
   1810 #ifndef CAPSTONE_DIET
   1811 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, ARM_GRP_MULOPS, 0 }, 0, 0
   1812 #endif
   1813 	},
   1814 	{
   1815 		ARM_SMLSD, ARM_INS_SMLSD,
   1816 #ifndef CAPSTONE_DIET
   1817 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1818 #endif
   1819 	},
   1820 	{
   1821 		ARM_SMLSDX, ARM_INS_SMLSDX,
   1822 #ifndef CAPSTONE_DIET
   1823 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1824 #endif
   1825 	},
   1826 	{
   1827 		ARM_SMLSLD, ARM_INS_SMLSLD,
   1828 #ifndef CAPSTONE_DIET
   1829 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1830 #endif
   1831 	},
   1832 	{
   1833 		ARM_SMLSLDX, ARM_INS_SMLSLDX,
   1834 #ifndef CAPSTONE_DIET
   1835 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1836 #endif
   1837 	},
   1838 	{
   1839 		ARM_SMMLA, ARM_INS_SMMLA,
   1840 #ifndef CAPSTONE_DIET
   1841 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
   1842 #endif
   1843 	},
   1844 	{
   1845 		ARM_SMMLAR, ARM_INS_SMMLAR,
   1846 #ifndef CAPSTONE_DIET
   1847 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1848 #endif
   1849 	},
   1850 	{
   1851 		ARM_SMMLS, ARM_INS_SMMLS,
   1852 #ifndef CAPSTONE_DIET
   1853 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, ARM_GRP_MULOPS, 0 }, 0, 0
   1854 #endif
   1855 	},
   1856 	{
   1857 		ARM_SMMLSR, ARM_INS_SMMLSR,
   1858 #ifndef CAPSTONE_DIET
   1859 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1860 #endif
   1861 	},
   1862 	{
   1863 		ARM_SMMUL, ARM_INS_SMMUL,
   1864 #ifndef CAPSTONE_DIET
   1865 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1866 #endif
   1867 	},
   1868 	{
   1869 		ARM_SMMULR, ARM_INS_SMMULR,
   1870 #ifndef CAPSTONE_DIET
   1871 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1872 #endif
   1873 	},
   1874 	{
   1875 		ARM_SMUAD, ARM_INS_SMUAD,
   1876 #ifndef CAPSTONE_DIET
   1877 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1878 #endif
   1879 	},
   1880 	{
   1881 		ARM_SMUADX, ARM_INS_SMUADX,
   1882 #ifndef CAPSTONE_DIET
   1883 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1884 #endif
   1885 	},
   1886 	{
   1887 		ARM_SMULBB, ARM_INS_SMULBB,
   1888 #ifndef CAPSTONE_DIET
   1889 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1890 #endif
   1891 	},
   1892 	{
   1893 		ARM_SMULBT, ARM_INS_SMULBT,
   1894 #ifndef CAPSTONE_DIET
   1895 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1896 #endif
   1897 	},
   1898 	{
   1899 		ARM_SMULL, ARM_INS_SMULL,
   1900 #ifndef CAPSTONE_DIET
   1901 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1902 #endif
   1903 	},
   1904 	{
   1905 		ARM_SMULTB, ARM_INS_SMULTB,
   1906 #ifndef CAPSTONE_DIET
   1907 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1908 #endif
   1909 	},
   1910 	{
   1911 		ARM_SMULTT, ARM_INS_SMULTT,
   1912 #ifndef CAPSTONE_DIET
   1913 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1914 #endif
   1915 	},
   1916 	{
   1917 		ARM_SMULWB, ARM_INS_SMULWB,
   1918 #ifndef CAPSTONE_DIET
   1919 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1920 #endif
   1921 	},
   1922 	{
   1923 		ARM_SMULWT, ARM_INS_SMULWT,
   1924 #ifndef CAPSTONE_DIET
   1925 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   1926 #endif
   1927 	},
   1928 	{
   1929 		ARM_SMUSD, ARM_INS_SMUSD,
   1930 #ifndef CAPSTONE_DIET
   1931 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1932 #endif
   1933 	},
   1934 	{
   1935 		ARM_SMUSDX, ARM_INS_SMUSDX,
   1936 #ifndef CAPSTONE_DIET
   1937 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   1938 #endif
   1939 	},
   1940 	{
   1941 		ARM_SRSDA, ARM_INS_SRSDA,
   1942 #ifndef CAPSTONE_DIET
   1943 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1944 #endif
   1945 	},
   1946 	{
   1947 		ARM_SRSDA_UPD, ARM_INS_SRSDA,
   1948 #ifndef CAPSTONE_DIET
   1949 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1950 #endif
   1951 	},
   1952 	{
   1953 		ARM_SRSDB, ARM_INS_SRSDB,
   1954 #ifndef CAPSTONE_DIET
   1955 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1956 #endif
   1957 	},
   1958 	{
   1959 		ARM_SRSDB_UPD, ARM_INS_SRSDB,
   1960 #ifndef CAPSTONE_DIET
   1961 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1962 #endif
   1963 	},
   1964 	{
   1965 		ARM_SRSIA, ARM_INS_SRSIA,
   1966 #ifndef CAPSTONE_DIET
   1967 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1968 #endif
   1969 	},
   1970 	{
   1971 		ARM_SRSIA_UPD, ARM_INS_SRSIA,
   1972 #ifndef CAPSTONE_DIET
   1973 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1974 #endif
   1975 	},
   1976 	{
   1977 		ARM_SRSIB, ARM_INS_SRSIB,
   1978 #ifndef CAPSTONE_DIET
   1979 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1980 #endif
   1981 	},
   1982 	{
   1983 		ARM_SRSIB_UPD, ARM_INS_SRSIB,
   1984 #ifndef CAPSTONE_DIET
   1985 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1986 #endif
   1987 	},
   1988 	{
   1989 		ARM_SSAT, ARM_INS_SSAT,
   1990 #ifndef CAPSTONE_DIET
   1991 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1992 #endif
   1993 	},
   1994 	{
   1995 		ARM_SSAT16, ARM_INS_SSAT16,
   1996 #ifndef CAPSTONE_DIET
   1997 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   1998 #endif
   1999 	},
   2000 	{
   2001 		ARM_SSAX, ARM_INS_SSAX,
   2002 #ifndef CAPSTONE_DIET
   2003 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2004 #endif
   2005 	},
   2006 	{
   2007 		ARM_SSUB16, ARM_INS_SSUB16,
   2008 #ifndef CAPSTONE_DIET
   2009 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2010 #endif
   2011 	},
   2012 	{
   2013 		ARM_SSUB8, ARM_INS_SSUB8,
   2014 #ifndef CAPSTONE_DIET
   2015 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2016 #endif
   2017 	},
   2018 	{
   2019 		ARM_STC2L_OFFSET, ARM_INS_STC2L,
   2020 #ifndef CAPSTONE_DIET
   2021 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2022 #endif
   2023 	},
   2024 	{
   2025 		ARM_STC2L_OPTION, ARM_INS_STC2L,
   2026 #ifndef CAPSTONE_DIET
   2027 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2028 #endif
   2029 	},
   2030 	{
   2031 		ARM_STC2L_POST, ARM_INS_STC2L,
   2032 #ifndef CAPSTONE_DIET
   2033 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2034 #endif
   2035 	},
   2036 	{
   2037 		ARM_STC2L_PRE, ARM_INS_STC2L,
   2038 #ifndef CAPSTONE_DIET
   2039 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2040 #endif
   2041 	},
   2042 	{
   2043 		ARM_STC2_OFFSET, ARM_INS_STC2,
   2044 #ifndef CAPSTONE_DIET
   2045 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2046 #endif
   2047 	},
   2048 	{
   2049 		ARM_STC2_OPTION, ARM_INS_STC2,
   2050 #ifndef CAPSTONE_DIET
   2051 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2052 #endif
   2053 	},
   2054 	{
   2055 		ARM_STC2_POST, ARM_INS_STC2,
   2056 #ifndef CAPSTONE_DIET
   2057 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2058 #endif
   2059 	},
   2060 	{
   2061 		ARM_STC2_PRE, ARM_INS_STC2,
   2062 #ifndef CAPSTONE_DIET
   2063 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2064 #endif
   2065 	},
   2066 	{
   2067 		ARM_STCL_OFFSET, ARM_INS_STCL,
   2068 #ifndef CAPSTONE_DIET
   2069 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2070 #endif
   2071 	},
   2072 	{
   2073 		ARM_STCL_OPTION, ARM_INS_STCL,
   2074 #ifndef CAPSTONE_DIET
   2075 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2076 #endif
   2077 	},
   2078 	{
   2079 		ARM_STCL_POST, ARM_INS_STCL,
   2080 #ifndef CAPSTONE_DIET
   2081 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2082 #endif
   2083 	},
   2084 	{
   2085 		ARM_STCL_PRE, ARM_INS_STCL,
   2086 #ifndef CAPSTONE_DIET
   2087 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2088 #endif
   2089 	},
   2090 	{
   2091 		ARM_STC_OFFSET, ARM_INS_STC,
   2092 #ifndef CAPSTONE_DIET
   2093 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2094 #endif
   2095 	},
   2096 	{
   2097 		ARM_STC_OPTION, ARM_INS_STC,
   2098 #ifndef CAPSTONE_DIET
   2099 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2100 #endif
   2101 	},
   2102 	{
   2103 		ARM_STC_POST, ARM_INS_STC,
   2104 #ifndef CAPSTONE_DIET
   2105 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2106 #endif
   2107 	},
   2108 	{
   2109 		ARM_STC_PRE, ARM_INS_STC,
   2110 #ifndef CAPSTONE_DIET
   2111 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2112 #endif
   2113 	},
   2114 	{
   2115 		ARM_STL, ARM_INS_STL,
   2116 #ifndef CAPSTONE_DIET
   2117 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
   2118 #endif
   2119 	},
   2120 	{
   2121 		ARM_STLB, ARM_INS_STLB,
   2122 #ifndef CAPSTONE_DIET
   2123 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
   2124 #endif
   2125 	},
   2126 	{
   2127 		ARM_STLEX, ARM_INS_STLEX,
   2128 #ifndef CAPSTONE_DIET
   2129 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
   2130 #endif
   2131 	},
   2132 	{
   2133 		ARM_STLEXB, ARM_INS_STLEXB,
   2134 #ifndef CAPSTONE_DIET
   2135 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
   2136 #endif
   2137 	},
   2138 	{
   2139 		ARM_STLEXD, ARM_INS_STLEXD,
   2140 #ifndef CAPSTONE_DIET
   2141 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
   2142 #endif
   2143 	},
   2144 	{
   2145 		ARM_STLEXH, ARM_INS_STLEXH,
   2146 #ifndef CAPSTONE_DIET
   2147 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
   2148 #endif
   2149 	},
   2150 	{
   2151 		ARM_STLH, ARM_INS_STLH,
   2152 #ifndef CAPSTONE_DIET
   2153 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V8, 0 }, 0, 0
   2154 #endif
   2155 	},
   2156 	{
   2157 		ARM_STMDA, ARM_INS_STMDA,
   2158 #ifndef CAPSTONE_DIET
   2159 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2160 #endif
   2161 	},
   2162 	{
   2163 		ARM_STMDA_UPD, ARM_INS_STMDA,
   2164 #ifndef CAPSTONE_DIET
   2165 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2166 #endif
   2167 	},
   2168 	{
   2169 		ARM_STMDB, ARM_INS_STMDB,
   2170 #ifndef CAPSTONE_DIET
   2171 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2172 #endif
   2173 	},
   2174 	{
   2175 		ARM_STMDB_UPD, ARM_INS_STMDB,
   2176 #ifndef CAPSTONE_DIET
   2177 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2178 #endif
   2179 	},
   2180 	{
   2181 		ARM_STMIA, ARM_INS_STM,
   2182 #ifndef CAPSTONE_DIET
   2183 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2184 #endif
   2185 	},
   2186 	{
   2187 		ARM_STMIA_UPD, ARM_INS_STM,
   2188 #ifndef CAPSTONE_DIET
   2189 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2190 #endif
   2191 	},
   2192 	{
   2193 		ARM_STMIB, ARM_INS_STMIB,
   2194 #ifndef CAPSTONE_DIET
   2195 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2196 #endif
   2197 	},
   2198 	{
   2199 		ARM_STMIB_UPD, ARM_INS_STMIB,
   2200 #ifndef CAPSTONE_DIET
   2201 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2202 #endif
   2203 	},
   2204 	{
   2205 		ARM_STRBT_POST_IMM, ARM_INS_STRBT,
   2206 #ifndef CAPSTONE_DIET
   2207 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2208 #endif
   2209 	},
   2210 	{
   2211 		ARM_STRBT_POST_REG, ARM_INS_STRBT,
   2212 #ifndef CAPSTONE_DIET
   2213 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2214 #endif
   2215 	},
   2216 	{
   2217 		ARM_STRB_POST_IMM, ARM_INS_STRB,
   2218 #ifndef CAPSTONE_DIET
   2219 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2220 #endif
   2221 	},
   2222 	{
   2223 		ARM_STRB_POST_REG, ARM_INS_STRB,
   2224 #ifndef CAPSTONE_DIET
   2225 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2226 #endif
   2227 	},
   2228 	{
   2229 		ARM_STRB_PRE_IMM, ARM_INS_STRB,
   2230 #ifndef CAPSTONE_DIET
   2231 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2232 #endif
   2233 	},
   2234 	{
   2235 		ARM_STRB_PRE_REG, ARM_INS_STRB,
   2236 #ifndef CAPSTONE_DIET
   2237 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2238 #endif
   2239 	},
   2240 	{
   2241 		ARM_STRBi12, ARM_INS_STRB,
   2242 #ifndef CAPSTONE_DIET
   2243 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2244 #endif
   2245 	},
   2246 	{
   2247 		ARM_STRBrs, ARM_INS_STRB,
   2248 #ifndef CAPSTONE_DIET
   2249 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2250 #endif
   2251 	},
   2252 	{
   2253 		ARM_STRD, ARM_INS_STRD,
   2254 #ifndef CAPSTONE_DIET
   2255 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V5TE, 0 }, 0, 0
   2256 #endif
   2257 	},
   2258 	{
   2259 		ARM_STRD_POST, ARM_INS_STRD,
   2260 #ifndef CAPSTONE_DIET
   2261 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2262 #endif
   2263 	},
   2264 	{
   2265 		ARM_STRD_PRE, ARM_INS_STRD,
   2266 #ifndef CAPSTONE_DIET
   2267 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2268 #endif
   2269 	},
   2270 	{
   2271 		ARM_STREX, ARM_INS_STREX,
   2272 #ifndef CAPSTONE_DIET
   2273 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2274 #endif
   2275 	},
   2276 	{
   2277 		ARM_STREXB, ARM_INS_STREXB,
   2278 #ifndef CAPSTONE_DIET
   2279 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2280 #endif
   2281 	},
   2282 	{
   2283 		ARM_STREXD, ARM_INS_STREXD,
   2284 #ifndef CAPSTONE_DIET
   2285 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2286 #endif
   2287 	},
   2288 	{
   2289 		ARM_STREXH, ARM_INS_STREXH,
   2290 #ifndef CAPSTONE_DIET
   2291 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2292 #endif
   2293 	},
   2294 	{
   2295 		ARM_STRH, ARM_INS_STRH,
   2296 #ifndef CAPSTONE_DIET
   2297 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2298 #endif
   2299 	},
   2300 	{
   2301 		ARM_STRHTi, ARM_INS_STRHT,
   2302 #ifndef CAPSTONE_DIET
   2303 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2304 #endif
   2305 	},
   2306 	{
   2307 		ARM_STRHTr, ARM_INS_STRHT,
   2308 #ifndef CAPSTONE_DIET
   2309 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2310 #endif
   2311 	},
   2312 	{
   2313 		ARM_STRH_POST, ARM_INS_STRH,
   2314 #ifndef CAPSTONE_DIET
   2315 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2316 #endif
   2317 	},
   2318 	{
   2319 		ARM_STRH_PRE, ARM_INS_STRH,
   2320 #ifndef CAPSTONE_DIET
   2321 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2322 #endif
   2323 	},
   2324 	{
   2325 		ARM_STRT_POST_IMM, ARM_INS_STRT,
   2326 #ifndef CAPSTONE_DIET
   2327 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2328 #endif
   2329 	},
   2330 	{
   2331 		ARM_STRT_POST_REG, ARM_INS_STRT,
   2332 #ifndef CAPSTONE_DIET
   2333 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2334 #endif
   2335 	},
   2336 	{
   2337 		ARM_STR_POST_IMM, ARM_INS_STR,
   2338 #ifndef CAPSTONE_DIET
   2339 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2340 #endif
   2341 	},
   2342 	{
   2343 		ARM_STR_POST_REG, ARM_INS_STR,
   2344 #ifndef CAPSTONE_DIET
   2345 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2346 #endif
   2347 	},
   2348 	{
   2349 		ARM_STR_PRE_IMM, ARM_INS_STR,
   2350 #ifndef CAPSTONE_DIET
   2351 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2352 #endif
   2353 	},
   2354 	{
   2355 		ARM_STR_PRE_REG, ARM_INS_STR,
   2356 #ifndef CAPSTONE_DIET
   2357 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2358 #endif
   2359 	},
   2360 	{
   2361 		ARM_STRi12, ARM_INS_STR,
   2362 #ifndef CAPSTONE_DIET
   2363 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2364 #endif
   2365 	},
   2366 	{
   2367 		ARM_STRrs, ARM_INS_STR,
   2368 #ifndef CAPSTONE_DIET
   2369 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2370 #endif
   2371 	},
   2372 	{
   2373 		ARM_SUBri, ARM_INS_SUB,
   2374 #ifndef CAPSTONE_DIET
   2375 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2376 #endif
   2377 	},
   2378 	{
   2379 		ARM_SUBrr, ARM_INS_SUB,
   2380 #ifndef CAPSTONE_DIET
   2381 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2382 #endif
   2383 	},
   2384 	{
   2385 		ARM_SUBrsi, ARM_INS_SUB,
   2386 #ifndef CAPSTONE_DIET
   2387 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2388 #endif
   2389 	},
   2390 	{
   2391 		ARM_SUBrsr, ARM_INS_SUB,
   2392 #ifndef CAPSTONE_DIET
   2393 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2394 #endif
   2395 	},
   2396 	{
   2397 		ARM_SVC, ARM_INS_SVC,
   2398 #ifndef CAPSTONE_DIET
   2399 		{ ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2400 #endif
   2401 	},
   2402 	{
   2403 		ARM_SWP, ARM_INS_SWP,
   2404 #ifndef CAPSTONE_DIET
   2405 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2406 #endif
   2407 	},
   2408 	{
   2409 		ARM_SWPB, ARM_INS_SWPB,
   2410 #ifndef CAPSTONE_DIET
   2411 		{ 0 }, { 0 }, { ARM_GRP_PREV8, 0 }, 0, 0
   2412 #endif
   2413 	},
   2414 	{
   2415 		ARM_SXTAB, ARM_INS_SXTAB,
   2416 #ifndef CAPSTONE_DIET
   2417 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2418 #endif
   2419 	},
   2420 	{
   2421 		ARM_SXTAB16, ARM_INS_SXTAB16,
   2422 #ifndef CAPSTONE_DIET
   2423 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2424 #endif
   2425 	},
   2426 	{
   2427 		ARM_SXTAH, ARM_INS_SXTAH,
   2428 #ifndef CAPSTONE_DIET
   2429 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2430 #endif
   2431 	},
   2432 	{
   2433 		ARM_SXTB, ARM_INS_SXTB,
   2434 #ifndef CAPSTONE_DIET
   2435 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2436 #endif
   2437 	},
   2438 	{
   2439 		ARM_SXTB16, ARM_INS_SXTB16,
   2440 #ifndef CAPSTONE_DIET
   2441 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2442 #endif
   2443 	},
   2444 	{
   2445 		ARM_SXTH, ARM_INS_SXTH,
   2446 #ifndef CAPSTONE_DIET
   2447 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2448 #endif
   2449 	},
   2450 	{
   2451 		ARM_TEQri, ARM_INS_TEQ,
   2452 #ifndef CAPSTONE_DIET
   2453 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2454 #endif
   2455 	},
   2456 	{
   2457 		ARM_TEQrr, ARM_INS_TEQ,
   2458 #ifndef CAPSTONE_DIET
   2459 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2460 #endif
   2461 	},
   2462 	{
   2463 		ARM_TEQrsi, ARM_INS_TEQ,
   2464 #ifndef CAPSTONE_DIET
   2465 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2466 #endif
   2467 	},
   2468 	{
   2469 		ARM_TEQrsr, ARM_INS_TEQ,
   2470 #ifndef CAPSTONE_DIET
   2471 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2472 #endif
   2473 	},
   2474 	{
   2475 		ARM_TRAP, ARM_INS_TRAP,
   2476 #ifndef CAPSTONE_DIET
   2477 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2478 #endif
   2479 	},
   2480 	{
   2481 		ARM_TRAPNaCl, ARM_INS_TRAP,
   2482 #ifndef CAPSTONE_DIET
   2483 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2484 #endif
   2485 	},
   2486 	{
   2487 		ARM_TSTri, ARM_INS_TST,
   2488 #ifndef CAPSTONE_DIET
   2489 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2490 #endif
   2491 	},
   2492 	{
   2493 		ARM_TSTrr, ARM_INS_TST,
   2494 #ifndef CAPSTONE_DIET
   2495 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2496 #endif
   2497 	},
   2498 	{
   2499 		ARM_TSTrsi, ARM_INS_TST,
   2500 #ifndef CAPSTONE_DIET
   2501 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2502 #endif
   2503 	},
   2504 	{
   2505 		ARM_TSTrsr, ARM_INS_TST,
   2506 #ifndef CAPSTONE_DIET
   2507 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2508 #endif
   2509 	},
   2510 	{
   2511 		ARM_UADD16, ARM_INS_UADD16,
   2512 #ifndef CAPSTONE_DIET
   2513 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2514 #endif
   2515 	},
   2516 	{
   2517 		ARM_UADD8, ARM_INS_UADD8,
   2518 #ifndef CAPSTONE_DIET
   2519 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2520 #endif
   2521 	},
   2522 	{
   2523 		ARM_UASX, ARM_INS_UASX,
   2524 #ifndef CAPSTONE_DIET
   2525 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2526 #endif
   2527 	},
   2528 	{
   2529 		ARM_UBFX, ARM_INS_UBFX,
   2530 #ifndef CAPSTONE_DIET
   2531 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6T2, 0 }, 0, 0
   2532 #endif
   2533 	},
   2534 	{
   2535 		ARM_UDF, ARM_INS_UDF,
   2536 #ifndef CAPSTONE_DIET
   2537 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2538 #endif
   2539 	},
   2540 	{
   2541 		ARM_UDIV, ARM_INS_UDIV,
   2542 #ifndef CAPSTONE_DIET
   2543 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2544 #endif
   2545 	},
   2546 	{
   2547 		ARM_UHADD16, ARM_INS_UHADD16,
   2548 #ifndef CAPSTONE_DIET
   2549 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2550 #endif
   2551 	},
   2552 	{
   2553 		ARM_UHADD8, ARM_INS_UHADD8,
   2554 #ifndef CAPSTONE_DIET
   2555 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2556 #endif
   2557 	},
   2558 	{
   2559 		ARM_UHASX, ARM_INS_UHASX,
   2560 #ifndef CAPSTONE_DIET
   2561 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2562 #endif
   2563 	},
   2564 	{
   2565 		ARM_UHSAX, ARM_INS_UHSAX,
   2566 #ifndef CAPSTONE_DIET
   2567 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2568 #endif
   2569 	},
   2570 	{
   2571 		ARM_UHSUB16, ARM_INS_UHSUB16,
   2572 #ifndef CAPSTONE_DIET
   2573 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2574 #endif
   2575 	},
   2576 	{
   2577 		ARM_UHSUB8, ARM_INS_UHSUB8,
   2578 #ifndef CAPSTONE_DIET
   2579 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2580 #endif
   2581 	},
   2582 	{
   2583 		ARM_UMAAL, ARM_INS_UMAAL,
   2584 #ifndef CAPSTONE_DIET
   2585 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2586 #endif
   2587 	},
   2588 	{
   2589 		ARM_UMLAL, ARM_INS_UMLAL,
   2590 #ifndef CAPSTONE_DIET
   2591 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2592 #endif
   2593 	},
   2594 	{
   2595 		ARM_UMULL, ARM_INS_UMULL,
   2596 #ifndef CAPSTONE_DIET
   2597 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2598 #endif
   2599 	},
   2600 	{
   2601 		ARM_UQADD16, ARM_INS_UQADD16,
   2602 #ifndef CAPSTONE_DIET
   2603 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2604 #endif
   2605 	},
   2606 	{
   2607 		ARM_UQADD8, ARM_INS_UQADD8,
   2608 #ifndef CAPSTONE_DIET
   2609 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2610 #endif
   2611 	},
   2612 	{
   2613 		ARM_UQASX, ARM_INS_UQASX,
   2614 #ifndef CAPSTONE_DIET
   2615 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2616 #endif
   2617 	},
   2618 	{
   2619 		ARM_UQSAX, ARM_INS_UQSAX,
   2620 #ifndef CAPSTONE_DIET
   2621 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2622 #endif
   2623 	},
   2624 	{
   2625 		ARM_UQSUB16, ARM_INS_UQSUB16,
   2626 #ifndef CAPSTONE_DIET
   2627 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2628 #endif
   2629 	},
   2630 	{
   2631 		ARM_UQSUB8, ARM_INS_UQSUB8,
   2632 #ifndef CAPSTONE_DIET
   2633 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2634 #endif
   2635 	},
   2636 	{
   2637 		ARM_USAD8, ARM_INS_USAD8,
   2638 #ifndef CAPSTONE_DIET
   2639 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2640 #endif
   2641 	},
   2642 	{
   2643 		ARM_USADA8, ARM_INS_USADA8,
   2644 #ifndef CAPSTONE_DIET
   2645 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2646 #endif
   2647 	},
   2648 	{
   2649 		ARM_USAT, ARM_INS_USAT,
   2650 #ifndef CAPSTONE_DIET
   2651 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2652 #endif
   2653 	},
   2654 	{
   2655 		ARM_USAT16, ARM_INS_USAT16,
   2656 #ifndef CAPSTONE_DIET
   2657 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2658 #endif
   2659 	},
   2660 	{
   2661 		ARM_USAX, ARM_INS_USAX,
   2662 #ifndef CAPSTONE_DIET
   2663 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2664 #endif
   2665 	},
   2666 	{
   2667 		ARM_USUB16, ARM_INS_USUB16,
   2668 #ifndef CAPSTONE_DIET
   2669 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2670 #endif
   2671 	},
   2672 	{
   2673 		ARM_USUB8, ARM_INS_USUB8,
   2674 #ifndef CAPSTONE_DIET
   2675 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   2676 #endif
   2677 	},
   2678 	{
   2679 		ARM_UXTAB, ARM_INS_UXTAB,
   2680 #ifndef CAPSTONE_DIET
   2681 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2682 #endif
   2683 	},
   2684 	{
   2685 		ARM_UXTAB16, ARM_INS_UXTAB16,
   2686 #ifndef CAPSTONE_DIET
   2687 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2688 #endif
   2689 	},
   2690 	{
   2691 		ARM_UXTAH, ARM_INS_UXTAH,
   2692 #ifndef CAPSTONE_DIET
   2693 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2694 #endif
   2695 	},
   2696 	{
   2697 		ARM_UXTB, ARM_INS_UXTB,
   2698 #ifndef CAPSTONE_DIET
   2699 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2700 #endif
   2701 	},
   2702 	{
   2703 		ARM_UXTB16, ARM_INS_UXTB16,
   2704 #ifndef CAPSTONE_DIET
   2705 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2706 #endif
   2707 	},
   2708 	{
   2709 		ARM_UXTH, ARM_INS_UXTH,
   2710 #ifndef CAPSTONE_DIET
   2711 		{ 0 }, { 0 }, { ARM_GRP_ARM, ARM_GRP_V6, 0 }, 0, 0
   2712 #endif
   2713 	},
   2714 	{
   2715 		ARM_VABALsv2i64, ARM_INS_VABAL,
   2716 #ifndef CAPSTONE_DIET
   2717 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2718 #endif
   2719 	},
   2720 	{
   2721 		ARM_VABALsv4i32, ARM_INS_VABAL,
   2722 #ifndef CAPSTONE_DIET
   2723 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2724 #endif
   2725 	},
   2726 	{
   2727 		ARM_VABALsv8i16, ARM_INS_VABAL,
   2728 #ifndef CAPSTONE_DIET
   2729 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2730 #endif
   2731 	},
   2732 	{
   2733 		ARM_VABALuv2i64, ARM_INS_VABAL,
   2734 #ifndef CAPSTONE_DIET
   2735 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2736 #endif
   2737 	},
   2738 	{
   2739 		ARM_VABALuv4i32, ARM_INS_VABAL,
   2740 #ifndef CAPSTONE_DIET
   2741 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2742 #endif
   2743 	},
   2744 	{
   2745 		ARM_VABALuv8i16, ARM_INS_VABAL,
   2746 #ifndef CAPSTONE_DIET
   2747 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2748 #endif
   2749 	},
   2750 	{
   2751 		ARM_VABAsv16i8, ARM_INS_VABA,
   2752 #ifndef CAPSTONE_DIET
   2753 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2754 #endif
   2755 	},
   2756 	{
   2757 		ARM_VABAsv2i32, ARM_INS_VABA,
   2758 #ifndef CAPSTONE_DIET
   2759 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2760 #endif
   2761 	},
   2762 	{
   2763 		ARM_VABAsv4i16, ARM_INS_VABA,
   2764 #ifndef CAPSTONE_DIET
   2765 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2766 #endif
   2767 	},
   2768 	{
   2769 		ARM_VABAsv4i32, ARM_INS_VABA,
   2770 #ifndef CAPSTONE_DIET
   2771 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2772 #endif
   2773 	},
   2774 	{
   2775 		ARM_VABAsv8i16, ARM_INS_VABA,
   2776 #ifndef CAPSTONE_DIET
   2777 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2778 #endif
   2779 	},
   2780 	{
   2781 		ARM_VABAsv8i8, ARM_INS_VABA,
   2782 #ifndef CAPSTONE_DIET
   2783 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2784 #endif
   2785 	},
   2786 	{
   2787 		ARM_VABAuv16i8, ARM_INS_VABA,
   2788 #ifndef CAPSTONE_DIET
   2789 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2790 #endif
   2791 	},
   2792 	{
   2793 		ARM_VABAuv2i32, ARM_INS_VABA,
   2794 #ifndef CAPSTONE_DIET
   2795 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2796 #endif
   2797 	},
   2798 	{
   2799 		ARM_VABAuv4i16, ARM_INS_VABA,
   2800 #ifndef CAPSTONE_DIET
   2801 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2802 #endif
   2803 	},
   2804 	{
   2805 		ARM_VABAuv4i32, ARM_INS_VABA,
   2806 #ifndef CAPSTONE_DIET
   2807 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2808 #endif
   2809 	},
   2810 	{
   2811 		ARM_VABAuv8i16, ARM_INS_VABA,
   2812 #ifndef CAPSTONE_DIET
   2813 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2814 #endif
   2815 	},
   2816 	{
   2817 		ARM_VABAuv8i8, ARM_INS_VABA,
   2818 #ifndef CAPSTONE_DIET
   2819 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2820 #endif
   2821 	},
   2822 	{
   2823 		ARM_VABDLsv2i64, ARM_INS_VABDL,
   2824 #ifndef CAPSTONE_DIET
   2825 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2826 #endif
   2827 	},
   2828 	{
   2829 		ARM_VABDLsv4i32, ARM_INS_VABDL,
   2830 #ifndef CAPSTONE_DIET
   2831 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2832 #endif
   2833 	},
   2834 	{
   2835 		ARM_VABDLsv8i16, ARM_INS_VABDL,
   2836 #ifndef CAPSTONE_DIET
   2837 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2838 #endif
   2839 	},
   2840 	{
   2841 		ARM_VABDLuv2i64, ARM_INS_VABDL,
   2842 #ifndef CAPSTONE_DIET
   2843 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2844 #endif
   2845 	},
   2846 	{
   2847 		ARM_VABDLuv4i32, ARM_INS_VABDL,
   2848 #ifndef CAPSTONE_DIET
   2849 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2850 #endif
   2851 	},
   2852 	{
   2853 		ARM_VABDLuv8i16, ARM_INS_VABDL,
   2854 #ifndef CAPSTONE_DIET
   2855 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2856 #endif
   2857 	},
   2858 	{
   2859 		ARM_VABDfd, ARM_INS_VABD,
   2860 #ifndef CAPSTONE_DIET
   2861 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2862 #endif
   2863 	},
   2864 	{
   2865 		ARM_VABDfq, ARM_INS_VABD,
   2866 #ifndef CAPSTONE_DIET
   2867 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2868 #endif
   2869 	},
   2870 	{
   2871 		ARM_VABDsv16i8, ARM_INS_VABD,
   2872 #ifndef CAPSTONE_DIET
   2873 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2874 #endif
   2875 	},
   2876 	{
   2877 		ARM_VABDsv2i32, ARM_INS_VABD,
   2878 #ifndef CAPSTONE_DIET
   2879 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2880 #endif
   2881 	},
   2882 	{
   2883 		ARM_VABDsv4i16, ARM_INS_VABD,
   2884 #ifndef CAPSTONE_DIET
   2885 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2886 #endif
   2887 	},
   2888 	{
   2889 		ARM_VABDsv4i32, ARM_INS_VABD,
   2890 #ifndef CAPSTONE_DIET
   2891 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2892 #endif
   2893 	},
   2894 	{
   2895 		ARM_VABDsv8i16, ARM_INS_VABD,
   2896 #ifndef CAPSTONE_DIET
   2897 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2898 #endif
   2899 	},
   2900 	{
   2901 		ARM_VABDsv8i8, ARM_INS_VABD,
   2902 #ifndef CAPSTONE_DIET
   2903 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2904 #endif
   2905 	},
   2906 	{
   2907 		ARM_VABDuv16i8, ARM_INS_VABD,
   2908 #ifndef CAPSTONE_DIET
   2909 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2910 #endif
   2911 	},
   2912 	{
   2913 		ARM_VABDuv2i32, ARM_INS_VABD,
   2914 #ifndef CAPSTONE_DIET
   2915 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2916 #endif
   2917 	},
   2918 	{
   2919 		ARM_VABDuv4i16, ARM_INS_VABD,
   2920 #ifndef CAPSTONE_DIET
   2921 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2922 #endif
   2923 	},
   2924 	{
   2925 		ARM_VABDuv4i32, ARM_INS_VABD,
   2926 #ifndef CAPSTONE_DIET
   2927 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2928 #endif
   2929 	},
   2930 	{
   2931 		ARM_VABDuv8i16, ARM_INS_VABD,
   2932 #ifndef CAPSTONE_DIET
   2933 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2934 #endif
   2935 	},
   2936 	{
   2937 		ARM_VABDuv8i8, ARM_INS_VABD,
   2938 #ifndef CAPSTONE_DIET
   2939 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2940 #endif
   2941 	},
   2942 	{
   2943 		ARM_VABSD, ARM_INS_VABS,
   2944 #ifndef CAPSTONE_DIET
   2945 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   2946 #endif
   2947 	},
   2948 	{
   2949 		ARM_VABSS, ARM_INS_VABS,
   2950 #ifndef CAPSTONE_DIET
   2951 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   2952 #endif
   2953 	},
   2954 	{
   2955 		ARM_VABSfd, ARM_INS_VABS,
   2956 #ifndef CAPSTONE_DIET
   2957 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2958 #endif
   2959 	},
   2960 	{
   2961 		ARM_VABSfq, ARM_INS_VABS,
   2962 #ifndef CAPSTONE_DIET
   2963 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2964 #endif
   2965 	},
   2966 	{
   2967 		ARM_VABSv16i8, ARM_INS_VABS,
   2968 #ifndef CAPSTONE_DIET
   2969 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2970 #endif
   2971 	},
   2972 	{
   2973 		ARM_VABSv2i32, ARM_INS_VABS,
   2974 #ifndef CAPSTONE_DIET
   2975 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2976 #endif
   2977 	},
   2978 	{
   2979 		ARM_VABSv4i16, ARM_INS_VABS,
   2980 #ifndef CAPSTONE_DIET
   2981 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2982 #endif
   2983 	},
   2984 	{
   2985 		ARM_VABSv4i32, ARM_INS_VABS,
   2986 #ifndef CAPSTONE_DIET
   2987 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2988 #endif
   2989 	},
   2990 	{
   2991 		ARM_VABSv8i16, ARM_INS_VABS,
   2992 #ifndef CAPSTONE_DIET
   2993 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   2994 #endif
   2995 	},
   2996 	{
   2997 		ARM_VABSv8i8, ARM_INS_VABS,
   2998 #ifndef CAPSTONE_DIET
   2999 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3000 #endif
   3001 	},
   3002 	{
   3003 		ARM_VACGEd, ARM_INS_VACGE,
   3004 #ifndef CAPSTONE_DIET
   3005 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3006 #endif
   3007 	},
   3008 	{
   3009 		ARM_VACGEq, ARM_INS_VACGE,
   3010 #ifndef CAPSTONE_DIET
   3011 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3012 #endif
   3013 	},
   3014 	{
   3015 		ARM_VACGTd, ARM_INS_VACGT,
   3016 #ifndef CAPSTONE_DIET
   3017 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3018 #endif
   3019 	},
   3020 	{
   3021 		ARM_VACGTq, ARM_INS_VACGT,
   3022 #ifndef CAPSTONE_DIET
   3023 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3024 #endif
   3025 	},
   3026 	{
   3027 		ARM_VADDD, ARM_INS_VADD,
   3028 #ifndef CAPSTONE_DIET
   3029 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   3030 #endif
   3031 	},
   3032 	{
   3033 		ARM_VADDHNv2i32, ARM_INS_VADDHN,
   3034 #ifndef CAPSTONE_DIET
   3035 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3036 #endif
   3037 	},
   3038 	{
   3039 		ARM_VADDHNv4i16, ARM_INS_VADDHN,
   3040 #ifndef CAPSTONE_DIET
   3041 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3042 #endif
   3043 	},
   3044 	{
   3045 		ARM_VADDHNv8i8, ARM_INS_VADDHN,
   3046 #ifndef CAPSTONE_DIET
   3047 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3048 #endif
   3049 	},
   3050 	{
   3051 		ARM_VADDLsv2i64, ARM_INS_VADDL,
   3052 #ifndef CAPSTONE_DIET
   3053 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3054 #endif
   3055 	},
   3056 	{
   3057 		ARM_VADDLsv4i32, ARM_INS_VADDL,
   3058 #ifndef CAPSTONE_DIET
   3059 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3060 #endif
   3061 	},
   3062 	{
   3063 		ARM_VADDLsv8i16, ARM_INS_VADDL,
   3064 #ifndef CAPSTONE_DIET
   3065 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3066 #endif
   3067 	},
   3068 	{
   3069 		ARM_VADDLuv2i64, ARM_INS_VADDL,
   3070 #ifndef CAPSTONE_DIET
   3071 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3072 #endif
   3073 	},
   3074 	{
   3075 		ARM_VADDLuv4i32, ARM_INS_VADDL,
   3076 #ifndef CAPSTONE_DIET
   3077 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3078 #endif
   3079 	},
   3080 	{
   3081 		ARM_VADDLuv8i16, ARM_INS_VADDL,
   3082 #ifndef CAPSTONE_DIET
   3083 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3084 #endif
   3085 	},
   3086 	{
   3087 		ARM_VADDS, ARM_INS_VADD,
   3088 #ifndef CAPSTONE_DIET
   3089 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3090 #endif
   3091 	},
   3092 	{
   3093 		ARM_VADDWsv2i64, ARM_INS_VADDW,
   3094 #ifndef CAPSTONE_DIET
   3095 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3096 #endif
   3097 	},
   3098 	{
   3099 		ARM_VADDWsv4i32, ARM_INS_VADDW,
   3100 #ifndef CAPSTONE_DIET
   3101 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3102 #endif
   3103 	},
   3104 	{
   3105 		ARM_VADDWsv8i16, ARM_INS_VADDW,
   3106 #ifndef CAPSTONE_DIET
   3107 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3108 #endif
   3109 	},
   3110 	{
   3111 		ARM_VADDWuv2i64, ARM_INS_VADDW,
   3112 #ifndef CAPSTONE_DIET
   3113 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3114 #endif
   3115 	},
   3116 	{
   3117 		ARM_VADDWuv4i32, ARM_INS_VADDW,
   3118 #ifndef CAPSTONE_DIET
   3119 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3120 #endif
   3121 	},
   3122 	{
   3123 		ARM_VADDWuv8i16, ARM_INS_VADDW,
   3124 #ifndef CAPSTONE_DIET
   3125 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3126 #endif
   3127 	},
   3128 	{
   3129 		ARM_VADDfd, ARM_INS_VADD,
   3130 #ifndef CAPSTONE_DIET
   3131 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3132 #endif
   3133 	},
   3134 	{
   3135 		ARM_VADDfq, ARM_INS_VADD,
   3136 #ifndef CAPSTONE_DIET
   3137 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3138 #endif
   3139 	},
   3140 	{
   3141 		ARM_VADDv16i8, ARM_INS_VADD,
   3142 #ifndef CAPSTONE_DIET
   3143 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3144 #endif
   3145 	},
   3146 	{
   3147 		ARM_VADDv1i64, ARM_INS_VADD,
   3148 #ifndef CAPSTONE_DIET
   3149 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3150 #endif
   3151 	},
   3152 	{
   3153 		ARM_VADDv2i32, ARM_INS_VADD,
   3154 #ifndef CAPSTONE_DIET
   3155 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3156 #endif
   3157 	},
   3158 	{
   3159 		ARM_VADDv2i64, ARM_INS_VADD,
   3160 #ifndef CAPSTONE_DIET
   3161 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3162 #endif
   3163 	},
   3164 	{
   3165 		ARM_VADDv4i16, ARM_INS_VADD,
   3166 #ifndef CAPSTONE_DIET
   3167 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3168 #endif
   3169 	},
   3170 	{
   3171 		ARM_VADDv4i32, ARM_INS_VADD,
   3172 #ifndef CAPSTONE_DIET
   3173 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3174 #endif
   3175 	},
   3176 	{
   3177 		ARM_VADDv8i16, ARM_INS_VADD,
   3178 #ifndef CAPSTONE_DIET
   3179 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3180 #endif
   3181 	},
   3182 	{
   3183 		ARM_VADDv8i8, ARM_INS_VADD,
   3184 #ifndef CAPSTONE_DIET
   3185 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3186 #endif
   3187 	},
   3188 	{
   3189 		ARM_VANDd, ARM_INS_VAND,
   3190 #ifndef CAPSTONE_DIET
   3191 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3192 #endif
   3193 	},
   3194 	{
   3195 		ARM_VANDq, ARM_INS_VAND,
   3196 #ifndef CAPSTONE_DIET
   3197 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3198 #endif
   3199 	},
   3200 	{
   3201 		ARM_VBICd, ARM_INS_VBIC,
   3202 #ifndef CAPSTONE_DIET
   3203 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3204 #endif
   3205 	},
   3206 	{
   3207 		ARM_VBICiv2i32, ARM_INS_VBIC,
   3208 #ifndef CAPSTONE_DIET
   3209 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3210 #endif
   3211 	},
   3212 	{
   3213 		ARM_VBICiv4i16, ARM_INS_VBIC,
   3214 #ifndef CAPSTONE_DIET
   3215 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3216 #endif
   3217 	},
   3218 	{
   3219 		ARM_VBICiv4i32, ARM_INS_VBIC,
   3220 #ifndef CAPSTONE_DIET
   3221 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3222 #endif
   3223 	},
   3224 	{
   3225 		ARM_VBICiv8i16, ARM_INS_VBIC,
   3226 #ifndef CAPSTONE_DIET
   3227 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3228 #endif
   3229 	},
   3230 	{
   3231 		ARM_VBICq, ARM_INS_VBIC,
   3232 #ifndef CAPSTONE_DIET
   3233 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3234 #endif
   3235 	},
   3236 	{
   3237 		ARM_VBIFd, ARM_INS_VBIF,
   3238 #ifndef CAPSTONE_DIET
   3239 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3240 #endif
   3241 	},
   3242 	{
   3243 		ARM_VBIFq, ARM_INS_VBIF,
   3244 #ifndef CAPSTONE_DIET
   3245 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3246 #endif
   3247 	},
   3248 	{
   3249 		ARM_VBITd, ARM_INS_VBIT,
   3250 #ifndef CAPSTONE_DIET
   3251 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3252 #endif
   3253 	},
   3254 	{
   3255 		ARM_VBITq, ARM_INS_VBIT,
   3256 #ifndef CAPSTONE_DIET
   3257 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3258 #endif
   3259 	},
   3260 	{
   3261 		ARM_VBSLd, ARM_INS_VBSL,
   3262 #ifndef CAPSTONE_DIET
   3263 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3264 #endif
   3265 	},
   3266 	{
   3267 		ARM_VBSLq, ARM_INS_VBSL,
   3268 #ifndef CAPSTONE_DIET
   3269 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3270 #endif
   3271 	},
   3272 	{
   3273 		ARM_VCEQfd, ARM_INS_VCEQ,
   3274 #ifndef CAPSTONE_DIET
   3275 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3276 #endif
   3277 	},
   3278 	{
   3279 		ARM_VCEQfq, ARM_INS_VCEQ,
   3280 #ifndef CAPSTONE_DIET
   3281 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3282 #endif
   3283 	},
   3284 	{
   3285 		ARM_VCEQv16i8, ARM_INS_VCEQ,
   3286 #ifndef CAPSTONE_DIET
   3287 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3288 #endif
   3289 	},
   3290 	{
   3291 		ARM_VCEQv2i32, ARM_INS_VCEQ,
   3292 #ifndef CAPSTONE_DIET
   3293 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3294 #endif
   3295 	},
   3296 	{
   3297 		ARM_VCEQv4i16, ARM_INS_VCEQ,
   3298 #ifndef CAPSTONE_DIET
   3299 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3300 #endif
   3301 	},
   3302 	{
   3303 		ARM_VCEQv4i32, ARM_INS_VCEQ,
   3304 #ifndef CAPSTONE_DIET
   3305 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3306 #endif
   3307 	},
   3308 	{
   3309 		ARM_VCEQv8i16, ARM_INS_VCEQ,
   3310 #ifndef CAPSTONE_DIET
   3311 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3312 #endif
   3313 	},
   3314 	{
   3315 		ARM_VCEQv8i8, ARM_INS_VCEQ,
   3316 #ifndef CAPSTONE_DIET
   3317 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3318 #endif
   3319 	},
   3320 	{
   3321 		ARM_VCEQzv16i8, ARM_INS_VCEQ,
   3322 #ifndef CAPSTONE_DIET
   3323 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3324 #endif
   3325 	},
   3326 	{
   3327 		ARM_VCEQzv2f32, ARM_INS_VCEQ,
   3328 #ifndef CAPSTONE_DIET
   3329 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3330 #endif
   3331 	},
   3332 	{
   3333 		ARM_VCEQzv2i32, ARM_INS_VCEQ,
   3334 #ifndef CAPSTONE_DIET
   3335 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3336 #endif
   3337 	},
   3338 	{
   3339 		ARM_VCEQzv4f32, ARM_INS_VCEQ,
   3340 #ifndef CAPSTONE_DIET
   3341 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3342 #endif
   3343 	},
   3344 	{
   3345 		ARM_VCEQzv4i16, ARM_INS_VCEQ,
   3346 #ifndef CAPSTONE_DIET
   3347 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3348 #endif
   3349 	},
   3350 	{
   3351 		ARM_VCEQzv4i32, ARM_INS_VCEQ,
   3352 #ifndef CAPSTONE_DIET
   3353 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3354 #endif
   3355 	},
   3356 	{
   3357 		ARM_VCEQzv8i16, ARM_INS_VCEQ,
   3358 #ifndef CAPSTONE_DIET
   3359 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3360 #endif
   3361 	},
   3362 	{
   3363 		ARM_VCEQzv8i8, ARM_INS_VCEQ,
   3364 #ifndef CAPSTONE_DIET
   3365 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3366 #endif
   3367 	},
   3368 	{
   3369 		ARM_VCGEfd, ARM_INS_VCGE,
   3370 #ifndef CAPSTONE_DIET
   3371 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3372 #endif
   3373 	},
   3374 	{
   3375 		ARM_VCGEfq, ARM_INS_VCGE,
   3376 #ifndef CAPSTONE_DIET
   3377 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3378 #endif
   3379 	},
   3380 	{
   3381 		ARM_VCGEsv16i8, ARM_INS_VCGE,
   3382 #ifndef CAPSTONE_DIET
   3383 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3384 #endif
   3385 	},
   3386 	{
   3387 		ARM_VCGEsv2i32, ARM_INS_VCGE,
   3388 #ifndef CAPSTONE_DIET
   3389 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3390 #endif
   3391 	},
   3392 	{
   3393 		ARM_VCGEsv4i16, ARM_INS_VCGE,
   3394 #ifndef CAPSTONE_DIET
   3395 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3396 #endif
   3397 	},
   3398 	{
   3399 		ARM_VCGEsv4i32, ARM_INS_VCGE,
   3400 #ifndef CAPSTONE_DIET
   3401 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3402 #endif
   3403 	},
   3404 	{
   3405 		ARM_VCGEsv8i16, ARM_INS_VCGE,
   3406 #ifndef CAPSTONE_DIET
   3407 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3408 #endif
   3409 	},
   3410 	{
   3411 		ARM_VCGEsv8i8, ARM_INS_VCGE,
   3412 #ifndef CAPSTONE_DIET
   3413 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3414 #endif
   3415 	},
   3416 	{
   3417 		ARM_VCGEuv16i8, ARM_INS_VCGE,
   3418 #ifndef CAPSTONE_DIET
   3419 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3420 #endif
   3421 	},
   3422 	{
   3423 		ARM_VCGEuv2i32, ARM_INS_VCGE,
   3424 #ifndef CAPSTONE_DIET
   3425 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3426 #endif
   3427 	},
   3428 	{
   3429 		ARM_VCGEuv4i16, ARM_INS_VCGE,
   3430 #ifndef CAPSTONE_DIET
   3431 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3432 #endif
   3433 	},
   3434 	{
   3435 		ARM_VCGEuv4i32, ARM_INS_VCGE,
   3436 #ifndef CAPSTONE_DIET
   3437 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3438 #endif
   3439 	},
   3440 	{
   3441 		ARM_VCGEuv8i16, ARM_INS_VCGE,
   3442 #ifndef CAPSTONE_DIET
   3443 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3444 #endif
   3445 	},
   3446 	{
   3447 		ARM_VCGEuv8i8, ARM_INS_VCGE,
   3448 #ifndef CAPSTONE_DIET
   3449 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3450 #endif
   3451 	},
   3452 	{
   3453 		ARM_VCGEzv16i8, ARM_INS_VCGE,
   3454 #ifndef CAPSTONE_DIET
   3455 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3456 #endif
   3457 	},
   3458 	{
   3459 		ARM_VCGEzv2f32, ARM_INS_VCGE,
   3460 #ifndef CAPSTONE_DIET
   3461 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3462 #endif
   3463 	},
   3464 	{
   3465 		ARM_VCGEzv2i32, ARM_INS_VCGE,
   3466 #ifndef CAPSTONE_DIET
   3467 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3468 #endif
   3469 	},
   3470 	{
   3471 		ARM_VCGEzv4f32, ARM_INS_VCGE,
   3472 #ifndef CAPSTONE_DIET
   3473 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3474 #endif
   3475 	},
   3476 	{
   3477 		ARM_VCGEzv4i16, ARM_INS_VCGE,
   3478 #ifndef CAPSTONE_DIET
   3479 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3480 #endif
   3481 	},
   3482 	{
   3483 		ARM_VCGEzv4i32, ARM_INS_VCGE,
   3484 #ifndef CAPSTONE_DIET
   3485 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3486 #endif
   3487 	},
   3488 	{
   3489 		ARM_VCGEzv8i16, ARM_INS_VCGE,
   3490 #ifndef CAPSTONE_DIET
   3491 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3492 #endif
   3493 	},
   3494 	{
   3495 		ARM_VCGEzv8i8, ARM_INS_VCGE,
   3496 #ifndef CAPSTONE_DIET
   3497 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3498 #endif
   3499 	},
   3500 	{
   3501 		ARM_VCGTfd, ARM_INS_VCGT,
   3502 #ifndef CAPSTONE_DIET
   3503 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3504 #endif
   3505 	},
   3506 	{
   3507 		ARM_VCGTfq, ARM_INS_VCGT,
   3508 #ifndef CAPSTONE_DIET
   3509 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3510 #endif
   3511 	},
   3512 	{
   3513 		ARM_VCGTsv16i8, ARM_INS_VCGT,
   3514 #ifndef CAPSTONE_DIET
   3515 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3516 #endif
   3517 	},
   3518 	{
   3519 		ARM_VCGTsv2i32, ARM_INS_VCGT,
   3520 #ifndef CAPSTONE_DIET
   3521 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3522 #endif
   3523 	},
   3524 	{
   3525 		ARM_VCGTsv4i16, ARM_INS_VCGT,
   3526 #ifndef CAPSTONE_DIET
   3527 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3528 #endif
   3529 	},
   3530 	{
   3531 		ARM_VCGTsv4i32, ARM_INS_VCGT,
   3532 #ifndef CAPSTONE_DIET
   3533 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3534 #endif
   3535 	},
   3536 	{
   3537 		ARM_VCGTsv8i16, ARM_INS_VCGT,
   3538 #ifndef CAPSTONE_DIET
   3539 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3540 #endif
   3541 	},
   3542 	{
   3543 		ARM_VCGTsv8i8, ARM_INS_VCGT,
   3544 #ifndef CAPSTONE_DIET
   3545 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3546 #endif
   3547 	},
   3548 	{
   3549 		ARM_VCGTuv16i8, ARM_INS_VCGT,
   3550 #ifndef CAPSTONE_DIET
   3551 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3552 #endif
   3553 	},
   3554 	{
   3555 		ARM_VCGTuv2i32, ARM_INS_VCGT,
   3556 #ifndef CAPSTONE_DIET
   3557 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3558 #endif
   3559 	},
   3560 	{
   3561 		ARM_VCGTuv4i16, ARM_INS_VCGT,
   3562 #ifndef CAPSTONE_DIET
   3563 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3564 #endif
   3565 	},
   3566 	{
   3567 		ARM_VCGTuv4i32, ARM_INS_VCGT,
   3568 #ifndef CAPSTONE_DIET
   3569 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3570 #endif
   3571 	},
   3572 	{
   3573 		ARM_VCGTuv8i16, ARM_INS_VCGT,
   3574 #ifndef CAPSTONE_DIET
   3575 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3576 #endif
   3577 	},
   3578 	{
   3579 		ARM_VCGTuv8i8, ARM_INS_VCGT,
   3580 #ifndef CAPSTONE_DIET
   3581 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3582 #endif
   3583 	},
   3584 	{
   3585 		ARM_VCGTzv16i8, ARM_INS_VCGT,
   3586 #ifndef CAPSTONE_DIET
   3587 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3588 #endif
   3589 	},
   3590 	{
   3591 		ARM_VCGTzv2f32, ARM_INS_VCGT,
   3592 #ifndef CAPSTONE_DIET
   3593 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3594 #endif
   3595 	},
   3596 	{
   3597 		ARM_VCGTzv2i32, ARM_INS_VCGT,
   3598 #ifndef CAPSTONE_DIET
   3599 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3600 #endif
   3601 	},
   3602 	{
   3603 		ARM_VCGTzv4f32, ARM_INS_VCGT,
   3604 #ifndef CAPSTONE_DIET
   3605 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3606 #endif
   3607 	},
   3608 	{
   3609 		ARM_VCGTzv4i16, ARM_INS_VCGT,
   3610 #ifndef CAPSTONE_DIET
   3611 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3612 #endif
   3613 	},
   3614 	{
   3615 		ARM_VCGTzv4i32, ARM_INS_VCGT,
   3616 #ifndef CAPSTONE_DIET
   3617 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3618 #endif
   3619 	},
   3620 	{
   3621 		ARM_VCGTzv8i16, ARM_INS_VCGT,
   3622 #ifndef CAPSTONE_DIET
   3623 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3624 #endif
   3625 	},
   3626 	{
   3627 		ARM_VCGTzv8i8, ARM_INS_VCGT,
   3628 #ifndef CAPSTONE_DIET
   3629 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3630 #endif
   3631 	},
   3632 	{
   3633 		ARM_VCLEzv16i8, ARM_INS_VCLE,
   3634 #ifndef CAPSTONE_DIET
   3635 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3636 #endif
   3637 	},
   3638 	{
   3639 		ARM_VCLEzv2f32, ARM_INS_VCLE,
   3640 #ifndef CAPSTONE_DIET
   3641 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3642 #endif
   3643 	},
   3644 	{
   3645 		ARM_VCLEzv2i32, ARM_INS_VCLE,
   3646 #ifndef CAPSTONE_DIET
   3647 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3648 #endif
   3649 	},
   3650 	{
   3651 		ARM_VCLEzv4f32, ARM_INS_VCLE,
   3652 #ifndef CAPSTONE_DIET
   3653 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3654 #endif
   3655 	},
   3656 	{
   3657 		ARM_VCLEzv4i16, ARM_INS_VCLE,
   3658 #ifndef CAPSTONE_DIET
   3659 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3660 #endif
   3661 	},
   3662 	{
   3663 		ARM_VCLEzv4i32, ARM_INS_VCLE,
   3664 #ifndef CAPSTONE_DIET
   3665 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3666 #endif
   3667 	},
   3668 	{
   3669 		ARM_VCLEzv8i16, ARM_INS_VCLE,
   3670 #ifndef CAPSTONE_DIET
   3671 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3672 #endif
   3673 	},
   3674 	{
   3675 		ARM_VCLEzv8i8, ARM_INS_VCLE,
   3676 #ifndef CAPSTONE_DIET
   3677 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3678 #endif
   3679 	},
   3680 	{
   3681 		ARM_VCLSv16i8, ARM_INS_VCLS,
   3682 #ifndef CAPSTONE_DIET
   3683 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3684 #endif
   3685 	},
   3686 	{
   3687 		ARM_VCLSv2i32, ARM_INS_VCLS,
   3688 #ifndef CAPSTONE_DIET
   3689 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3690 #endif
   3691 	},
   3692 	{
   3693 		ARM_VCLSv4i16, ARM_INS_VCLS,
   3694 #ifndef CAPSTONE_DIET
   3695 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3696 #endif
   3697 	},
   3698 	{
   3699 		ARM_VCLSv4i32, ARM_INS_VCLS,
   3700 #ifndef CAPSTONE_DIET
   3701 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3702 #endif
   3703 	},
   3704 	{
   3705 		ARM_VCLSv8i16, ARM_INS_VCLS,
   3706 #ifndef CAPSTONE_DIET
   3707 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3708 #endif
   3709 	},
   3710 	{
   3711 		ARM_VCLSv8i8, ARM_INS_VCLS,
   3712 #ifndef CAPSTONE_DIET
   3713 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3714 #endif
   3715 	},
   3716 	{
   3717 		ARM_VCLTzv16i8, ARM_INS_VCLT,
   3718 #ifndef CAPSTONE_DIET
   3719 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3720 #endif
   3721 	},
   3722 	{
   3723 		ARM_VCLTzv2f32, ARM_INS_VCLT,
   3724 #ifndef CAPSTONE_DIET
   3725 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3726 #endif
   3727 	},
   3728 	{
   3729 		ARM_VCLTzv2i32, ARM_INS_VCLT,
   3730 #ifndef CAPSTONE_DIET
   3731 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3732 #endif
   3733 	},
   3734 	{
   3735 		ARM_VCLTzv4f32, ARM_INS_VCLT,
   3736 #ifndef CAPSTONE_DIET
   3737 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3738 #endif
   3739 	},
   3740 	{
   3741 		ARM_VCLTzv4i16, ARM_INS_VCLT,
   3742 #ifndef CAPSTONE_DIET
   3743 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3744 #endif
   3745 	},
   3746 	{
   3747 		ARM_VCLTzv4i32, ARM_INS_VCLT,
   3748 #ifndef CAPSTONE_DIET
   3749 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3750 #endif
   3751 	},
   3752 	{
   3753 		ARM_VCLTzv8i16, ARM_INS_VCLT,
   3754 #ifndef CAPSTONE_DIET
   3755 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3756 #endif
   3757 	},
   3758 	{
   3759 		ARM_VCLTzv8i8, ARM_INS_VCLT,
   3760 #ifndef CAPSTONE_DIET
   3761 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3762 #endif
   3763 	},
   3764 	{
   3765 		ARM_VCLZv16i8, ARM_INS_VCLZ,
   3766 #ifndef CAPSTONE_DIET
   3767 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3768 #endif
   3769 	},
   3770 	{
   3771 		ARM_VCLZv2i32, ARM_INS_VCLZ,
   3772 #ifndef CAPSTONE_DIET
   3773 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3774 #endif
   3775 	},
   3776 	{
   3777 		ARM_VCLZv4i16, ARM_INS_VCLZ,
   3778 #ifndef CAPSTONE_DIET
   3779 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3780 #endif
   3781 	},
   3782 	{
   3783 		ARM_VCLZv4i32, ARM_INS_VCLZ,
   3784 #ifndef CAPSTONE_DIET
   3785 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3786 #endif
   3787 	},
   3788 	{
   3789 		ARM_VCLZv8i16, ARM_INS_VCLZ,
   3790 #ifndef CAPSTONE_DIET
   3791 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3792 #endif
   3793 	},
   3794 	{
   3795 		ARM_VCLZv8i8, ARM_INS_VCLZ,
   3796 #ifndef CAPSTONE_DIET
   3797 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3798 #endif
   3799 	},
   3800 	{
   3801 		ARM_VCMPD, ARM_INS_VCMP,
   3802 #ifndef CAPSTONE_DIET
   3803 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   3804 #endif
   3805 	},
   3806 	{
   3807 		ARM_VCMPED, ARM_INS_VCMPE,
   3808 #ifndef CAPSTONE_DIET
   3809 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   3810 #endif
   3811 	},
   3812 	{
   3813 		ARM_VCMPES, ARM_INS_VCMPE,
   3814 #ifndef CAPSTONE_DIET
   3815 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3816 #endif
   3817 	},
   3818 	{
   3819 		ARM_VCMPEZD, ARM_INS_VCMPE,
   3820 #ifndef CAPSTONE_DIET
   3821 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   3822 #endif
   3823 	},
   3824 	{
   3825 		ARM_VCMPEZS, ARM_INS_VCMPE,
   3826 #ifndef CAPSTONE_DIET
   3827 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3828 #endif
   3829 	},
   3830 	{
   3831 		ARM_VCMPS, ARM_INS_VCMP,
   3832 #ifndef CAPSTONE_DIET
   3833 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3834 #endif
   3835 	},
   3836 	{
   3837 		ARM_VCMPZD, ARM_INS_VCMP,
   3838 #ifndef CAPSTONE_DIET
   3839 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   3840 #endif
   3841 	},
   3842 	{
   3843 		ARM_VCMPZS, ARM_INS_VCMP,
   3844 #ifndef CAPSTONE_DIET
   3845 		{ 0 }, { ARM_REG_FPSCR_NZCV, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3846 #endif
   3847 	},
   3848 	{
   3849 		ARM_VCNTd, ARM_INS_VCNT,
   3850 #ifndef CAPSTONE_DIET
   3851 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3852 #endif
   3853 	},
   3854 	{
   3855 		ARM_VCNTq, ARM_INS_VCNT,
   3856 #ifndef CAPSTONE_DIET
   3857 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   3858 #endif
   3859 	},
   3860 	{
   3861 		ARM_VCVTANSD, ARM_INS_VCVTA,
   3862 #ifndef CAPSTONE_DIET
   3863 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3864 #endif
   3865 	},
   3866 	{
   3867 		ARM_VCVTANSQ, ARM_INS_VCVTA,
   3868 #ifndef CAPSTONE_DIET
   3869 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3870 #endif
   3871 	},
   3872 	{
   3873 		ARM_VCVTANUD, ARM_INS_VCVTA,
   3874 #ifndef CAPSTONE_DIET
   3875 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3876 #endif
   3877 	},
   3878 	{
   3879 		ARM_VCVTANUQ, ARM_INS_VCVTA,
   3880 #ifndef CAPSTONE_DIET
   3881 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3882 #endif
   3883 	},
   3884 	{
   3885 		ARM_VCVTASD, ARM_INS_VCVTA,
   3886 #ifndef CAPSTONE_DIET
   3887 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   3888 #endif
   3889 	},
   3890 	{
   3891 		ARM_VCVTASS, ARM_INS_VCVTA,
   3892 #ifndef CAPSTONE_DIET
   3893 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   3894 #endif
   3895 	},
   3896 	{
   3897 		ARM_VCVTAUD, ARM_INS_VCVTA,
   3898 #ifndef CAPSTONE_DIET
   3899 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   3900 #endif
   3901 	},
   3902 	{
   3903 		ARM_VCVTAUS, ARM_INS_VCVTA,
   3904 #ifndef CAPSTONE_DIET
   3905 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   3906 #endif
   3907 	},
   3908 	{
   3909 		ARM_VCVTBDH, ARM_INS_VCVTB,
   3910 #ifndef CAPSTONE_DIET
   3911 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   3912 #endif
   3913 	},
   3914 	{
   3915 		ARM_VCVTBHD, ARM_INS_VCVTB,
   3916 #ifndef CAPSTONE_DIET
   3917 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   3918 #endif
   3919 	},
   3920 	{
   3921 		ARM_VCVTBHS, ARM_INS_VCVTB,
   3922 #ifndef CAPSTONE_DIET
   3923 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3924 #endif
   3925 	},
   3926 	{
   3927 		ARM_VCVTBSH, ARM_INS_VCVTB,
   3928 #ifndef CAPSTONE_DIET
   3929 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3930 #endif
   3931 	},
   3932 	{
   3933 		ARM_VCVTDS, ARM_INS_VCVT,
   3934 #ifndef CAPSTONE_DIET
   3935 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   3936 #endif
   3937 	},
   3938 	{
   3939 		ARM_VCVTMNSD, ARM_INS_VCVTM,
   3940 #ifndef CAPSTONE_DIET
   3941 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3942 #endif
   3943 	},
   3944 	{
   3945 		ARM_VCVTMNSQ, ARM_INS_VCVTM,
   3946 #ifndef CAPSTONE_DIET
   3947 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3948 #endif
   3949 	},
   3950 	{
   3951 		ARM_VCVTMNUD, ARM_INS_VCVTM,
   3952 #ifndef CAPSTONE_DIET
   3953 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3954 #endif
   3955 	},
   3956 	{
   3957 		ARM_VCVTMNUQ, ARM_INS_VCVTM,
   3958 #ifndef CAPSTONE_DIET
   3959 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3960 #endif
   3961 	},
   3962 	{
   3963 		ARM_VCVTMSD, ARM_INS_VCVTM,
   3964 #ifndef CAPSTONE_DIET
   3965 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   3966 #endif
   3967 	},
   3968 	{
   3969 		ARM_VCVTMSS, ARM_INS_VCVTM,
   3970 #ifndef CAPSTONE_DIET
   3971 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   3972 #endif
   3973 	},
   3974 	{
   3975 		ARM_VCVTMUD, ARM_INS_VCVTM,
   3976 #ifndef CAPSTONE_DIET
   3977 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   3978 #endif
   3979 	},
   3980 	{
   3981 		ARM_VCVTMUS, ARM_INS_VCVTM,
   3982 #ifndef CAPSTONE_DIET
   3983 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   3984 #endif
   3985 	},
   3986 	{
   3987 		ARM_VCVTNNSD, ARM_INS_VCVTN,
   3988 #ifndef CAPSTONE_DIET
   3989 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3990 #endif
   3991 	},
   3992 	{
   3993 		ARM_VCVTNNSQ, ARM_INS_VCVTN,
   3994 #ifndef CAPSTONE_DIET
   3995 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   3996 #endif
   3997 	},
   3998 	{
   3999 		ARM_VCVTNNUD, ARM_INS_VCVTN,
   4000 #ifndef CAPSTONE_DIET
   4001 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   4002 #endif
   4003 	},
   4004 	{
   4005 		ARM_VCVTNNUQ, ARM_INS_VCVTN,
   4006 #ifndef CAPSTONE_DIET
   4007 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   4008 #endif
   4009 	},
   4010 	{
   4011 		ARM_VCVTNSD, ARM_INS_VCVTN,
   4012 #ifndef CAPSTONE_DIET
   4013 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   4014 #endif
   4015 	},
   4016 	{
   4017 		ARM_VCVTNSS, ARM_INS_VCVTN,
   4018 #ifndef CAPSTONE_DIET
   4019 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   4020 #endif
   4021 	},
   4022 	{
   4023 		ARM_VCVTNUD, ARM_INS_VCVTN,
   4024 #ifndef CAPSTONE_DIET
   4025 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   4026 #endif
   4027 	},
   4028 	{
   4029 		ARM_VCVTNUS, ARM_INS_VCVTN,
   4030 #ifndef CAPSTONE_DIET
   4031 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   4032 #endif
   4033 	},
   4034 	{
   4035 		ARM_VCVTPNSD, ARM_INS_VCVTP,
   4036 #ifndef CAPSTONE_DIET
   4037 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   4038 #endif
   4039 	},
   4040 	{
   4041 		ARM_VCVTPNSQ, ARM_INS_VCVTP,
   4042 #ifndef CAPSTONE_DIET
   4043 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   4044 #endif
   4045 	},
   4046 	{
   4047 		ARM_VCVTPNUD, ARM_INS_VCVTP,
   4048 #ifndef CAPSTONE_DIET
   4049 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   4050 #endif
   4051 	},
   4052 	{
   4053 		ARM_VCVTPNUQ, ARM_INS_VCVTP,
   4054 #ifndef CAPSTONE_DIET
   4055 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   4056 #endif
   4057 	},
   4058 	{
   4059 		ARM_VCVTPSD, ARM_INS_VCVTP,
   4060 #ifndef CAPSTONE_DIET
   4061 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   4062 #endif
   4063 	},
   4064 	{
   4065 		ARM_VCVTPSS, ARM_INS_VCVTP,
   4066 #ifndef CAPSTONE_DIET
   4067 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   4068 #endif
   4069 	},
   4070 	{
   4071 		ARM_VCVTPUD, ARM_INS_VCVTP,
   4072 #ifndef CAPSTONE_DIET
   4073 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   4074 #endif
   4075 	},
   4076 	{
   4077 		ARM_VCVTPUS, ARM_INS_VCVTP,
   4078 #ifndef CAPSTONE_DIET
   4079 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   4080 #endif
   4081 	},
   4082 	{
   4083 		ARM_VCVTSD, ARM_INS_VCVT,
   4084 #ifndef CAPSTONE_DIET
   4085 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   4086 #endif
   4087 	},
   4088 	{
   4089 		ARM_VCVTTDH, ARM_INS_VCVTT,
   4090 #ifndef CAPSTONE_DIET
   4091 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   4092 #endif
   4093 	},
   4094 	{
   4095 		ARM_VCVTTHD, ARM_INS_VCVTT,
   4096 #ifndef CAPSTONE_DIET
   4097 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   4098 #endif
   4099 	},
   4100 	{
   4101 		ARM_VCVTTHS, ARM_INS_VCVTT,
   4102 #ifndef CAPSTONE_DIET
   4103 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   4104 #endif
   4105 	},
   4106 	{
   4107 		ARM_VCVTTSH, ARM_INS_VCVTT,
   4108 #ifndef CAPSTONE_DIET
   4109 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   4110 #endif
   4111 	},
   4112 	{
   4113 		ARM_VCVTf2h, ARM_INS_VCVT,
   4114 #ifndef CAPSTONE_DIET
   4115 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4116 #endif
   4117 	},
   4118 	{
   4119 		ARM_VCVTf2sd, ARM_INS_VCVT,
   4120 #ifndef CAPSTONE_DIET
   4121 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4122 #endif
   4123 	},
   4124 	{
   4125 		ARM_VCVTf2sq, ARM_INS_VCVT,
   4126 #ifndef CAPSTONE_DIET
   4127 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4128 #endif
   4129 	},
   4130 	{
   4131 		ARM_VCVTf2ud, ARM_INS_VCVT,
   4132 #ifndef CAPSTONE_DIET
   4133 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4134 #endif
   4135 	},
   4136 	{
   4137 		ARM_VCVTf2uq, ARM_INS_VCVT,
   4138 #ifndef CAPSTONE_DIET
   4139 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4140 #endif
   4141 	},
   4142 	{
   4143 		ARM_VCVTf2xsd, ARM_INS_VCVT,
   4144 #ifndef CAPSTONE_DIET
   4145 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4146 #endif
   4147 	},
   4148 	{
   4149 		ARM_VCVTf2xsq, ARM_INS_VCVT,
   4150 #ifndef CAPSTONE_DIET
   4151 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4152 #endif
   4153 	},
   4154 	{
   4155 		ARM_VCVTf2xud, ARM_INS_VCVT,
   4156 #ifndef CAPSTONE_DIET
   4157 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4158 #endif
   4159 	},
   4160 	{
   4161 		ARM_VCVTf2xuq, ARM_INS_VCVT,
   4162 #ifndef CAPSTONE_DIET
   4163 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4164 #endif
   4165 	},
   4166 	{
   4167 		ARM_VCVTh2f, ARM_INS_VCVT,
   4168 #ifndef CAPSTONE_DIET
   4169 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4170 #endif
   4171 	},
   4172 	{
   4173 		ARM_VCVTs2fd, ARM_INS_VCVT,
   4174 #ifndef CAPSTONE_DIET
   4175 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4176 #endif
   4177 	},
   4178 	{
   4179 		ARM_VCVTs2fq, ARM_INS_VCVT,
   4180 #ifndef CAPSTONE_DIET
   4181 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4182 #endif
   4183 	},
   4184 	{
   4185 		ARM_VCVTu2fd, ARM_INS_VCVT,
   4186 #ifndef CAPSTONE_DIET
   4187 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4188 #endif
   4189 	},
   4190 	{
   4191 		ARM_VCVTu2fq, ARM_INS_VCVT,
   4192 #ifndef CAPSTONE_DIET
   4193 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4194 #endif
   4195 	},
   4196 	{
   4197 		ARM_VCVTxs2fd, ARM_INS_VCVT,
   4198 #ifndef CAPSTONE_DIET
   4199 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4200 #endif
   4201 	},
   4202 	{
   4203 		ARM_VCVTxs2fq, ARM_INS_VCVT,
   4204 #ifndef CAPSTONE_DIET
   4205 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4206 #endif
   4207 	},
   4208 	{
   4209 		ARM_VCVTxu2fd, ARM_INS_VCVT,
   4210 #ifndef CAPSTONE_DIET
   4211 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4212 #endif
   4213 	},
   4214 	{
   4215 		ARM_VCVTxu2fq, ARM_INS_VCVT,
   4216 #ifndef CAPSTONE_DIET
   4217 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4218 #endif
   4219 	},
   4220 	{
   4221 		ARM_VDIVD, ARM_INS_VDIV,
   4222 #ifndef CAPSTONE_DIET
   4223 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   4224 #endif
   4225 	},
   4226 	{
   4227 		ARM_VDIVS, ARM_INS_VDIV,
   4228 #ifndef CAPSTONE_DIET
   4229 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   4230 #endif
   4231 	},
   4232 	{
   4233 		ARM_VDUP16d, ARM_INS_VDUP,
   4234 #ifndef CAPSTONE_DIET
   4235 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4236 #endif
   4237 	},
   4238 	{
   4239 		ARM_VDUP16q, ARM_INS_VDUP,
   4240 #ifndef CAPSTONE_DIET
   4241 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4242 #endif
   4243 	},
   4244 	{
   4245 		ARM_VDUP32d, ARM_INS_VDUP,
   4246 #ifndef CAPSTONE_DIET
   4247 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4248 #endif
   4249 	},
   4250 	{
   4251 		ARM_VDUP32q, ARM_INS_VDUP,
   4252 #ifndef CAPSTONE_DIET
   4253 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4254 #endif
   4255 	},
   4256 	{
   4257 		ARM_VDUP8d, ARM_INS_VDUP,
   4258 #ifndef CAPSTONE_DIET
   4259 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4260 #endif
   4261 	},
   4262 	{
   4263 		ARM_VDUP8q, ARM_INS_VDUP,
   4264 #ifndef CAPSTONE_DIET
   4265 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4266 #endif
   4267 	},
   4268 	{
   4269 		ARM_VDUPLN16d, ARM_INS_VDUP,
   4270 #ifndef CAPSTONE_DIET
   4271 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4272 #endif
   4273 	},
   4274 	{
   4275 		ARM_VDUPLN16q, ARM_INS_VDUP,
   4276 #ifndef CAPSTONE_DIET
   4277 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4278 #endif
   4279 	},
   4280 	{
   4281 		ARM_VDUPLN32d, ARM_INS_VDUP,
   4282 #ifndef CAPSTONE_DIET
   4283 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4284 #endif
   4285 	},
   4286 	{
   4287 		ARM_VDUPLN32q, ARM_INS_VDUP,
   4288 #ifndef CAPSTONE_DIET
   4289 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4290 #endif
   4291 	},
   4292 	{
   4293 		ARM_VDUPLN8d, ARM_INS_VDUP,
   4294 #ifndef CAPSTONE_DIET
   4295 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4296 #endif
   4297 	},
   4298 	{
   4299 		ARM_VDUPLN8q, ARM_INS_VDUP,
   4300 #ifndef CAPSTONE_DIET
   4301 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4302 #endif
   4303 	},
   4304 	{
   4305 		ARM_VEORd, ARM_INS_VEOR,
   4306 #ifndef CAPSTONE_DIET
   4307 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4308 #endif
   4309 	},
   4310 	{
   4311 		ARM_VEORq, ARM_INS_VEOR,
   4312 #ifndef CAPSTONE_DIET
   4313 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4314 #endif
   4315 	},
   4316 	{
   4317 		ARM_VEXTd16, ARM_INS_VEXT,
   4318 #ifndef CAPSTONE_DIET
   4319 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4320 #endif
   4321 	},
   4322 	{
   4323 		ARM_VEXTd32, ARM_INS_VEXT,
   4324 #ifndef CAPSTONE_DIET
   4325 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4326 #endif
   4327 	},
   4328 	{
   4329 		ARM_VEXTd8, ARM_INS_VEXT,
   4330 #ifndef CAPSTONE_DIET
   4331 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4332 #endif
   4333 	},
   4334 	{
   4335 		ARM_VEXTq16, ARM_INS_VEXT,
   4336 #ifndef CAPSTONE_DIET
   4337 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4338 #endif
   4339 	},
   4340 	{
   4341 		ARM_VEXTq32, ARM_INS_VEXT,
   4342 #ifndef CAPSTONE_DIET
   4343 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4344 #endif
   4345 	},
   4346 	{
   4347 		ARM_VEXTq64, ARM_INS_VEXT,
   4348 #ifndef CAPSTONE_DIET
   4349 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4350 #endif
   4351 	},
   4352 	{
   4353 		ARM_VEXTq8, ARM_INS_VEXT,
   4354 #ifndef CAPSTONE_DIET
   4355 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4356 #endif
   4357 	},
   4358 	{
   4359 		ARM_VFMAD, ARM_INS_VFMA,
   4360 #ifndef CAPSTONE_DIET
   4361 		{ 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
   4362 #endif
   4363 	},
   4364 	{
   4365 		ARM_VFMAS, ARM_INS_VFMA,
   4366 #ifndef CAPSTONE_DIET
   4367 		{ 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
   4368 #endif
   4369 	},
   4370 	{
   4371 		ARM_VFMAfd, ARM_INS_VFMA,
   4372 #ifndef CAPSTONE_DIET
   4373 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
   4374 #endif
   4375 	},
   4376 	{
   4377 		ARM_VFMAfq, ARM_INS_VFMA,
   4378 #ifndef CAPSTONE_DIET
   4379 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
   4380 #endif
   4381 	},
   4382 	{
   4383 		ARM_VFMSD, ARM_INS_VFMS,
   4384 #ifndef CAPSTONE_DIET
   4385 		{ 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
   4386 #endif
   4387 	},
   4388 	{
   4389 		ARM_VFMSS, ARM_INS_VFMS,
   4390 #ifndef CAPSTONE_DIET
   4391 		{ 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
   4392 #endif
   4393 	},
   4394 	{
   4395 		ARM_VFMSfd, ARM_INS_VFMS,
   4396 #ifndef CAPSTONE_DIET
   4397 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
   4398 #endif
   4399 	},
   4400 	{
   4401 		ARM_VFMSfq, ARM_INS_VFMS,
   4402 #ifndef CAPSTONE_DIET
   4403 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_VFP4, 0 }, 0, 0
   4404 #endif
   4405 	},
   4406 	{
   4407 		ARM_VFNMAD, ARM_INS_VFNMA,
   4408 #ifndef CAPSTONE_DIET
   4409 		{ 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
   4410 #endif
   4411 	},
   4412 	{
   4413 		ARM_VFNMAS, ARM_INS_VFNMA,
   4414 #ifndef CAPSTONE_DIET
   4415 		{ 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
   4416 #endif
   4417 	},
   4418 	{
   4419 		ARM_VFNMSD, ARM_INS_VFNMS,
   4420 #ifndef CAPSTONE_DIET
   4421 		{ 0 }, { 0 }, { ARM_GRP_VFP4, ARM_GRP_DPVFP, 0 }, 0, 0
   4422 #endif
   4423 	},
   4424 	{
   4425 		ARM_VFNMSS, ARM_INS_VFNMS,
   4426 #ifndef CAPSTONE_DIET
   4427 		{ 0 }, { 0 }, { ARM_GRP_VFP4, 0 }, 0, 0
   4428 #endif
   4429 	},
   4430 	{
   4431 		ARM_VGETLNi32, ARM_INS_VMOV,
   4432 #ifndef CAPSTONE_DIET
   4433 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4434 #endif
   4435 	},
   4436 	{
   4437 		ARM_VGETLNs16, ARM_INS_VMOV,
   4438 #ifndef CAPSTONE_DIET
   4439 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4440 #endif
   4441 	},
   4442 	{
   4443 		ARM_VGETLNs8, ARM_INS_VMOV,
   4444 #ifndef CAPSTONE_DIET
   4445 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4446 #endif
   4447 	},
   4448 	{
   4449 		ARM_VGETLNu16, ARM_INS_VMOV,
   4450 #ifndef CAPSTONE_DIET
   4451 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4452 #endif
   4453 	},
   4454 	{
   4455 		ARM_VGETLNu8, ARM_INS_VMOV,
   4456 #ifndef CAPSTONE_DIET
   4457 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4458 #endif
   4459 	},
   4460 	{
   4461 		ARM_VHADDsv16i8, ARM_INS_VHADD,
   4462 #ifndef CAPSTONE_DIET
   4463 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4464 #endif
   4465 	},
   4466 	{
   4467 		ARM_VHADDsv2i32, ARM_INS_VHADD,
   4468 #ifndef CAPSTONE_DIET
   4469 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4470 #endif
   4471 	},
   4472 	{
   4473 		ARM_VHADDsv4i16, ARM_INS_VHADD,
   4474 #ifndef CAPSTONE_DIET
   4475 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4476 #endif
   4477 	},
   4478 	{
   4479 		ARM_VHADDsv4i32, ARM_INS_VHADD,
   4480 #ifndef CAPSTONE_DIET
   4481 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4482 #endif
   4483 	},
   4484 	{
   4485 		ARM_VHADDsv8i16, ARM_INS_VHADD,
   4486 #ifndef CAPSTONE_DIET
   4487 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4488 #endif
   4489 	},
   4490 	{
   4491 		ARM_VHADDsv8i8, ARM_INS_VHADD,
   4492 #ifndef CAPSTONE_DIET
   4493 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4494 #endif
   4495 	},
   4496 	{
   4497 		ARM_VHADDuv16i8, ARM_INS_VHADD,
   4498 #ifndef CAPSTONE_DIET
   4499 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4500 #endif
   4501 	},
   4502 	{
   4503 		ARM_VHADDuv2i32, ARM_INS_VHADD,
   4504 #ifndef CAPSTONE_DIET
   4505 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4506 #endif
   4507 	},
   4508 	{
   4509 		ARM_VHADDuv4i16, ARM_INS_VHADD,
   4510 #ifndef CAPSTONE_DIET
   4511 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4512 #endif
   4513 	},
   4514 	{
   4515 		ARM_VHADDuv4i32, ARM_INS_VHADD,
   4516 #ifndef CAPSTONE_DIET
   4517 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4518 #endif
   4519 	},
   4520 	{
   4521 		ARM_VHADDuv8i16, ARM_INS_VHADD,
   4522 #ifndef CAPSTONE_DIET
   4523 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4524 #endif
   4525 	},
   4526 	{
   4527 		ARM_VHADDuv8i8, ARM_INS_VHADD,
   4528 #ifndef CAPSTONE_DIET
   4529 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4530 #endif
   4531 	},
   4532 	{
   4533 		ARM_VHSUBsv16i8, ARM_INS_VHSUB,
   4534 #ifndef CAPSTONE_DIET
   4535 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4536 #endif
   4537 	},
   4538 	{
   4539 		ARM_VHSUBsv2i32, ARM_INS_VHSUB,
   4540 #ifndef CAPSTONE_DIET
   4541 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4542 #endif
   4543 	},
   4544 	{
   4545 		ARM_VHSUBsv4i16, ARM_INS_VHSUB,
   4546 #ifndef CAPSTONE_DIET
   4547 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4548 #endif
   4549 	},
   4550 	{
   4551 		ARM_VHSUBsv4i32, ARM_INS_VHSUB,
   4552 #ifndef CAPSTONE_DIET
   4553 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4554 #endif
   4555 	},
   4556 	{
   4557 		ARM_VHSUBsv8i16, ARM_INS_VHSUB,
   4558 #ifndef CAPSTONE_DIET
   4559 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4560 #endif
   4561 	},
   4562 	{
   4563 		ARM_VHSUBsv8i8, ARM_INS_VHSUB,
   4564 #ifndef CAPSTONE_DIET
   4565 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4566 #endif
   4567 	},
   4568 	{
   4569 		ARM_VHSUBuv16i8, ARM_INS_VHSUB,
   4570 #ifndef CAPSTONE_DIET
   4571 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4572 #endif
   4573 	},
   4574 	{
   4575 		ARM_VHSUBuv2i32, ARM_INS_VHSUB,
   4576 #ifndef CAPSTONE_DIET
   4577 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4578 #endif
   4579 	},
   4580 	{
   4581 		ARM_VHSUBuv4i16, ARM_INS_VHSUB,
   4582 #ifndef CAPSTONE_DIET
   4583 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4584 #endif
   4585 	},
   4586 	{
   4587 		ARM_VHSUBuv4i32, ARM_INS_VHSUB,
   4588 #ifndef CAPSTONE_DIET
   4589 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4590 #endif
   4591 	},
   4592 	{
   4593 		ARM_VHSUBuv8i16, ARM_INS_VHSUB,
   4594 #ifndef CAPSTONE_DIET
   4595 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4596 #endif
   4597 	},
   4598 	{
   4599 		ARM_VHSUBuv8i8, ARM_INS_VHSUB,
   4600 #ifndef CAPSTONE_DIET
   4601 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4602 #endif
   4603 	},
   4604 	{
   4605 		ARM_VLD1DUPd16, ARM_INS_VLD1,
   4606 #ifndef CAPSTONE_DIET
   4607 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4608 #endif
   4609 	},
   4610 	{
   4611 		ARM_VLD1DUPd16wb_fixed, ARM_INS_VLD1,
   4612 #ifndef CAPSTONE_DIET
   4613 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4614 #endif
   4615 	},
   4616 	{
   4617 		ARM_VLD1DUPd16wb_register, ARM_INS_VLD1,
   4618 #ifndef CAPSTONE_DIET
   4619 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4620 #endif
   4621 	},
   4622 	{
   4623 		ARM_VLD1DUPd32, ARM_INS_VLD1,
   4624 #ifndef CAPSTONE_DIET
   4625 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4626 #endif
   4627 	},
   4628 	{
   4629 		ARM_VLD1DUPd32wb_fixed, ARM_INS_VLD1,
   4630 #ifndef CAPSTONE_DIET
   4631 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4632 #endif
   4633 	},
   4634 	{
   4635 		ARM_VLD1DUPd32wb_register, ARM_INS_VLD1,
   4636 #ifndef CAPSTONE_DIET
   4637 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4638 #endif
   4639 	},
   4640 	{
   4641 		ARM_VLD1DUPd8, ARM_INS_VLD1,
   4642 #ifndef CAPSTONE_DIET
   4643 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4644 #endif
   4645 	},
   4646 	{
   4647 		ARM_VLD1DUPd8wb_fixed, ARM_INS_VLD1,
   4648 #ifndef CAPSTONE_DIET
   4649 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4650 #endif
   4651 	},
   4652 	{
   4653 		ARM_VLD1DUPd8wb_register, ARM_INS_VLD1,
   4654 #ifndef CAPSTONE_DIET
   4655 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4656 #endif
   4657 	},
   4658 	{
   4659 		ARM_VLD1DUPq16, ARM_INS_VLD1,
   4660 #ifndef CAPSTONE_DIET
   4661 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4662 #endif
   4663 	},
   4664 	{
   4665 		ARM_VLD1DUPq16wb_fixed, ARM_INS_VLD1,
   4666 #ifndef CAPSTONE_DIET
   4667 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4668 #endif
   4669 	},
   4670 	{
   4671 		ARM_VLD1DUPq16wb_register, ARM_INS_VLD1,
   4672 #ifndef CAPSTONE_DIET
   4673 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4674 #endif
   4675 	},
   4676 	{
   4677 		ARM_VLD1DUPq32, ARM_INS_VLD1,
   4678 #ifndef CAPSTONE_DIET
   4679 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4680 #endif
   4681 	},
   4682 	{
   4683 		ARM_VLD1DUPq32wb_fixed, ARM_INS_VLD1,
   4684 #ifndef CAPSTONE_DIET
   4685 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4686 #endif
   4687 	},
   4688 	{
   4689 		ARM_VLD1DUPq32wb_register, ARM_INS_VLD1,
   4690 #ifndef CAPSTONE_DIET
   4691 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4692 #endif
   4693 	},
   4694 	{
   4695 		ARM_VLD1DUPq8, ARM_INS_VLD1,
   4696 #ifndef CAPSTONE_DIET
   4697 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4698 #endif
   4699 	},
   4700 	{
   4701 		ARM_VLD1DUPq8wb_fixed, ARM_INS_VLD1,
   4702 #ifndef CAPSTONE_DIET
   4703 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4704 #endif
   4705 	},
   4706 	{
   4707 		ARM_VLD1DUPq8wb_register, ARM_INS_VLD1,
   4708 #ifndef CAPSTONE_DIET
   4709 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4710 #endif
   4711 	},
   4712 	{
   4713 		ARM_VLD1LNd16, ARM_INS_VLD1,
   4714 #ifndef CAPSTONE_DIET
   4715 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4716 #endif
   4717 	},
   4718 	{
   4719 		ARM_VLD1LNd16_UPD, ARM_INS_VLD1,
   4720 #ifndef CAPSTONE_DIET
   4721 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4722 #endif
   4723 	},
   4724 	{
   4725 		ARM_VLD1LNd32, ARM_INS_VLD1,
   4726 #ifndef CAPSTONE_DIET
   4727 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4728 #endif
   4729 	},
   4730 	{
   4731 		ARM_VLD1LNd32_UPD, ARM_INS_VLD1,
   4732 #ifndef CAPSTONE_DIET
   4733 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4734 #endif
   4735 	},
   4736 	{
   4737 		ARM_VLD1LNd8, ARM_INS_VLD1,
   4738 #ifndef CAPSTONE_DIET
   4739 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4740 #endif
   4741 	},
   4742 	{
   4743 		ARM_VLD1LNd8_UPD, ARM_INS_VLD1,
   4744 #ifndef CAPSTONE_DIET
   4745 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4746 #endif
   4747 	},
   4748 	{
   4749 		ARM_VLD1d16, ARM_INS_VLD1,
   4750 #ifndef CAPSTONE_DIET
   4751 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4752 #endif
   4753 	},
   4754 	{
   4755 		ARM_VLD1d16Q, ARM_INS_VLD1,
   4756 #ifndef CAPSTONE_DIET
   4757 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4758 #endif
   4759 	},
   4760 	{
   4761 		ARM_VLD1d16Qwb_fixed, ARM_INS_VLD1,
   4762 #ifndef CAPSTONE_DIET
   4763 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4764 #endif
   4765 	},
   4766 	{
   4767 		ARM_VLD1d16Qwb_register, ARM_INS_VLD1,
   4768 #ifndef CAPSTONE_DIET
   4769 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4770 #endif
   4771 	},
   4772 	{
   4773 		ARM_VLD1d16T, ARM_INS_VLD1,
   4774 #ifndef CAPSTONE_DIET
   4775 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4776 #endif
   4777 	},
   4778 	{
   4779 		ARM_VLD1d16Twb_fixed, ARM_INS_VLD1,
   4780 #ifndef CAPSTONE_DIET
   4781 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4782 #endif
   4783 	},
   4784 	{
   4785 		ARM_VLD1d16Twb_register, ARM_INS_VLD1,
   4786 #ifndef CAPSTONE_DIET
   4787 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4788 #endif
   4789 	},
   4790 	{
   4791 		ARM_VLD1d16wb_fixed, ARM_INS_VLD1,
   4792 #ifndef CAPSTONE_DIET
   4793 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4794 #endif
   4795 	},
   4796 	{
   4797 		ARM_VLD1d16wb_register, ARM_INS_VLD1,
   4798 #ifndef CAPSTONE_DIET
   4799 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4800 #endif
   4801 	},
   4802 	{
   4803 		ARM_VLD1d32, ARM_INS_VLD1,
   4804 #ifndef CAPSTONE_DIET
   4805 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4806 #endif
   4807 	},
   4808 	{
   4809 		ARM_VLD1d32Q, ARM_INS_VLD1,
   4810 #ifndef CAPSTONE_DIET
   4811 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4812 #endif
   4813 	},
   4814 	{
   4815 		ARM_VLD1d32Qwb_fixed, ARM_INS_VLD1,
   4816 #ifndef CAPSTONE_DIET
   4817 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4818 #endif
   4819 	},
   4820 	{
   4821 		ARM_VLD1d32Qwb_register, ARM_INS_VLD1,
   4822 #ifndef CAPSTONE_DIET
   4823 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4824 #endif
   4825 	},
   4826 	{
   4827 		ARM_VLD1d32T, ARM_INS_VLD1,
   4828 #ifndef CAPSTONE_DIET
   4829 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4830 #endif
   4831 	},
   4832 	{
   4833 		ARM_VLD1d32Twb_fixed, ARM_INS_VLD1,
   4834 #ifndef CAPSTONE_DIET
   4835 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4836 #endif
   4837 	},
   4838 	{
   4839 		ARM_VLD1d32Twb_register, ARM_INS_VLD1,
   4840 #ifndef CAPSTONE_DIET
   4841 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4842 #endif
   4843 	},
   4844 	{
   4845 		ARM_VLD1d32wb_fixed, ARM_INS_VLD1,
   4846 #ifndef CAPSTONE_DIET
   4847 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4848 #endif
   4849 	},
   4850 	{
   4851 		ARM_VLD1d32wb_register, ARM_INS_VLD1,
   4852 #ifndef CAPSTONE_DIET
   4853 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4854 #endif
   4855 	},
   4856 	{
   4857 		ARM_VLD1d64, ARM_INS_VLD1,
   4858 #ifndef CAPSTONE_DIET
   4859 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4860 #endif
   4861 	},
   4862 	{
   4863 		ARM_VLD1d64Q, ARM_INS_VLD1,
   4864 #ifndef CAPSTONE_DIET
   4865 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4866 #endif
   4867 	},
   4868 	{
   4869 		ARM_VLD1d64Qwb_fixed, ARM_INS_VLD1,
   4870 #ifndef CAPSTONE_DIET
   4871 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4872 #endif
   4873 	},
   4874 	{
   4875 		ARM_VLD1d64Qwb_register, ARM_INS_VLD1,
   4876 #ifndef CAPSTONE_DIET
   4877 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4878 #endif
   4879 	},
   4880 	{
   4881 		ARM_VLD1d64T, ARM_INS_VLD1,
   4882 #ifndef CAPSTONE_DIET
   4883 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4884 #endif
   4885 	},
   4886 	{
   4887 		ARM_VLD1d64Twb_fixed, ARM_INS_VLD1,
   4888 #ifndef CAPSTONE_DIET
   4889 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4890 #endif
   4891 	},
   4892 	{
   4893 		ARM_VLD1d64Twb_register, ARM_INS_VLD1,
   4894 #ifndef CAPSTONE_DIET
   4895 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4896 #endif
   4897 	},
   4898 	{
   4899 		ARM_VLD1d64wb_fixed, ARM_INS_VLD1,
   4900 #ifndef CAPSTONE_DIET
   4901 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4902 #endif
   4903 	},
   4904 	{
   4905 		ARM_VLD1d64wb_register, ARM_INS_VLD1,
   4906 #ifndef CAPSTONE_DIET
   4907 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4908 #endif
   4909 	},
   4910 	{
   4911 		ARM_VLD1d8, ARM_INS_VLD1,
   4912 #ifndef CAPSTONE_DIET
   4913 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4914 #endif
   4915 	},
   4916 	{
   4917 		ARM_VLD1d8Q, ARM_INS_VLD1,
   4918 #ifndef CAPSTONE_DIET
   4919 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4920 #endif
   4921 	},
   4922 	{
   4923 		ARM_VLD1d8Qwb_fixed, ARM_INS_VLD1,
   4924 #ifndef CAPSTONE_DIET
   4925 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4926 #endif
   4927 	},
   4928 	{
   4929 		ARM_VLD1d8Qwb_register, ARM_INS_VLD1,
   4930 #ifndef CAPSTONE_DIET
   4931 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4932 #endif
   4933 	},
   4934 	{
   4935 		ARM_VLD1d8T, ARM_INS_VLD1,
   4936 #ifndef CAPSTONE_DIET
   4937 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4938 #endif
   4939 	},
   4940 	{
   4941 		ARM_VLD1d8Twb_fixed, ARM_INS_VLD1,
   4942 #ifndef CAPSTONE_DIET
   4943 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4944 #endif
   4945 	},
   4946 	{
   4947 		ARM_VLD1d8Twb_register, ARM_INS_VLD1,
   4948 #ifndef CAPSTONE_DIET
   4949 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4950 #endif
   4951 	},
   4952 	{
   4953 		ARM_VLD1d8wb_fixed, ARM_INS_VLD1,
   4954 #ifndef CAPSTONE_DIET
   4955 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4956 #endif
   4957 	},
   4958 	{
   4959 		ARM_VLD1d8wb_register, ARM_INS_VLD1,
   4960 #ifndef CAPSTONE_DIET
   4961 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4962 #endif
   4963 	},
   4964 	{
   4965 		ARM_VLD1q16, ARM_INS_VLD1,
   4966 #ifndef CAPSTONE_DIET
   4967 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4968 #endif
   4969 	},
   4970 	{
   4971 		ARM_VLD1q16wb_fixed, ARM_INS_VLD1,
   4972 #ifndef CAPSTONE_DIET
   4973 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4974 #endif
   4975 	},
   4976 	{
   4977 		ARM_VLD1q16wb_register, ARM_INS_VLD1,
   4978 #ifndef CAPSTONE_DIET
   4979 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4980 #endif
   4981 	},
   4982 	{
   4983 		ARM_VLD1q32, ARM_INS_VLD1,
   4984 #ifndef CAPSTONE_DIET
   4985 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4986 #endif
   4987 	},
   4988 	{
   4989 		ARM_VLD1q32wb_fixed, ARM_INS_VLD1,
   4990 #ifndef CAPSTONE_DIET
   4991 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4992 #endif
   4993 	},
   4994 	{
   4995 		ARM_VLD1q32wb_register, ARM_INS_VLD1,
   4996 #ifndef CAPSTONE_DIET
   4997 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   4998 #endif
   4999 	},
   5000 	{
   5001 		ARM_VLD1q64, ARM_INS_VLD1,
   5002 #ifndef CAPSTONE_DIET
   5003 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5004 #endif
   5005 	},
   5006 	{
   5007 		ARM_VLD1q64wb_fixed, ARM_INS_VLD1,
   5008 #ifndef CAPSTONE_DIET
   5009 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5010 #endif
   5011 	},
   5012 	{
   5013 		ARM_VLD1q64wb_register, ARM_INS_VLD1,
   5014 #ifndef CAPSTONE_DIET
   5015 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5016 #endif
   5017 	},
   5018 	{
   5019 		ARM_VLD1q8, ARM_INS_VLD1,
   5020 #ifndef CAPSTONE_DIET
   5021 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5022 #endif
   5023 	},
   5024 	{
   5025 		ARM_VLD1q8wb_fixed, ARM_INS_VLD1,
   5026 #ifndef CAPSTONE_DIET
   5027 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5028 #endif
   5029 	},
   5030 	{
   5031 		ARM_VLD1q8wb_register, ARM_INS_VLD1,
   5032 #ifndef CAPSTONE_DIET
   5033 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5034 #endif
   5035 	},
   5036 	{
   5037 		ARM_VLD2DUPd16, ARM_INS_VLD2,
   5038 #ifndef CAPSTONE_DIET
   5039 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5040 #endif
   5041 	},
   5042 	{
   5043 		ARM_VLD2DUPd16wb_fixed, ARM_INS_VLD2,
   5044 #ifndef CAPSTONE_DIET
   5045 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5046 #endif
   5047 	},
   5048 	{
   5049 		ARM_VLD2DUPd16wb_register, ARM_INS_VLD2,
   5050 #ifndef CAPSTONE_DIET
   5051 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5052 #endif
   5053 	},
   5054 	{
   5055 		ARM_VLD2DUPd16x2, ARM_INS_VLD2,
   5056 #ifndef CAPSTONE_DIET
   5057 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5058 #endif
   5059 	},
   5060 	{
   5061 		ARM_VLD2DUPd16x2wb_fixed, ARM_INS_VLD2,
   5062 #ifndef CAPSTONE_DIET
   5063 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5064 #endif
   5065 	},
   5066 	{
   5067 		ARM_VLD2DUPd16x2wb_register, ARM_INS_VLD2,
   5068 #ifndef CAPSTONE_DIET
   5069 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5070 #endif
   5071 	},
   5072 	{
   5073 		ARM_VLD2DUPd32, ARM_INS_VLD2,
   5074 #ifndef CAPSTONE_DIET
   5075 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5076 #endif
   5077 	},
   5078 	{
   5079 		ARM_VLD2DUPd32wb_fixed, ARM_INS_VLD2,
   5080 #ifndef CAPSTONE_DIET
   5081 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5082 #endif
   5083 	},
   5084 	{
   5085 		ARM_VLD2DUPd32wb_register, ARM_INS_VLD2,
   5086 #ifndef CAPSTONE_DIET
   5087 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5088 #endif
   5089 	},
   5090 	{
   5091 		ARM_VLD2DUPd32x2, ARM_INS_VLD2,
   5092 #ifndef CAPSTONE_DIET
   5093 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5094 #endif
   5095 	},
   5096 	{
   5097 		ARM_VLD2DUPd32x2wb_fixed, ARM_INS_VLD2,
   5098 #ifndef CAPSTONE_DIET
   5099 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5100 #endif
   5101 	},
   5102 	{
   5103 		ARM_VLD2DUPd32x2wb_register, ARM_INS_VLD2,
   5104 #ifndef CAPSTONE_DIET
   5105 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5106 #endif
   5107 	},
   5108 	{
   5109 		ARM_VLD2DUPd8, ARM_INS_VLD2,
   5110 #ifndef CAPSTONE_DIET
   5111 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5112 #endif
   5113 	},
   5114 	{
   5115 		ARM_VLD2DUPd8wb_fixed, ARM_INS_VLD2,
   5116 #ifndef CAPSTONE_DIET
   5117 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5118 #endif
   5119 	},
   5120 	{
   5121 		ARM_VLD2DUPd8wb_register, ARM_INS_VLD2,
   5122 #ifndef CAPSTONE_DIET
   5123 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5124 #endif
   5125 	},
   5126 	{
   5127 		ARM_VLD2DUPd8x2, ARM_INS_VLD2,
   5128 #ifndef CAPSTONE_DIET
   5129 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5130 #endif
   5131 	},
   5132 	{
   5133 		ARM_VLD2DUPd8x2wb_fixed, ARM_INS_VLD2,
   5134 #ifndef CAPSTONE_DIET
   5135 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5136 #endif
   5137 	},
   5138 	{
   5139 		ARM_VLD2DUPd8x2wb_register, ARM_INS_VLD2,
   5140 #ifndef CAPSTONE_DIET
   5141 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5142 #endif
   5143 	},
   5144 	{
   5145 		ARM_VLD2LNd16, ARM_INS_VLD2,
   5146 #ifndef CAPSTONE_DIET
   5147 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5148 #endif
   5149 	},
   5150 	{
   5151 		ARM_VLD2LNd16_UPD, ARM_INS_VLD2,
   5152 #ifndef CAPSTONE_DIET
   5153 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5154 #endif
   5155 	},
   5156 	{
   5157 		ARM_VLD2LNd32, ARM_INS_VLD2,
   5158 #ifndef CAPSTONE_DIET
   5159 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5160 #endif
   5161 	},
   5162 	{
   5163 		ARM_VLD2LNd32_UPD, ARM_INS_VLD2,
   5164 #ifndef CAPSTONE_DIET
   5165 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5166 #endif
   5167 	},
   5168 	{
   5169 		ARM_VLD2LNd8, ARM_INS_VLD2,
   5170 #ifndef CAPSTONE_DIET
   5171 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5172 #endif
   5173 	},
   5174 	{
   5175 		ARM_VLD2LNd8_UPD, ARM_INS_VLD2,
   5176 #ifndef CAPSTONE_DIET
   5177 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5178 #endif
   5179 	},
   5180 	{
   5181 		ARM_VLD2LNq16, ARM_INS_VLD2,
   5182 #ifndef CAPSTONE_DIET
   5183 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5184 #endif
   5185 	},
   5186 	{
   5187 		ARM_VLD2LNq16_UPD, ARM_INS_VLD2,
   5188 #ifndef CAPSTONE_DIET
   5189 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5190 #endif
   5191 	},
   5192 	{
   5193 		ARM_VLD2LNq32, ARM_INS_VLD2,
   5194 #ifndef CAPSTONE_DIET
   5195 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5196 #endif
   5197 	},
   5198 	{
   5199 		ARM_VLD2LNq32_UPD, ARM_INS_VLD2,
   5200 #ifndef CAPSTONE_DIET
   5201 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5202 #endif
   5203 	},
   5204 	{
   5205 		ARM_VLD2b16, ARM_INS_VLD2,
   5206 #ifndef CAPSTONE_DIET
   5207 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5208 #endif
   5209 	},
   5210 	{
   5211 		ARM_VLD2b16wb_fixed, ARM_INS_VLD2,
   5212 #ifndef CAPSTONE_DIET
   5213 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5214 #endif
   5215 	},
   5216 	{
   5217 		ARM_VLD2b16wb_register, ARM_INS_VLD2,
   5218 #ifndef CAPSTONE_DIET
   5219 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5220 #endif
   5221 	},
   5222 	{
   5223 		ARM_VLD2b32, ARM_INS_VLD2,
   5224 #ifndef CAPSTONE_DIET
   5225 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5226 #endif
   5227 	},
   5228 	{
   5229 		ARM_VLD2b32wb_fixed, ARM_INS_VLD2,
   5230 #ifndef CAPSTONE_DIET
   5231 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5232 #endif
   5233 	},
   5234 	{
   5235 		ARM_VLD2b32wb_register, ARM_INS_VLD2,
   5236 #ifndef CAPSTONE_DIET
   5237 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5238 #endif
   5239 	},
   5240 	{
   5241 		ARM_VLD2b8, ARM_INS_VLD2,
   5242 #ifndef CAPSTONE_DIET
   5243 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5244 #endif
   5245 	},
   5246 	{
   5247 		ARM_VLD2b8wb_fixed, ARM_INS_VLD2,
   5248 #ifndef CAPSTONE_DIET
   5249 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5250 #endif
   5251 	},
   5252 	{
   5253 		ARM_VLD2b8wb_register, ARM_INS_VLD2,
   5254 #ifndef CAPSTONE_DIET
   5255 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5256 #endif
   5257 	},
   5258 	{
   5259 		ARM_VLD2d16, ARM_INS_VLD2,
   5260 #ifndef CAPSTONE_DIET
   5261 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5262 #endif
   5263 	},
   5264 	{
   5265 		ARM_VLD2d16wb_fixed, ARM_INS_VLD2,
   5266 #ifndef CAPSTONE_DIET
   5267 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5268 #endif
   5269 	},
   5270 	{
   5271 		ARM_VLD2d16wb_register, ARM_INS_VLD2,
   5272 #ifndef CAPSTONE_DIET
   5273 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5274 #endif
   5275 	},
   5276 	{
   5277 		ARM_VLD2d32, ARM_INS_VLD2,
   5278 #ifndef CAPSTONE_DIET
   5279 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5280 #endif
   5281 	},
   5282 	{
   5283 		ARM_VLD2d32wb_fixed, ARM_INS_VLD2,
   5284 #ifndef CAPSTONE_DIET
   5285 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5286 #endif
   5287 	},
   5288 	{
   5289 		ARM_VLD2d32wb_register, ARM_INS_VLD2,
   5290 #ifndef CAPSTONE_DIET
   5291 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5292 #endif
   5293 	},
   5294 	{
   5295 		ARM_VLD2d8, ARM_INS_VLD2,
   5296 #ifndef CAPSTONE_DIET
   5297 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5298 #endif
   5299 	},
   5300 	{
   5301 		ARM_VLD2d8wb_fixed, ARM_INS_VLD2,
   5302 #ifndef CAPSTONE_DIET
   5303 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5304 #endif
   5305 	},
   5306 	{
   5307 		ARM_VLD2d8wb_register, ARM_INS_VLD2,
   5308 #ifndef CAPSTONE_DIET
   5309 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5310 #endif
   5311 	},
   5312 	{
   5313 		ARM_VLD2q16, ARM_INS_VLD2,
   5314 #ifndef CAPSTONE_DIET
   5315 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5316 #endif
   5317 	},
   5318 	{
   5319 		ARM_VLD2q16wb_fixed, ARM_INS_VLD2,
   5320 #ifndef CAPSTONE_DIET
   5321 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5322 #endif
   5323 	},
   5324 	{
   5325 		ARM_VLD2q16wb_register, ARM_INS_VLD2,
   5326 #ifndef CAPSTONE_DIET
   5327 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5328 #endif
   5329 	},
   5330 	{
   5331 		ARM_VLD2q32, ARM_INS_VLD2,
   5332 #ifndef CAPSTONE_DIET
   5333 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5334 #endif
   5335 	},
   5336 	{
   5337 		ARM_VLD2q32wb_fixed, ARM_INS_VLD2,
   5338 #ifndef CAPSTONE_DIET
   5339 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5340 #endif
   5341 	},
   5342 	{
   5343 		ARM_VLD2q32wb_register, ARM_INS_VLD2,
   5344 #ifndef CAPSTONE_DIET
   5345 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5346 #endif
   5347 	},
   5348 	{
   5349 		ARM_VLD2q8, ARM_INS_VLD2,
   5350 #ifndef CAPSTONE_DIET
   5351 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5352 #endif
   5353 	},
   5354 	{
   5355 		ARM_VLD2q8wb_fixed, ARM_INS_VLD2,
   5356 #ifndef CAPSTONE_DIET
   5357 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5358 #endif
   5359 	},
   5360 	{
   5361 		ARM_VLD2q8wb_register, ARM_INS_VLD2,
   5362 #ifndef CAPSTONE_DIET
   5363 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5364 #endif
   5365 	},
   5366 	{
   5367 		ARM_VLD3DUPd16, ARM_INS_VLD3,
   5368 #ifndef CAPSTONE_DIET
   5369 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5370 #endif
   5371 	},
   5372 	{
   5373 		ARM_VLD3DUPd16_UPD, ARM_INS_VLD3,
   5374 #ifndef CAPSTONE_DIET
   5375 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5376 #endif
   5377 	},
   5378 	{
   5379 		ARM_VLD3DUPd32, ARM_INS_VLD3,
   5380 #ifndef CAPSTONE_DIET
   5381 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5382 #endif
   5383 	},
   5384 	{
   5385 		ARM_VLD3DUPd32_UPD, ARM_INS_VLD3,
   5386 #ifndef CAPSTONE_DIET
   5387 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5388 #endif
   5389 	},
   5390 	{
   5391 		ARM_VLD3DUPd8, ARM_INS_VLD3,
   5392 #ifndef CAPSTONE_DIET
   5393 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5394 #endif
   5395 	},
   5396 	{
   5397 		ARM_VLD3DUPd8_UPD, ARM_INS_VLD3,
   5398 #ifndef CAPSTONE_DIET
   5399 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5400 #endif
   5401 	},
   5402 	{
   5403 		ARM_VLD3DUPq16, ARM_INS_VLD3,
   5404 #ifndef CAPSTONE_DIET
   5405 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5406 #endif
   5407 	},
   5408 	{
   5409 		ARM_VLD3DUPq16_UPD, ARM_INS_VLD3,
   5410 #ifndef CAPSTONE_DIET
   5411 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5412 #endif
   5413 	},
   5414 	{
   5415 		ARM_VLD3DUPq32, ARM_INS_VLD3,
   5416 #ifndef CAPSTONE_DIET
   5417 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5418 #endif
   5419 	},
   5420 	{
   5421 		ARM_VLD3DUPq32_UPD, ARM_INS_VLD3,
   5422 #ifndef CAPSTONE_DIET
   5423 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5424 #endif
   5425 	},
   5426 	{
   5427 		ARM_VLD3DUPq8, ARM_INS_VLD3,
   5428 #ifndef CAPSTONE_DIET
   5429 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5430 #endif
   5431 	},
   5432 	{
   5433 		ARM_VLD3DUPq8_UPD, ARM_INS_VLD3,
   5434 #ifndef CAPSTONE_DIET
   5435 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5436 #endif
   5437 	},
   5438 	{
   5439 		ARM_VLD3LNd16, ARM_INS_VLD3,
   5440 #ifndef CAPSTONE_DIET
   5441 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5442 #endif
   5443 	},
   5444 	{
   5445 		ARM_VLD3LNd16_UPD, ARM_INS_VLD3,
   5446 #ifndef CAPSTONE_DIET
   5447 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5448 #endif
   5449 	},
   5450 	{
   5451 		ARM_VLD3LNd32, ARM_INS_VLD3,
   5452 #ifndef CAPSTONE_DIET
   5453 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5454 #endif
   5455 	},
   5456 	{
   5457 		ARM_VLD3LNd32_UPD, ARM_INS_VLD3,
   5458 #ifndef CAPSTONE_DIET
   5459 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5460 #endif
   5461 	},
   5462 	{
   5463 		ARM_VLD3LNd8, ARM_INS_VLD3,
   5464 #ifndef CAPSTONE_DIET
   5465 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5466 #endif
   5467 	},
   5468 	{
   5469 		ARM_VLD3LNd8_UPD, ARM_INS_VLD3,
   5470 #ifndef CAPSTONE_DIET
   5471 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5472 #endif
   5473 	},
   5474 	{
   5475 		ARM_VLD3LNq16, ARM_INS_VLD3,
   5476 #ifndef CAPSTONE_DIET
   5477 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5478 #endif
   5479 	},
   5480 	{
   5481 		ARM_VLD3LNq16_UPD, ARM_INS_VLD3,
   5482 #ifndef CAPSTONE_DIET
   5483 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5484 #endif
   5485 	},
   5486 	{
   5487 		ARM_VLD3LNq32, ARM_INS_VLD3,
   5488 #ifndef CAPSTONE_DIET
   5489 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5490 #endif
   5491 	},
   5492 	{
   5493 		ARM_VLD3LNq32_UPD, ARM_INS_VLD3,
   5494 #ifndef CAPSTONE_DIET
   5495 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5496 #endif
   5497 	},
   5498 	{
   5499 		ARM_VLD3d16, ARM_INS_VLD3,
   5500 #ifndef CAPSTONE_DIET
   5501 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5502 #endif
   5503 	},
   5504 	{
   5505 		ARM_VLD3d16_UPD, ARM_INS_VLD3,
   5506 #ifndef CAPSTONE_DIET
   5507 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5508 #endif
   5509 	},
   5510 	{
   5511 		ARM_VLD3d32, ARM_INS_VLD3,
   5512 #ifndef CAPSTONE_DIET
   5513 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5514 #endif
   5515 	},
   5516 	{
   5517 		ARM_VLD3d32_UPD, ARM_INS_VLD3,
   5518 #ifndef CAPSTONE_DIET
   5519 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5520 #endif
   5521 	},
   5522 	{
   5523 		ARM_VLD3d8, ARM_INS_VLD3,
   5524 #ifndef CAPSTONE_DIET
   5525 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5526 #endif
   5527 	},
   5528 	{
   5529 		ARM_VLD3d8_UPD, ARM_INS_VLD3,
   5530 #ifndef CAPSTONE_DIET
   5531 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5532 #endif
   5533 	},
   5534 	{
   5535 		ARM_VLD3q16, ARM_INS_VLD3,
   5536 #ifndef CAPSTONE_DIET
   5537 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5538 #endif
   5539 	},
   5540 	{
   5541 		ARM_VLD3q16_UPD, ARM_INS_VLD3,
   5542 #ifndef CAPSTONE_DIET
   5543 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5544 #endif
   5545 	},
   5546 	{
   5547 		ARM_VLD3q32, ARM_INS_VLD3,
   5548 #ifndef CAPSTONE_DIET
   5549 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5550 #endif
   5551 	},
   5552 	{
   5553 		ARM_VLD3q32_UPD, ARM_INS_VLD3,
   5554 #ifndef CAPSTONE_DIET
   5555 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5556 #endif
   5557 	},
   5558 	{
   5559 		ARM_VLD3q8, ARM_INS_VLD3,
   5560 #ifndef CAPSTONE_DIET
   5561 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5562 #endif
   5563 	},
   5564 	{
   5565 		ARM_VLD3q8_UPD, ARM_INS_VLD3,
   5566 #ifndef CAPSTONE_DIET
   5567 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5568 #endif
   5569 	},
   5570 	{
   5571 		ARM_VLD4DUPd16, ARM_INS_VLD4,
   5572 #ifndef CAPSTONE_DIET
   5573 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5574 #endif
   5575 	},
   5576 	{
   5577 		ARM_VLD4DUPd16_UPD, ARM_INS_VLD4,
   5578 #ifndef CAPSTONE_DIET
   5579 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5580 #endif
   5581 	},
   5582 	{
   5583 		ARM_VLD4DUPd32, ARM_INS_VLD4,
   5584 #ifndef CAPSTONE_DIET
   5585 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5586 #endif
   5587 	},
   5588 	{
   5589 		ARM_VLD4DUPd32_UPD, ARM_INS_VLD4,
   5590 #ifndef CAPSTONE_DIET
   5591 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5592 #endif
   5593 	},
   5594 	{
   5595 		ARM_VLD4DUPd8, ARM_INS_VLD4,
   5596 #ifndef CAPSTONE_DIET
   5597 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5598 #endif
   5599 	},
   5600 	{
   5601 		ARM_VLD4DUPd8_UPD, ARM_INS_VLD4,
   5602 #ifndef CAPSTONE_DIET
   5603 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5604 #endif
   5605 	},
   5606 	{
   5607 		ARM_VLD4DUPq16, ARM_INS_VLD4,
   5608 #ifndef CAPSTONE_DIET
   5609 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5610 #endif
   5611 	},
   5612 	{
   5613 		ARM_VLD4DUPq16_UPD, ARM_INS_VLD4,
   5614 #ifndef CAPSTONE_DIET
   5615 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5616 #endif
   5617 	},
   5618 	{
   5619 		ARM_VLD4DUPq32, ARM_INS_VLD4,
   5620 #ifndef CAPSTONE_DIET
   5621 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5622 #endif
   5623 	},
   5624 	{
   5625 		ARM_VLD4DUPq32_UPD, ARM_INS_VLD4,
   5626 #ifndef CAPSTONE_DIET
   5627 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5628 #endif
   5629 	},
   5630 	{
   5631 		ARM_VLD4DUPq8, ARM_INS_VLD4,
   5632 #ifndef CAPSTONE_DIET
   5633 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5634 #endif
   5635 	},
   5636 	{
   5637 		ARM_VLD4DUPq8_UPD, ARM_INS_VLD4,
   5638 #ifndef CAPSTONE_DIET
   5639 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5640 #endif
   5641 	},
   5642 	{
   5643 		ARM_VLD4LNd16, ARM_INS_VLD4,
   5644 #ifndef CAPSTONE_DIET
   5645 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5646 #endif
   5647 	},
   5648 	{
   5649 		ARM_VLD4LNd16_UPD, ARM_INS_VLD4,
   5650 #ifndef CAPSTONE_DIET
   5651 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5652 #endif
   5653 	},
   5654 	{
   5655 		ARM_VLD4LNd32, ARM_INS_VLD4,
   5656 #ifndef CAPSTONE_DIET
   5657 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5658 #endif
   5659 	},
   5660 	{
   5661 		ARM_VLD4LNd32_UPD, ARM_INS_VLD4,
   5662 #ifndef CAPSTONE_DIET
   5663 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5664 #endif
   5665 	},
   5666 	{
   5667 		ARM_VLD4LNd8, ARM_INS_VLD4,
   5668 #ifndef CAPSTONE_DIET
   5669 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5670 #endif
   5671 	},
   5672 	{
   5673 		ARM_VLD4LNd8_UPD, ARM_INS_VLD4,
   5674 #ifndef CAPSTONE_DIET
   5675 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5676 #endif
   5677 	},
   5678 	{
   5679 		ARM_VLD4LNq16, ARM_INS_VLD4,
   5680 #ifndef CAPSTONE_DIET
   5681 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5682 #endif
   5683 	},
   5684 	{
   5685 		ARM_VLD4LNq16_UPD, ARM_INS_VLD4,
   5686 #ifndef CAPSTONE_DIET
   5687 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5688 #endif
   5689 	},
   5690 	{
   5691 		ARM_VLD4LNq32, ARM_INS_VLD4,
   5692 #ifndef CAPSTONE_DIET
   5693 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5694 #endif
   5695 	},
   5696 	{
   5697 		ARM_VLD4LNq32_UPD, ARM_INS_VLD4,
   5698 #ifndef CAPSTONE_DIET
   5699 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5700 #endif
   5701 	},
   5702 	{
   5703 		ARM_VLD4d16, ARM_INS_VLD4,
   5704 #ifndef CAPSTONE_DIET
   5705 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5706 #endif
   5707 	},
   5708 	{
   5709 		ARM_VLD4d16_UPD, ARM_INS_VLD4,
   5710 #ifndef CAPSTONE_DIET
   5711 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5712 #endif
   5713 	},
   5714 	{
   5715 		ARM_VLD4d32, ARM_INS_VLD4,
   5716 #ifndef CAPSTONE_DIET
   5717 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5718 #endif
   5719 	},
   5720 	{
   5721 		ARM_VLD4d32_UPD, ARM_INS_VLD4,
   5722 #ifndef CAPSTONE_DIET
   5723 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5724 #endif
   5725 	},
   5726 	{
   5727 		ARM_VLD4d8, ARM_INS_VLD4,
   5728 #ifndef CAPSTONE_DIET
   5729 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5730 #endif
   5731 	},
   5732 	{
   5733 		ARM_VLD4d8_UPD, ARM_INS_VLD4,
   5734 #ifndef CAPSTONE_DIET
   5735 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5736 #endif
   5737 	},
   5738 	{
   5739 		ARM_VLD4q16, ARM_INS_VLD4,
   5740 #ifndef CAPSTONE_DIET
   5741 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5742 #endif
   5743 	},
   5744 	{
   5745 		ARM_VLD4q16_UPD, ARM_INS_VLD4,
   5746 #ifndef CAPSTONE_DIET
   5747 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5748 #endif
   5749 	},
   5750 	{
   5751 		ARM_VLD4q32, ARM_INS_VLD4,
   5752 #ifndef CAPSTONE_DIET
   5753 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5754 #endif
   5755 	},
   5756 	{
   5757 		ARM_VLD4q32_UPD, ARM_INS_VLD4,
   5758 #ifndef CAPSTONE_DIET
   5759 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5760 #endif
   5761 	},
   5762 	{
   5763 		ARM_VLD4q8, ARM_INS_VLD4,
   5764 #ifndef CAPSTONE_DIET
   5765 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5766 #endif
   5767 	},
   5768 	{
   5769 		ARM_VLD4q8_UPD, ARM_INS_VLD4,
   5770 #ifndef CAPSTONE_DIET
   5771 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5772 #endif
   5773 	},
   5774 	{
   5775 		ARM_VLDMDDB_UPD, ARM_INS_VLDMDB,
   5776 #ifndef CAPSTONE_DIET
   5777 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5778 #endif
   5779 	},
   5780 	{
   5781 		ARM_VLDMDIA, ARM_INS_VLDMIA,
   5782 #ifndef CAPSTONE_DIET
   5783 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5784 #endif
   5785 	},
   5786 	{
   5787 		ARM_VLDMDIA_UPD, ARM_INS_VLDMIA,
   5788 #ifndef CAPSTONE_DIET
   5789 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5790 #endif
   5791 	},
   5792 	{
   5793 		ARM_VLDMSDB_UPD, ARM_INS_VLDMDB,
   5794 #ifndef CAPSTONE_DIET
   5795 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5796 #endif
   5797 	},
   5798 	{
   5799 		ARM_VLDMSIA, ARM_INS_VLDMIA,
   5800 #ifndef CAPSTONE_DIET
   5801 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5802 #endif
   5803 	},
   5804 	{
   5805 		ARM_VLDMSIA_UPD, ARM_INS_VLDMIA,
   5806 #ifndef CAPSTONE_DIET
   5807 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5808 #endif
   5809 	},
   5810 	{
   5811 		ARM_VLDRD, ARM_INS_VLDR,
   5812 #ifndef CAPSTONE_DIET
   5813 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5814 #endif
   5815 	},
   5816 	{
   5817 		ARM_VLDRS, ARM_INS_VLDR,
   5818 #ifndef CAPSTONE_DIET
   5819 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   5820 #endif
   5821 	},
   5822 	{
   5823 		ARM_VMAXNMD, ARM_INS_VMAXNM,
   5824 #ifndef CAPSTONE_DIET
   5825 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   5826 #endif
   5827 	},
   5828 	{
   5829 		ARM_VMAXNMND, ARM_INS_VMAXNM,
   5830 #ifndef CAPSTONE_DIET
   5831 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   5832 #endif
   5833 	},
   5834 	{
   5835 		ARM_VMAXNMNQ, ARM_INS_VMAXNM,
   5836 #ifndef CAPSTONE_DIET
   5837 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   5838 #endif
   5839 	},
   5840 	{
   5841 		ARM_VMAXNMS, ARM_INS_VMAXNM,
   5842 #ifndef CAPSTONE_DIET
   5843 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   5844 #endif
   5845 	},
   5846 	{
   5847 		ARM_VMAXfd, ARM_INS_VMAX,
   5848 #ifndef CAPSTONE_DIET
   5849 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5850 #endif
   5851 	},
   5852 	{
   5853 		ARM_VMAXfq, ARM_INS_VMAX,
   5854 #ifndef CAPSTONE_DIET
   5855 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5856 #endif
   5857 	},
   5858 	{
   5859 		ARM_VMAXsv16i8, ARM_INS_VMAX,
   5860 #ifndef CAPSTONE_DIET
   5861 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5862 #endif
   5863 	},
   5864 	{
   5865 		ARM_VMAXsv2i32, ARM_INS_VMAX,
   5866 #ifndef CAPSTONE_DIET
   5867 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5868 #endif
   5869 	},
   5870 	{
   5871 		ARM_VMAXsv4i16, ARM_INS_VMAX,
   5872 #ifndef CAPSTONE_DIET
   5873 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5874 #endif
   5875 	},
   5876 	{
   5877 		ARM_VMAXsv4i32, ARM_INS_VMAX,
   5878 #ifndef CAPSTONE_DIET
   5879 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5880 #endif
   5881 	},
   5882 	{
   5883 		ARM_VMAXsv8i16, ARM_INS_VMAX,
   5884 #ifndef CAPSTONE_DIET
   5885 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5886 #endif
   5887 	},
   5888 	{
   5889 		ARM_VMAXsv8i8, ARM_INS_VMAX,
   5890 #ifndef CAPSTONE_DIET
   5891 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5892 #endif
   5893 	},
   5894 	{
   5895 		ARM_VMAXuv16i8, ARM_INS_VMAX,
   5896 #ifndef CAPSTONE_DIET
   5897 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5898 #endif
   5899 	},
   5900 	{
   5901 		ARM_VMAXuv2i32, ARM_INS_VMAX,
   5902 #ifndef CAPSTONE_DIET
   5903 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5904 #endif
   5905 	},
   5906 	{
   5907 		ARM_VMAXuv4i16, ARM_INS_VMAX,
   5908 #ifndef CAPSTONE_DIET
   5909 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5910 #endif
   5911 	},
   5912 	{
   5913 		ARM_VMAXuv4i32, ARM_INS_VMAX,
   5914 #ifndef CAPSTONE_DIET
   5915 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5916 #endif
   5917 	},
   5918 	{
   5919 		ARM_VMAXuv8i16, ARM_INS_VMAX,
   5920 #ifndef CAPSTONE_DIET
   5921 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5922 #endif
   5923 	},
   5924 	{
   5925 		ARM_VMAXuv8i8, ARM_INS_VMAX,
   5926 #ifndef CAPSTONE_DIET
   5927 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5928 #endif
   5929 	},
   5930 	{
   5931 		ARM_VMINNMD, ARM_INS_VMINNM,
   5932 #ifndef CAPSTONE_DIET
   5933 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   5934 #endif
   5935 	},
   5936 	{
   5937 		ARM_VMINNMND, ARM_INS_VMINNM,
   5938 #ifndef CAPSTONE_DIET
   5939 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   5940 #endif
   5941 	},
   5942 	{
   5943 		ARM_VMINNMNQ, ARM_INS_VMINNM,
   5944 #ifndef CAPSTONE_DIET
   5945 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   5946 #endif
   5947 	},
   5948 	{
   5949 		ARM_VMINNMS, ARM_INS_VMINNM,
   5950 #ifndef CAPSTONE_DIET
   5951 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   5952 #endif
   5953 	},
   5954 	{
   5955 		ARM_VMINfd, ARM_INS_VMIN,
   5956 #ifndef CAPSTONE_DIET
   5957 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5958 #endif
   5959 	},
   5960 	{
   5961 		ARM_VMINfq, ARM_INS_VMIN,
   5962 #ifndef CAPSTONE_DIET
   5963 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5964 #endif
   5965 	},
   5966 	{
   5967 		ARM_VMINsv16i8, ARM_INS_VMIN,
   5968 #ifndef CAPSTONE_DIET
   5969 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5970 #endif
   5971 	},
   5972 	{
   5973 		ARM_VMINsv2i32, ARM_INS_VMIN,
   5974 #ifndef CAPSTONE_DIET
   5975 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5976 #endif
   5977 	},
   5978 	{
   5979 		ARM_VMINsv4i16, ARM_INS_VMIN,
   5980 #ifndef CAPSTONE_DIET
   5981 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5982 #endif
   5983 	},
   5984 	{
   5985 		ARM_VMINsv4i32, ARM_INS_VMIN,
   5986 #ifndef CAPSTONE_DIET
   5987 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5988 #endif
   5989 	},
   5990 	{
   5991 		ARM_VMINsv8i16, ARM_INS_VMIN,
   5992 #ifndef CAPSTONE_DIET
   5993 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   5994 #endif
   5995 	},
   5996 	{
   5997 		ARM_VMINsv8i8, ARM_INS_VMIN,
   5998 #ifndef CAPSTONE_DIET
   5999 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6000 #endif
   6001 	},
   6002 	{
   6003 		ARM_VMINuv16i8, ARM_INS_VMIN,
   6004 #ifndef CAPSTONE_DIET
   6005 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6006 #endif
   6007 	},
   6008 	{
   6009 		ARM_VMINuv2i32, ARM_INS_VMIN,
   6010 #ifndef CAPSTONE_DIET
   6011 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6012 #endif
   6013 	},
   6014 	{
   6015 		ARM_VMINuv4i16, ARM_INS_VMIN,
   6016 #ifndef CAPSTONE_DIET
   6017 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6018 #endif
   6019 	},
   6020 	{
   6021 		ARM_VMINuv4i32, ARM_INS_VMIN,
   6022 #ifndef CAPSTONE_DIET
   6023 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6024 #endif
   6025 	},
   6026 	{
   6027 		ARM_VMINuv8i16, ARM_INS_VMIN,
   6028 #ifndef CAPSTONE_DIET
   6029 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6030 #endif
   6031 	},
   6032 	{
   6033 		ARM_VMINuv8i8, ARM_INS_VMIN,
   6034 #ifndef CAPSTONE_DIET
   6035 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6036 #endif
   6037 	},
   6038 	{
   6039 		ARM_VMLAD, ARM_INS_VMLA,
   6040 #ifndef CAPSTONE_DIET
   6041 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
   6042 #endif
   6043 	},
   6044 	{
   6045 		ARM_VMLALslsv2i32, ARM_INS_VMLAL,
   6046 #ifndef CAPSTONE_DIET
   6047 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6048 #endif
   6049 	},
   6050 	{
   6051 		ARM_VMLALslsv4i16, ARM_INS_VMLAL,
   6052 #ifndef CAPSTONE_DIET
   6053 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6054 #endif
   6055 	},
   6056 	{
   6057 		ARM_VMLALsluv2i32, ARM_INS_VMLAL,
   6058 #ifndef CAPSTONE_DIET
   6059 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6060 #endif
   6061 	},
   6062 	{
   6063 		ARM_VMLALsluv4i16, ARM_INS_VMLAL,
   6064 #ifndef CAPSTONE_DIET
   6065 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6066 #endif
   6067 	},
   6068 	{
   6069 		ARM_VMLALsv2i64, ARM_INS_VMLAL,
   6070 #ifndef CAPSTONE_DIET
   6071 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6072 #endif
   6073 	},
   6074 	{
   6075 		ARM_VMLALsv4i32, ARM_INS_VMLAL,
   6076 #ifndef CAPSTONE_DIET
   6077 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6078 #endif
   6079 	},
   6080 	{
   6081 		ARM_VMLALsv8i16, ARM_INS_VMLAL,
   6082 #ifndef CAPSTONE_DIET
   6083 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6084 #endif
   6085 	},
   6086 	{
   6087 		ARM_VMLALuv2i64, ARM_INS_VMLAL,
   6088 #ifndef CAPSTONE_DIET
   6089 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6090 #endif
   6091 	},
   6092 	{
   6093 		ARM_VMLALuv4i32, ARM_INS_VMLAL,
   6094 #ifndef CAPSTONE_DIET
   6095 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6096 #endif
   6097 	},
   6098 	{
   6099 		ARM_VMLALuv8i16, ARM_INS_VMLAL,
   6100 #ifndef CAPSTONE_DIET
   6101 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6102 #endif
   6103 	},
   6104 	{
   6105 		ARM_VMLAS, ARM_INS_VMLA,
   6106 #ifndef CAPSTONE_DIET
   6107 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
   6108 #endif
   6109 	},
   6110 	{
   6111 		ARM_VMLAfd, ARM_INS_VMLA,
   6112 #ifndef CAPSTONE_DIET
   6113 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6114 #endif
   6115 	},
   6116 	{
   6117 		ARM_VMLAfq, ARM_INS_VMLA,
   6118 #ifndef CAPSTONE_DIET
   6119 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6120 #endif
   6121 	},
   6122 	{
   6123 		ARM_VMLAslfd, ARM_INS_VMLA,
   6124 #ifndef CAPSTONE_DIET
   6125 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6126 #endif
   6127 	},
   6128 	{
   6129 		ARM_VMLAslfq, ARM_INS_VMLA,
   6130 #ifndef CAPSTONE_DIET
   6131 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6132 #endif
   6133 	},
   6134 	{
   6135 		ARM_VMLAslv2i32, ARM_INS_VMLA,
   6136 #ifndef CAPSTONE_DIET
   6137 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6138 #endif
   6139 	},
   6140 	{
   6141 		ARM_VMLAslv4i16, ARM_INS_VMLA,
   6142 #ifndef CAPSTONE_DIET
   6143 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6144 #endif
   6145 	},
   6146 	{
   6147 		ARM_VMLAslv4i32, ARM_INS_VMLA,
   6148 #ifndef CAPSTONE_DIET
   6149 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6150 #endif
   6151 	},
   6152 	{
   6153 		ARM_VMLAslv8i16, ARM_INS_VMLA,
   6154 #ifndef CAPSTONE_DIET
   6155 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6156 #endif
   6157 	},
   6158 	{
   6159 		ARM_VMLAv16i8, ARM_INS_VMLA,
   6160 #ifndef CAPSTONE_DIET
   6161 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6162 #endif
   6163 	},
   6164 	{
   6165 		ARM_VMLAv2i32, ARM_INS_VMLA,
   6166 #ifndef CAPSTONE_DIET
   6167 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6168 #endif
   6169 	},
   6170 	{
   6171 		ARM_VMLAv4i16, ARM_INS_VMLA,
   6172 #ifndef CAPSTONE_DIET
   6173 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6174 #endif
   6175 	},
   6176 	{
   6177 		ARM_VMLAv4i32, ARM_INS_VMLA,
   6178 #ifndef CAPSTONE_DIET
   6179 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6180 #endif
   6181 	},
   6182 	{
   6183 		ARM_VMLAv8i16, ARM_INS_VMLA,
   6184 #ifndef CAPSTONE_DIET
   6185 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6186 #endif
   6187 	},
   6188 	{
   6189 		ARM_VMLAv8i8, ARM_INS_VMLA,
   6190 #ifndef CAPSTONE_DIET
   6191 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6192 #endif
   6193 	},
   6194 	{
   6195 		ARM_VMLSD, ARM_INS_VMLS,
   6196 #ifndef CAPSTONE_DIET
   6197 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
   6198 #endif
   6199 	},
   6200 	{
   6201 		ARM_VMLSLslsv2i32, ARM_INS_VMLSL,
   6202 #ifndef CAPSTONE_DIET
   6203 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6204 #endif
   6205 	},
   6206 	{
   6207 		ARM_VMLSLslsv4i16, ARM_INS_VMLSL,
   6208 #ifndef CAPSTONE_DIET
   6209 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6210 #endif
   6211 	},
   6212 	{
   6213 		ARM_VMLSLsluv2i32, ARM_INS_VMLSL,
   6214 #ifndef CAPSTONE_DIET
   6215 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6216 #endif
   6217 	},
   6218 	{
   6219 		ARM_VMLSLsluv4i16, ARM_INS_VMLSL,
   6220 #ifndef CAPSTONE_DIET
   6221 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6222 #endif
   6223 	},
   6224 	{
   6225 		ARM_VMLSLsv2i64, ARM_INS_VMLSL,
   6226 #ifndef CAPSTONE_DIET
   6227 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6228 #endif
   6229 	},
   6230 	{
   6231 		ARM_VMLSLsv4i32, ARM_INS_VMLSL,
   6232 #ifndef CAPSTONE_DIET
   6233 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6234 #endif
   6235 	},
   6236 	{
   6237 		ARM_VMLSLsv8i16, ARM_INS_VMLSL,
   6238 #ifndef CAPSTONE_DIET
   6239 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6240 #endif
   6241 	},
   6242 	{
   6243 		ARM_VMLSLuv2i64, ARM_INS_VMLSL,
   6244 #ifndef CAPSTONE_DIET
   6245 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6246 #endif
   6247 	},
   6248 	{
   6249 		ARM_VMLSLuv4i32, ARM_INS_VMLSL,
   6250 #ifndef CAPSTONE_DIET
   6251 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6252 #endif
   6253 	},
   6254 	{
   6255 		ARM_VMLSLuv8i16, ARM_INS_VMLSL,
   6256 #ifndef CAPSTONE_DIET
   6257 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6258 #endif
   6259 	},
   6260 	{
   6261 		ARM_VMLSS, ARM_INS_VMLS,
   6262 #ifndef CAPSTONE_DIET
   6263 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
   6264 #endif
   6265 	},
   6266 	{
   6267 		ARM_VMLSfd, ARM_INS_VMLS,
   6268 #ifndef CAPSTONE_DIET
   6269 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6270 #endif
   6271 	},
   6272 	{
   6273 		ARM_VMLSfq, ARM_INS_VMLS,
   6274 #ifndef CAPSTONE_DIET
   6275 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6276 #endif
   6277 	},
   6278 	{
   6279 		ARM_VMLSslfd, ARM_INS_VMLS,
   6280 #ifndef CAPSTONE_DIET
   6281 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6282 #endif
   6283 	},
   6284 	{
   6285 		ARM_VMLSslfq, ARM_INS_VMLS,
   6286 #ifndef CAPSTONE_DIET
   6287 		{ 0 }, { 0 }, { ARM_GRP_NEON, ARM_GRP_FPVMLX, 0 }, 0, 0
   6288 #endif
   6289 	},
   6290 	{
   6291 		ARM_VMLSslv2i32, ARM_INS_VMLS,
   6292 #ifndef CAPSTONE_DIET
   6293 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6294 #endif
   6295 	},
   6296 	{
   6297 		ARM_VMLSslv4i16, ARM_INS_VMLS,
   6298 #ifndef CAPSTONE_DIET
   6299 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6300 #endif
   6301 	},
   6302 	{
   6303 		ARM_VMLSslv4i32, ARM_INS_VMLS,
   6304 #ifndef CAPSTONE_DIET
   6305 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6306 #endif
   6307 	},
   6308 	{
   6309 		ARM_VMLSslv8i16, ARM_INS_VMLS,
   6310 #ifndef CAPSTONE_DIET
   6311 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6312 #endif
   6313 	},
   6314 	{
   6315 		ARM_VMLSv16i8, ARM_INS_VMLS,
   6316 #ifndef CAPSTONE_DIET
   6317 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6318 #endif
   6319 	},
   6320 	{
   6321 		ARM_VMLSv2i32, ARM_INS_VMLS,
   6322 #ifndef CAPSTONE_DIET
   6323 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6324 #endif
   6325 	},
   6326 	{
   6327 		ARM_VMLSv4i16, ARM_INS_VMLS,
   6328 #ifndef CAPSTONE_DIET
   6329 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6330 #endif
   6331 	},
   6332 	{
   6333 		ARM_VMLSv4i32, ARM_INS_VMLS,
   6334 #ifndef CAPSTONE_DIET
   6335 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6336 #endif
   6337 	},
   6338 	{
   6339 		ARM_VMLSv8i16, ARM_INS_VMLS,
   6340 #ifndef CAPSTONE_DIET
   6341 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6342 #endif
   6343 	},
   6344 	{
   6345 		ARM_VMLSv8i8, ARM_INS_VMLS,
   6346 #ifndef CAPSTONE_DIET
   6347 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6348 #endif
   6349 	},
   6350 	{
   6351 		ARM_VMOVD, ARM_INS_VMOV,
   6352 #ifndef CAPSTONE_DIET
   6353 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   6354 #endif
   6355 	},
   6356 	{
   6357 		ARM_VMOVDRR, ARM_INS_VMOV,
   6358 #ifndef CAPSTONE_DIET
   6359 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6360 #endif
   6361 	},
   6362 	{
   6363 		ARM_VMOVLsv2i64, ARM_INS_VMOVL,
   6364 #ifndef CAPSTONE_DIET
   6365 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6366 #endif
   6367 	},
   6368 	{
   6369 		ARM_VMOVLsv4i32, ARM_INS_VMOVL,
   6370 #ifndef CAPSTONE_DIET
   6371 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6372 #endif
   6373 	},
   6374 	{
   6375 		ARM_VMOVLsv8i16, ARM_INS_VMOVL,
   6376 #ifndef CAPSTONE_DIET
   6377 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6378 #endif
   6379 	},
   6380 	{
   6381 		ARM_VMOVLuv2i64, ARM_INS_VMOVL,
   6382 #ifndef CAPSTONE_DIET
   6383 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6384 #endif
   6385 	},
   6386 	{
   6387 		ARM_VMOVLuv4i32, ARM_INS_VMOVL,
   6388 #ifndef CAPSTONE_DIET
   6389 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6390 #endif
   6391 	},
   6392 	{
   6393 		ARM_VMOVLuv8i16, ARM_INS_VMOVL,
   6394 #ifndef CAPSTONE_DIET
   6395 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6396 #endif
   6397 	},
   6398 	{
   6399 		ARM_VMOVNv2i32, ARM_INS_VMOVN,
   6400 #ifndef CAPSTONE_DIET
   6401 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6402 #endif
   6403 	},
   6404 	{
   6405 		ARM_VMOVNv4i16, ARM_INS_VMOVN,
   6406 #ifndef CAPSTONE_DIET
   6407 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6408 #endif
   6409 	},
   6410 	{
   6411 		ARM_VMOVNv8i8, ARM_INS_VMOVN,
   6412 #ifndef CAPSTONE_DIET
   6413 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6414 #endif
   6415 	},
   6416 	{
   6417 		ARM_VMOVRRD, ARM_INS_VMOV,
   6418 #ifndef CAPSTONE_DIET
   6419 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6420 #endif
   6421 	},
   6422 	{
   6423 		ARM_VMOVRRS, ARM_INS_VMOV,
   6424 #ifndef CAPSTONE_DIET
   6425 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6426 #endif
   6427 	},
   6428 	{
   6429 		ARM_VMOVRS, ARM_INS_VMOV,
   6430 #ifndef CAPSTONE_DIET
   6431 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6432 #endif
   6433 	},
   6434 	{
   6435 		ARM_VMOVS, ARM_INS_VMOV,
   6436 #ifndef CAPSTONE_DIET
   6437 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6438 #endif
   6439 	},
   6440 	{
   6441 		ARM_VMOVSR, ARM_INS_VMOV,
   6442 #ifndef CAPSTONE_DIET
   6443 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6444 #endif
   6445 	},
   6446 	{
   6447 		ARM_VMOVSRR, ARM_INS_VMOV,
   6448 #ifndef CAPSTONE_DIET
   6449 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6450 #endif
   6451 	},
   6452 	{
   6453 		ARM_VMOVv16i8, ARM_INS_VMOV,
   6454 #ifndef CAPSTONE_DIET
   6455 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6456 #endif
   6457 	},
   6458 	{
   6459 		ARM_VMOVv1i64, ARM_INS_VMOV,
   6460 #ifndef CAPSTONE_DIET
   6461 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6462 #endif
   6463 	},
   6464 	{
   6465 		ARM_VMOVv2f32, ARM_INS_VMOV,
   6466 #ifndef CAPSTONE_DIET
   6467 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6468 #endif
   6469 	},
   6470 	{
   6471 		ARM_VMOVv2i32, ARM_INS_VMOV,
   6472 #ifndef CAPSTONE_DIET
   6473 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6474 #endif
   6475 	},
   6476 	{
   6477 		ARM_VMOVv2i64, ARM_INS_VMOV,
   6478 #ifndef CAPSTONE_DIET
   6479 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6480 #endif
   6481 	},
   6482 	{
   6483 		ARM_VMOVv4f32, ARM_INS_VMOV,
   6484 #ifndef CAPSTONE_DIET
   6485 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6486 #endif
   6487 	},
   6488 	{
   6489 		ARM_VMOVv4i16, ARM_INS_VMOV,
   6490 #ifndef CAPSTONE_DIET
   6491 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6492 #endif
   6493 	},
   6494 	{
   6495 		ARM_VMOVv4i32, ARM_INS_VMOV,
   6496 #ifndef CAPSTONE_DIET
   6497 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6498 #endif
   6499 	},
   6500 	{
   6501 		ARM_VMOVv8i16, ARM_INS_VMOV,
   6502 #ifndef CAPSTONE_DIET
   6503 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6504 #endif
   6505 	},
   6506 	{
   6507 		ARM_VMOVv8i8, ARM_INS_VMOV,
   6508 #ifndef CAPSTONE_DIET
   6509 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6510 #endif
   6511 	},
   6512 	{
   6513 		ARM_VMRS, ARM_INS_VMRS,
   6514 #ifndef CAPSTONE_DIET
   6515 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6516 #endif
   6517 	},
   6518 	{
   6519 		ARM_VMRS_FPEXC, ARM_INS_VMRS,
   6520 #ifndef CAPSTONE_DIET
   6521 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6522 #endif
   6523 	},
   6524 	{
   6525 		ARM_VMRS_FPINST, ARM_INS_VMRS,
   6526 #ifndef CAPSTONE_DIET
   6527 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6528 #endif
   6529 	},
   6530 	{
   6531 		ARM_VMRS_FPINST2, ARM_INS_VMRS,
   6532 #ifndef CAPSTONE_DIET
   6533 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6534 #endif
   6535 	},
   6536 	{
   6537 		ARM_VMRS_FPSID, ARM_INS_VMRS,
   6538 #ifndef CAPSTONE_DIET
   6539 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6540 #endif
   6541 	},
   6542 	{
   6543 		ARM_VMRS_MVFR0, ARM_INS_VMRS,
   6544 #ifndef CAPSTONE_DIET
   6545 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6546 #endif
   6547 	},
   6548 	{
   6549 		ARM_VMRS_MVFR1, ARM_INS_VMRS,
   6550 #ifndef CAPSTONE_DIET
   6551 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6552 #endif
   6553 	},
   6554 	{
   6555 		ARM_VMRS_MVFR2, ARM_INS_VMRS,
   6556 #ifndef CAPSTONE_DIET
   6557 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   6558 #endif
   6559 	},
   6560 	{
   6561 		ARM_VMSR, ARM_INS_VMSR,
   6562 #ifndef CAPSTONE_DIET
   6563 		{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6564 #endif
   6565 	},
   6566 	{
   6567 		ARM_VMSR_FPEXC, ARM_INS_VMSR,
   6568 #ifndef CAPSTONE_DIET
   6569 		{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6570 #endif
   6571 	},
   6572 	{
   6573 		ARM_VMSR_FPINST, ARM_INS_VMSR,
   6574 #ifndef CAPSTONE_DIET
   6575 		{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6576 #endif
   6577 	},
   6578 	{
   6579 		ARM_VMSR_FPINST2, ARM_INS_VMSR,
   6580 #ifndef CAPSTONE_DIET
   6581 		{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6582 #endif
   6583 	},
   6584 	{
   6585 		ARM_VMSR_FPSID, ARM_INS_VMSR,
   6586 #ifndef CAPSTONE_DIET
   6587 		{ 0 }, { ARM_REG_FPSCR, 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6588 #endif
   6589 	},
   6590 	{
   6591 		ARM_VMULD, ARM_INS_VMUL,
   6592 #ifndef CAPSTONE_DIET
   6593 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   6594 #endif
   6595 	},
   6596 	{
   6597 		ARM_VMULLp64, ARM_INS_VMULL,
   6598 #ifndef CAPSTONE_DIET
   6599 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_CRYPTO, 0 }, 0, 0
   6600 #endif
   6601 	},
   6602 	{
   6603 		ARM_VMULLp8, ARM_INS_VMULL,
   6604 #ifndef CAPSTONE_DIET
   6605 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6606 #endif
   6607 	},
   6608 	{
   6609 		ARM_VMULLslsv2i32, ARM_INS_VMULL,
   6610 #ifndef CAPSTONE_DIET
   6611 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6612 #endif
   6613 	},
   6614 	{
   6615 		ARM_VMULLslsv4i16, ARM_INS_VMULL,
   6616 #ifndef CAPSTONE_DIET
   6617 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6618 #endif
   6619 	},
   6620 	{
   6621 		ARM_VMULLsluv2i32, ARM_INS_VMULL,
   6622 #ifndef CAPSTONE_DIET
   6623 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6624 #endif
   6625 	},
   6626 	{
   6627 		ARM_VMULLsluv4i16, ARM_INS_VMULL,
   6628 #ifndef CAPSTONE_DIET
   6629 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6630 #endif
   6631 	},
   6632 	{
   6633 		ARM_VMULLsv2i64, ARM_INS_VMULL,
   6634 #ifndef CAPSTONE_DIET
   6635 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6636 #endif
   6637 	},
   6638 	{
   6639 		ARM_VMULLsv4i32, ARM_INS_VMULL,
   6640 #ifndef CAPSTONE_DIET
   6641 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6642 #endif
   6643 	},
   6644 	{
   6645 		ARM_VMULLsv8i16, ARM_INS_VMULL,
   6646 #ifndef CAPSTONE_DIET
   6647 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6648 #endif
   6649 	},
   6650 	{
   6651 		ARM_VMULLuv2i64, ARM_INS_VMULL,
   6652 #ifndef CAPSTONE_DIET
   6653 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6654 #endif
   6655 	},
   6656 	{
   6657 		ARM_VMULLuv4i32, ARM_INS_VMULL,
   6658 #ifndef CAPSTONE_DIET
   6659 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6660 #endif
   6661 	},
   6662 	{
   6663 		ARM_VMULLuv8i16, ARM_INS_VMULL,
   6664 #ifndef CAPSTONE_DIET
   6665 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6666 #endif
   6667 	},
   6668 	{
   6669 		ARM_VMULS, ARM_INS_VMUL,
   6670 #ifndef CAPSTONE_DIET
   6671 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6672 #endif
   6673 	},
   6674 	{
   6675 		ARM_VMULfd, ARM_INS_VMUL,
   6676 #ifndef CAPSTONE_DIET
   6677 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6678 #endif
   6679 	},
   6680 	{
   6681 		ARM_VMULfq, ARM_INS_VMUL,
   6682 #ifndef CAPSTONE_DIET
   6683 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6684 #endif
   6685 	},
   6686 	{
   6687 		ARM_VMULpd, ARM_INS_VMUL,
   6688 #ifndef CAPSTONE_DIET
   6689 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6690 #endif
   6691 	},
   6692 	{
   6693 		ARM_VMULpq, ARM_INS_VMUL,
   6694 #ifndef CAPSTONE_DIET
   6695 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6696 #endif
   6697 	},
   6698 	{
   6699 		ARM_VMULslfd, ARM_INS_VMUL,
   6700 #ifndef CAPSTONE_DIET
   6701 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6702 #endif
   6703 	},
   6704 	{
   6705 		ARM_VMULslfq, ARM_INS_VMUL,
   6706 #ifndef CAPSTONE_DIET
   6707 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6708 #endif
   6709 	},
   6710 	{
   6711 		ARM_VMULslv2i32, ARM_INS_VMUL,
   6712 #ifndef CAPSTONE_DIET
   6713 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6714 #endif
   6715 	},
   6716 	{
   6717 		ARM_VMULslv4i16, ARM_INS_VMUL,
   6718 #ifndef CAPSTONE_DIET
   6719 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6720 #endif
   6721 	},
   6722 	{
   6723 		ARM_VMULslv4i32, ARM_INS_VMUL,
   6724 #ifndef CAPSTONE_DIET
   6725 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6726 #endif
   6727 	},
   6728 	{
   6729 		ARM_VMULslv8i16, ARM_INS_VMUL,
   6730 #ifndef CAPSTONE_DIET
   6731 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6732 #endif
   6733 	},
   6734 	{
   6735 		ARM_VMULv16i8, ARM_INS_VMUL,
   6736 #ifndef CAPSTONE_DIET
   6737 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6738 #endif
   6739 	},
   6740 	{
   6741 		ARM_VMULv2i32, ARM_INS_VMUL,
   6742 #ifndef CAPSTONE_DIET
   6743 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6744 #endif
   6745 	},
   6746 	{
   6747 		ARM_VMULv4i16, ARM_INS_VMUL,
   6748 #ifndef CAPSTONE_DIET
   6749 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6750 #endif
   6751 	},
   6752 	{
   6753 		ARM_VMULv4i32, ARM_INS_VMUL,
   6754 #ifndef CAPSTONE_DIET
   6755 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6756 #endif
   6757 	},
   6758 	{
   6759 		ARM_VMULv8i16, ARM_INS_VMUL,
   6760 #ifndef CAPSTONE_DIET
   6761 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6762 #endif
   6763 	},
   6764 	{
   6765 		ARM_VMULv8i8, ARM_INS_VMUL,
   6766 #ifndef CAPSTONE_DIET
   6767 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6768 #endif
   6769 	},
   6770 	{
   6771 		ARM_VMVNd, ARM_INS_VMVN,
   6772 #ifndef CAPSTONE_DIET
   6773 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6774 #endif
   6775 	},
   6776 	{
   6777 		ARM_VMVNq, ARM_INS_VMVN,
   6778 #ifndef CAPSTONE_DIET
   6779 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6780 #endif
   6781 	},
   6782 	{
   6783 		ARM_VMVNv2i32, ARM_INS_VMVN,
   6784 #ifndef CAPSTONE_DIET
   6785 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6786 #endif
   6787 	},
   6788 	{
   6789 		ARM_VMVNv4i16, ARM_INS_VMVN,
   6790 #ifndef CAPSTONE_DIET
   6791 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6792 #endif
   6793 	},
   6794 	{
   6795 		ARM_VMVNv4i32, ARM_INS_VMVN,
   6796 #ifndef CAPSTONE_DIET
   6797 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6798 #endif
   6799 	},
   6800 	{
   6801 		ARM_VMVNv8i16, ARM_INS_VMVN,
   6802 #ifndef CAPSTONE_DIET
   6803 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6804 #endif
   6805 	},
   6806 	{
   6807 		ARM_VNEGD, ARM_INS_VNEG,
   6808 #ifndef CAPSTONE_DIET
   6809 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   6810 #endif
   6811 	},
   6812 	{
   6813 		ARM_VNEGS, ARM_INS_VNEG,
   6814 #ifndef CAPSTONE_DIET
   6815 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6816 #endif
   6817 	},
   6818 	{
   6819 		ARM_VNEGf32q, ARM_INS_VNEG,
   6820 #ifndef CAPSTONE_DIET
   6821 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6822 #endif
   6823 	},
   6824 	{
   6825 		ARM_VNEGfd, ARM_INS_VNEG,
   6826 #ifndef CAPSTONE_DIET
   6827 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6828 #endif
   6829 	},
   6830 	{
   6831 		ARM_VNEGs16d, ARM_INS_VNEG,
   6832 #ifndef CAPSTONE_DIET
   6833 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6834 #endif
   6835 	},
   6836 	{
   6837 		ARM_VNEGs16q, ARM_INS_VNEG,
   6838 #ifndef CAPSTONE_DIET
   6839 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6840 #endif
   6841 	},
   6842 	{
   6843 		ARM_VNEGs32d, ARM_INS_VNEG,
   6844 #ifndef CAPSTONE_DIET
   6845 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6846 #endif
   6847 	},
   6848 	{
   6849 		ARM_VNEGs32q, ARM_INS_VNEG,
   6850 #ifndef CAPSTONE_DIET
   6851 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6852 #endif
   6853 	},
   6854 	{
   6855 		ARM_VNEGs8d, ARM_INS_VNEG,
   6856 #ifndef CAPSTONE_DIET
   6857 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6858 #endif
   6859 	},
   6860 	{
   6861 		ARM_VNEGs8q, ARM_INS_VNEG,
   6862 #ifndef CAPSTONE_DIET
   6863 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6864 #endif
   6865 	},
   6866 	{
   6867 		ARM_VNMLAD, ARM_INS_VNMLA,
   6868 #ifndef CAPSTONE_DIET
   6869 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
   6870 #endif
   6871 	},
   6872 	{
   6873 		ARM_VNMLAS, ARM_INS_VNMLA,
   6874 #ifndef CAPSTONE_DIET
   6875 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
   6876 #endif
   6877 	},
   6878 	{
   6879 		ARM_VNMLSD, ARM_INS_VNMLS,
   6880 #ifndef CAPSTONE_DIET
   6881 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, ARM_GRP_FPVMLX, 0 }, 0, 0
   6882 #endif
   6883 	},
   6884 	{
   6885 		ARM_VNMLSS, ARM_INS_VNMLS,
   6886 #ifndef CAPSTONE_DIET
   6887 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_FPVMLX, 0 }, 0, 0
   6888 #endif
   6889 	},
   6890 	{
   6891 		ARM_VNMULD, ARM_INS_VNMUL,
   6892 #ifndef CAPSTONE_DIET
   6893 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   6894 #endif
   6895 	},
   6896 	{
   6897 		ARM_VNMULS, ARM_INS_VNMUL,
   6898 #ifndef CAPSTONE_DIET
   6899 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   6900 #endif
   6901 	},
   6902 	{
   6903 		ARM_VORNd, ARM_INS_VORN,
   6904 #ifndef CAPSTONE_DIET
   6905 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6906 #endif
   6907 	},
   6908 	{
   6909 		ARM_VORNq, ARM_INS_VORN,
   6910 #ifndef CAPSTONE_DIET
   6911 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6912 #endif
   6913 	},
   6914 	{
   6915 		ARM_VORRd, ARM_INS_VORR,
   6916 #ifndef CAPSTONE_DIET
   6917 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6918 #endif
   6919 	},
   6920 	{
   6921 		ARM_VORRiv2i32, ARM_INS_VORR,
   6922 #ifndef CAPSTONE_DIET
   6923 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6924 #endif
   6925 	},
   6926 	{
   6927 		ARM_VORRiv4i16, ARM_INS_VORR,
   6928 #ifndef CAPSTONE_DIET
   6929 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6930 #endif
   6931 	},
   6932 	{
   6933 		ARM_VORRiv4i32, ARM_INS_VORR,
   6934 #ifndef CAPSTONE_DIET
   6935 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6936 #endif
   6937 	},
   6938 	{
   6939 		ARM_VORRiv8i16, ARM_INS_VORR,
   6940 #ifndef CAPSTONE_DIET
   6941 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6942 #endif
   6943 	},
   6944 	{
   6945 		ARM_VORRq, ARM_INS_VORR,
   6946 #ifndef CAPSTONE_DIET
   6947 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6948 #endif
   6949 	},
   6950 	{
   6951 		ARM_VPADALsv16i8, ARM_INS_VPADAL,
   6952 #ifndef CAPSTONE_DIET
   6953 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6954 #endif
   6955 	},
   6956 	{
   6957 		ARM_VPADALsv2i32, ARM_INS_VPADAL,
   6958 #ifndef CAPSTONE_DIET
   6959 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6960 #endif
   6961 	},
   6962 	{
   6963 		ARM_VPADALsv4i16, ARM_INS_VPADAL,
   6964 #ifndef CAPSTONE_DIET
   6965 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6966 #endif
   6967 	},
   6968 	{
   6969 		ARM_VPADALsv4i32, ARM_INS_VPADAL,
   6970 #ifndef CAPSTONE_DIET
   6971 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6972 #endif
   6973 	},
   6974 	{
   6975 		ARM_VPADALsv8i16, ARM_INS_VPADAL,
   6976 #ifndef CAPSTONE_DIET
   6977 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6978 #endif
   6979 	},
   6980 	{
   6981 		ARM_VPADALsv8i8, ARM_INS_VPADAL,
   6982 #ifndef CAPSTONE_DIET
   6983 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6984 #endif
   6985 	},
   6986 	{
   6987 		ARM_VPADALuv16i8, ARM_INS_VPADAL,
   6988 #ifndef CAPSTONE_DIET
   6989 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6990 #endif
   6991 	},
   6992 	{
   6993 		ARM_VPADALuv2i32, ARM_INS_VPADAL,
   6994 #ifndef CAPSTONE_DIET
   6995 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   6996 #endif
   6997 	},
   6998 	{
   6999 		ARM_VPADALuv4i16, ARM_INS_VPADAL,
   7000 #ifndef CAPSTONE_DIET
   7001 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7002 #endif
   7003 	},
   7004 	{
   7005 		ARM_VPADALuv4i32, ARM_INS_VPADAL,
   7006 #ifndef CAPSTONE_DIET
   7007 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7008 #endif
   7009 	},
   7010 	{
   7011 		ARM_VPADALuv8i16, ARM_INS_VPADAL,
   7012 #ifndef CAPSTONE_DIET
   7013 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7014 #endif
   7015 	},
   7016 	{
   7017 		ARM_VPADALuv8i8, ARM_INS_VPADAL,
   7018 #ifndef CAPSTONE_DIET
   7019 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7020 #endif
   7021 	},
   7022 	{
   7023 		ARM_VPADDLsv16i8, ARM_INS_VPADDL,
   7024 #ifndef CAPSTONE_DIET
   7025 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7026 #endif
   7027 	},
   7028 	{
   7029 		ARM_VPADDLsv2i32, ARM_INS_VPADDL,
   7030 #ifndef CAPSTONE_DIET
   7031 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7032 #endif
   7033 	},
   7034 	{
   7035 		ARM_VPADDLsv4i16, ARM_INS_VPADDL,
   7036 #ifndef CAPSTONE_DIET
   7037 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7038 #endif
   7039 	},
   7040 	{
   7041 		ARM_VPADDLsv4i32, ARM_INS_VPADDL,
   7042 #ifndef CAPSTONE_DIET
   7043 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7044 #endif
   7045 	},
   7046 	{
   7047 		ARM_VPADDLsv8i16, ARM_INS_VPADDL,
   7048 #ifndef CAPSTONE_DIET
   7049 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7050 #endif
   7051 	},
   7052 	{
   7053 		ARM_VPADDLsv8i8, ARM_INS_VPADDL,
   7054 #ifndef CAPSTONE_DIET
   7055 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7056 #endif
   7057 	},
   7058 	{
   7059 		ARM_VPADDLuv16i8, ARM_INS_VPADDL,
   7060 #ifndef CAPSTONE_DIET
   7061 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7062 #endif
   7063 	},
   7064 	{
   7065 		ARM_VPADDLuv2i32, ARM_INS_VPADDL,
   7066 #ifndef CAPSTONE_DIET
   7067 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7068 #endif
   7069 	},
   7070 	{
   7071 		ARM_VPADDLuv4i16, ARM_INS_VPADDL,
   7072 #ifndef CAPSTONE_DIET
   7073 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7074 #endif
   7075 	},
   7076 	{
   7077 		ARM_VPADDLuv4i32, ARM_INS_VPADDL,
   7078 #ifndef CAPSTONE_DIET
   7079 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7080 #endif
   7081 	},
   7082 	{
   7083 		ARM_VPADDLuv8i16, ARM_INS_VPADDL,
   7084 #ifndef CAPSTONE_DIET
   7085 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7086 #endif
   7087 	},
   7088 	{
   7089 		ARM_VPADDLuv8i8, ARM_INS_VPADDL,
   7090 #ifndef CAPSTONE_DIET
   7091 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7092 #endif
   7093 	},
   7094 	{
   7095 		ARM_VPADDf, ARM_INS_VPADD,
   7096 #ifndef CAPSTONE_DIET
   7097 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7098 #endif
   7099 	},
   7100 	{
   7101 		ARM_VPADDi16, ARM_INS_VPADD,
   7102 #ifndef CAPSTONE_DIET
   7103 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7104 #endif
   7105 	},
   7106 	{
   7107 		ARM_VPADDi32, ARM_INS_VPADD,
   7108 #ifndef CAPSTONE_DIET
   7109 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7110 #endif
   7111 	},
   7112 	{
   7113 		ARM_VPADDi8, ARM_INS_VPADD,
   7114 #ifndef CAPSTONE_DIET
   7115 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7116 #endif
   7117 	},
   7118 	{
   7119 		ARM_VPMAXf, ARM_INS_VPMAX,
   7120 #ifndef CAPSTONE_DIET
   7121 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7122 #endif
   7123 	},
   7124 	{
   7125 		ARM_VPMAXs16, ARM_INS_VPMAX,
   7126 #ifndef CAPSTONE_DIET
   7127 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7128 #endif
   7129 	},
   7130 	{
   7131 		ARM_VPMAXs32, ARM_INS_VPMAX,
   7132 #ifndef CAPSTONE_DIET
   7133 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7134 #endif
   7135 	},
   7136 	{
   7137 		ARM_VPMAXs8, ARM_INS_VPMAX,
   7138 #ifndef CAPSTONE_DIET
   7139 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7140 #endif
   7141 	},
   7142 	{
   7143 		ARM_VPMAXu16, ARM_INS_VPMAX,
   7144 #ifndef CAPSTONE_DIET
   7145 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7146 #endif
   7147 	},
   7148 	{
   7149 		ARM_VPMAXu32, ARM_INS_VPMAX,
   7150 #ifndef CAPSTONE_DIET
   7151 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7152 #endif
   7153 	},
   7154 	{
   7155 		ARM_VPMAXu8, ARM_INS_VPMAX,
   7156 #ifndef CAPSTONE_DIET
   7157 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7158 #endif
   7159 	},
   7160 	{
   7161 		ARM_VPMINf, ARM_INS_VPMIN,
   7162 #ifndef CAPSTONE_DIET
   7163 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7164 #endif
   7165 	},
   7166 	{
   7167 		ARM_VPMINs16, ARM_INS_VPMIN,
   7168 #ifndef CAPSTONE_DIET
   7169 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7170 #endif
   7171 	},
   7172 	{
   7173 		ARM_VPMINs32, ARM_INS_VPMIN,
   7174 #ifndef CAPSTONE_DIET
   7175 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7176 #endif
   7177 	},
   7178 	{
   7179 		ARM_VPMINs8, ARM_INS_VPMIN,
   7180 #ifndef CAPSTONE_DIET
   7181 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7182 #endif
   7183 	},
   7184 	{
   7185 		ARM_VPMINu16, ARM_INS_VPMIN,
   7186 #ifndef CAPSTONE_DIET
   7187 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7188 #endif
   7189 	},
   7190 	{
   7191 		ARM_VPMINu32, ARM_INS_VPMIN,
   7192 #ifndef CAPSTONE_DIET
   7193 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7194 #endif
   7195 	},
   7196 	{
   7197 		ARM_VPMINu8, ARM_INS_VPMIN,
   7198 #ifndef CAPSTONE_DIET
   7199 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7200 #endif
   7201 	},
   7202 	{
   7203 		ARM_VQABSv16i8, ARM_INS_VQABS,
   7204 #ifndef CAPSTONE_DIET
   7205 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7206 #endif
   7207 	},
   7208 	{
   7209 		ARM_VQABSv2i32, ARM_INS_VQABS,
   7210 #ifndef CAPSTONE_DIET
   7211 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7212 #endif
   7213 	},
   7214 	{
   7215 		ARM_VQABSv4i16, ARM_INS_VQABS,
   7216 #ifndef CAPSTONE_DIET
   7217 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7218 #endif
   7219 	},
   7220 	{
   7221 		ARM_VQABSv4i32, ARM_INS_VQABS,
   7222 #ifndef CAPSTONE_DIET
   7223 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7224 #endif
   7225 	},
   7226 	{
   7227 		ARM_VQABSv8i16, ARM_INS_VQABS,
   7228 #ifndef CAPSTONE_DIET
   7229 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7230 #endif
   7231 	},
   7232 	{
   7233 		ARM_VQABSv8i8, ARM_INS_VQABS,
   7234 #ifndef CAPSTONE_DIET
   7235 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7236 #endif
   7237 	},
   7238 	{
   7239 		ARM_VQADDsv16i8, ARM_INS_VQADD,
   7240 #ifndef CAPSTONE_DIET
   7241 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7242 #endif
   7243 	},
   7244 	{
   7245 		ARM_VQADDsv1i64, ARM_INS_VQADD,
   7246 #ifndef CAPSTONE_DIET
   7247 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7248 #endif
   7249 	},
   7250 	{
   7251 		ARM_VQADDsv2i32, ARM_INS_VQADD,
   7252 #ifndef CAPSTONE_DIET
   7253 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7254 #endif
   7255 	},
   7256 	{
   7257 		ARM_VQADDsv2i64, ARM_INS_VQADD,
   7258 #ifndef CAPSTONE_DIET
   7259 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7260 #endif
   7261 	},
   7262 	{
   7263 		ARM_VQADDsv4i16, ARM_INS_VQADD,
   7264 #ifndef CAPSTONE_DIET
   7265 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7266 #endif
   7267 	},
   7268 	{
   7269 		ARM_VQADDsv4i32, ARM_INS_VQADD,
   7270 #ifndef CAPSTONE_DIET
   7271 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7272 #endif
   7273 	},
   7274 	{
   7275 		ARM_VQADDsv8i16, ARM_INS_VQADD,
   7276 #ifndef CAPSTONE_DIET
   7277 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7278 #endif
   7279 	},
   7280 	{
   7281 		ARM_VQADDsv8i8, ARM_INS_VQADD,
   7282 #ifndef CAPSTONE_DIET
   7283 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7284 #endif
   7285 	},
   7286 	{
   7287 		ARM_VQADDuv16i8, ARM_INS_VQADD,
   7288 #ifndef CAPSTONE_DIET
   7289 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7290 #endif
   7291 	},
   7292 	{
   7293 		ARM_VQADDuv1i64, ARM_INS_VQADD,
   7294 #ifndef CAPSTONE_DIET
   7295 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7296 #endif
   7297 	},
   7298 	{
   7299 		ARM_VQADDuv2i32, ARM_INS_VQADD,
   7300 #ifndef CAPSTONE_DIET
   7301 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7302 #endif
   7303 	},
   7304 	{
   7305 		ARM_VQADDuv2i64, ARM_INS_VQADD,
   7306 #ifndef CAPSTONE_DIET
   7307 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7308 #endif
   7309 	},
   7310 	{
   7311 		ARM_VQADDuv4i16, ARM_INS_VQADD,
   7312 #ifndef CAPSTONE_DIET
   7313 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7314 #endif
   7315 	},
   7316 	{
   7317 		ARM_VQADDuv4i32, ARM_INS_VQADD,
   7318 #ifndef CAPSTONE_DIET
   7319 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7320 #endif
   7321 	},
   7322 	{
   7323 		ARM_VQADDuv8i16, ARM_INS_VQADD,
   7324 #ifndef CAPSTONE_DIET
   7325 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7326 #endif
   7327 	},
   7328 	{
   7329 		ARM_VQADDuv8i8, ARM_INS_VQADD,
   7330 #ifndef CAPSTONE_DIET
   7331 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7332 #endif
   7333 	},
   7334 	{
   7335 		ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL,
   7336 #ifndef CAPSTONE_DIET
   7337 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7338 #endif
   7339 	},
   7340 	{
   7341 		ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL,
   7342 #ifndef CAPSTONE_DIET
   7343 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7344 #endif
   7345 	},
   7346 	{
   7347 		ARM_VQDMLALv2i64, ARM_INS_VQDMLAL,
   7348 #ifndef CAPSTONE_DIET
   7349 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7350 #endif
   7351 	},
   7352 	{
   7353 		ARM_VQDMLALv4i32, ARM_INS_VQDMLAL,
   7354 #ifndef CAPSTONE_DIET
   7355 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7356 #endif
   7357 	},
   7358 	{
   7359 		ARM_VQDMLSLslv2i32, ARM_INS_VQDMLSL,
   7360 #ifndef CAPSTONE_DIET
   7361 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7362 #endif
   7363 	},
   7364 	{
   7365 		ARM_VQDMLSLslv4i16, ARM_INS_VQDMLSL,
   7366 #ifndef CAPSTONE_DIET
   7367 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7368 #endif
   7369 	},
   7370 	{
   7371 		ARM_VQDMLSLv2i64, ARM_INS_VQDMLSL,
   7372 #ifndef CAPSTONE_DIET
   7373 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7374 #endif
   7375 	},
   7376 	{
   7377 		ARM_VQDMLSLv4i32, ARM_INS_VQDMLSL,
   7378 #ifndef CAPSTONE_DIET
   7379 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7380 #endif
   7381 	},
   7382 	{
   7383 		ARM_VQDMULHslv2i32, ARM_INS_VQDMULH,
   7384 #ifndef CAPSTONE_DIET
   7385 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7386 #endif
   7387 	},
   7388 	{
   7389 		ARM_VQDMULHslv4i16, ARM_INS_VQDMULH,
   7390 #ifndef CAPSTONE_DIET
   7391 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7392 #endif
   7393 	},
   7394 	{
   7395 		ARM_VQDMULHslv4i32, ARM_INS_VQDMULH,
   7396 #ifndef CAPSTONE_DIET
   7397 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7398 #endif
   7399 	},
   7400 	{
   7401 		ARM_VQDMULHslv8i16, ARM_INS_VQDMULH,
   7402 #ifndef CAPSTONE_DIET
   7403 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7404 #endif
   7405 	},
   7406 	{
   7407 		ARM_VQDMULHv2i32, ARM_INS_VQDMULH,
   7408 #ifndef CAPSTONE_DIET
   7409 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7410 #endif
   7411 	},
   7412 	{
   7413 		ARM_VQDMULHv4i16, ARM_INS_VQDMULH,
   7414 #ifndef CAPSTONE_DIET
   7415 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7416 #endif
   7417 	},
   7418 	{
   7419 		ARM_VQDMULHv4i32, ARM_INS_VQDMULH,
   7420 #ifndef CAPSTONE_DIET
   7421 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7422 #endif
   7423 	},
   7424 	{
   7425 		ARM_VQDMULHv8i16, ARM_INS_VQDMULH,
   7426 #ifndef CAPSTONE_DIET
   7427 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7428 #endif
   7429 	},
   7430 	{
   7431 		ARM_VQDMULLslv2i32, ARM_INS_VQDMULL,
   7432 #ifndef CAPSTONE_DIET
   7433 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7434 #endif
   7435 	},
   7436 	{
   7437 		ARM_VQDMULLslv4i16, ARM_INS_VQDMULL,
   7438 #ifndef CAPSTONE_DIET
   7439 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7440 #endif
   7441 	},
   7442 	{
   7443 		ARM_VQDMULLv2i64, ARM_INS_VQDMULL,
   7444 #ifndef CAPSTONE_DIET
   7445 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7446 #endif
   7447 	},
   7448 	{
   7449 		ARM_VQDMULLv4i32, ARM_INS_VQDMULL,
   7450 #ifndef CAPSTONE_DIET
   7451 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7452 #endif
   7453 	},
   7454 	{
   7455 		ARM_VQMOVNsuv2i32, ARM_INS_VQMOVUN,
   7456 #ifndef CAPSTONE_DIET
   7457 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7458 #endif
   7459 	},
   7460 	{
   7461 		ARM_VQMOVNsuv4i16, ARM_INS_VQMOVUN,
   7462 #ifndef CAPSTONE_DIET
   7463 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7464 #endif
   7465 	},
   7466 	{
   7467 		ARM_VQMOVNsuv8i8, ARM_INS_VQMOVUN,
   7468 #ifndef CAPSTONE_DIET
   7469 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7470 #endif
   7471 	},
   7472 	{
   7473 		ARM_VQMOVNsv2i32, ARM_INS_VQMOVN,
   7474 #ifndef CAPSTONE_DIET
   7475 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7476 #endif
   7477 	},
   7478 	{
   7479 		ARM_VQMOVNsv4i16, ARM_INS_VQMOVN,
   7480 #ifndef CAPSTONE_DIET
   7481 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7482 #endif
   7483 	},
   7484 	{
   7485 		ARM_VQMOVNsv8i8, ARM_INS_VQMOVN,
   7486 #ifndef CAPSTONE_DIET
   7487 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7488 #endif
   7489 	},
   7490 	{
   7491 		ARM_VQMOVNuv2i32, ARM_INS_VQMOVN,
   7492 #ifndef CAPSTONE_DIET
   7493 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7494 #endif
   7495 	},
   7496 	{
   7497 		ARM_VQMOVNuv4i16, ARM_INS_VQMOVN,
   7498 #ifndef CAPSTONE_DIET
   7499 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7500 #endif
   7501 	},
   7502 	{
   7503 		ARM_VQMOVNuv8i8, ARM_INS_VQMOVN,
   7504 #ifndef CAPSTONE_DIET
   7505 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7506 #endif
   7507 	},
   7508 	{
   7509 		ARM_VQNEGv16i8, ARM_INS_VQNEG,
   7510 #ifndef CAPSTONE_DIET
   7511 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7512 #endif
   7513 	},
   7514 	{
   7515 		ARM_VQNEGv2i32, ARM_INS_VQNEG,
   7516 #ifndef CAPSTONE_DIET
   7517 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7518 #endif
   7519 	},
   7520 	{
   7521 		ARM_VQNEGv4i16, ARM_INS_VQNEG,
   7522 #ifndef CAPSTONE_DIET
   7523 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7524 #endif
   7525 	},
   7526 	{
   7527 		ARM_VQNEGv4i32, ARM_INS_VQNEG,
   7528 #ifndef CAPSTONE_DIET
   7529 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7530 #endif
   7531 	},
   7532 	{
   7533 		ARM_VQNEGv8i16, ARM_INS_VQNEG,
   7534 #ifndef CAPSTONE_DIET
   7535 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7536 #endif
   7537 	},
   7538 	{
   7539 		ARM_VQNEGv8i8, ARM_INS_VQNEG,
   7540 #ifndef CAPSTONE_DIET
   7541 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7542 #endif
   7543 	},
   7544 	{
   7545 		ARM_VQRDMULHslv2i32, ARM_INS_VQRDMULH,
   7546 #ifndef CAPSTONE_DIET
   7547 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7548 #endif
   7549 	},
   7550 	{
   7551 		ARM_VQRDMULHslv4i16, ARM_INS_VQRDMULH,
   7552 #ifndef CAPSTONE_DIET
   7553 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7554 #endif
   7555 	},
   7556 	{
   7557 		ARM_VQRDMULHslv4i32, ARM_INS_VQRDMULH,
   7558 #ifndef CAPSTONE_DIET
   7559 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7560 #endif
   7561 	},
   7562 	{
   7563 		ARM_VQRDMULHslv8i16, ARM_INS_VQRDMULH,
   7564 #ifndef CAPSTONE_DIET
   7565 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7566 #endif
   7567 	},
   7568 	{
   7569 		ARM_VQRDMULHv2i32, ARM_INS_VQRDMULH,
   7570 #ifndef CAPSTONE_DIET
   7571 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7572 #endif
   7573 	},
   7574 	{
   7575 		ARM_VQRDMULHv4i16, ARM_INS_VQRDMULH,
   7576 #ifndef CAPSTONE_DIET
   7577 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7578 #endif
   7579 	},
   7580 	{
   7581 		ARM_VQRDMULHv4i32, ARM_INS_VQRDMULH,
   7582 #ifndef CAPSTONE_DIET
   7583 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7584 #endif
   7585 	},
   7586 	{
   7587 		ARM_VQRDMULHv8i16, ARM_INS_VQRDMULH,
   7588 #ifndef CAPSTONE_DIET
   7589 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7590 #endif
   7591 	},
   7592 	{
   7593 		ARM_VQRSHLsv16i8, ARM_INS_VQRSHL,
   7594 #ifndef CAPSTONE_DIET
   7595 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7596 #endif
   7597 	},
   7598 	{
   7599 		ARM_VQRSHLsv1i64, ARM_INS_VQRSHL,
   7600 #ifndef CAPSTONE_DIET
   7601 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7602 #endif
   7603 	},
   7604 	{
   7605 		ARM_VQRSHLsv2i32, ARM_INS_VQRSHL,
   7606 #ifndef CAPSTONE_DIET
   7607 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7608 #endif
   7609 	},
   7610 	{
   7611 		ARM_VQRSHLsv2i64, ARM_INS_VQRSHL,
   7612 #ifndef CAPSTONE_DIET
   7613 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7614 #endif
   7615 	},
   7616 	{
   7617 		ARM_VQRSHLsv4i16, ARM_INS_VQRSHL,
   7618 #ifndef CAPSTONE_DIET
   7619 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7620 #endif
   7621 	},
   7622 	{
   7623 		ARM_VQRSHLsv4i32, ARM_INS_VQRSHL,
   7624 #ifndef CAPSTONE_DIET
   7625 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7626 #endif
   7627 	},
   7628 	{
   7629 		ARM_VQRSHLsv8i16, ARM_INS_VQRSHL,
   7630 #ifndef CAPSTONE_DIET
   7631 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7632 #endif
   7633 	},
   7634 	{
   7635 		ARM_VQRSHLsv8i8, ARM_INS_VQRSHL,
   7636 #ifndef CAPSTONE_DIET
   7637 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7638 #endif
   7639 	},
   7640 	{
   7641 		ARM_VQRSHLuv16i8, ARM_INS_VQRSHL,
   7642 #ifndef CAPSTONE_DIET
   7643 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7644 #endif
   7645 	},
   7646 	{
   7647 		ARM_VQRSHLuv1i64, ARM_INS_VQRSHL,
   7648 #ifndef CAPSTONE_DIET
   7649 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7650 #endif
   7651 	},
   7652 	{
   7653 		ARM_VQRSHLuv2i32, ARM_INS_VQRSHL,
   7654 #ifndef CAPSTONE_DIET
   7655 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7656 #endif
   7657 	},
   7658 	{
   7659 		ARM_VQRSHLuv2i64, ARM_INS_VQRSHL,
   7660 #ifndef CAPSTONE_DIET
   7661 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7662 #endif
   7663 	},
   7664 	{
   7665 		ARM_VQRSHLuv4i16, ARM_INS_VQRSHL,
   7666 #ifndef CAPSTONE_DIET
   7667 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7668 #endif
   7669 	},
   7670 	{
   7671 		ARM_VQRSHLuv4i32, ARM_INS_VQRSHL,
   7672 #ifndef CAPSTONE_DIET
   7673 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7674 #endif
   7675 	},
   7676 	{
   7677 		ARM_VQRSHLuv8i16, ARM_INS_VQRSHL,
   7678 #ifndef CAPSTONE_DIET
   7679 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7680 #endif
   7681 	},
   7682 	{
   7683 		ARM_VQRSHLuv8i8, ARM_INS_VQRSHL,
   7684 #ifndef CAPSTONE_DIET
   7685 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7686 #endif
   7687 	},
   7688 	{
   7689 		ARM_VQRSHRNsv2i32, ARM_INS_VQRSHRN,
   7690 #ifndef CAPSTONE_DIET
   7691 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7692 #endif
   7693 	},
   7694 	{
   7695 		ARM_VQRSHRNsv4i16, ARM_INS_VQRSHRN,
   7696 #ifndef CAPSTONE_DIET
   7697 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7698 #endif
   7699 	},
   7700 	{
   7701 		ARM_VQRSHRNsv8i8, ARM_INS_VQRSHRN,
   7702 #ifndef CAPSTONE_DIET
   7703 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7704 #endif
   7705 	},
   7706 	{
   7707 		ARM_VQRSHRNuv2i32, ARM_INS_VQRSHRN,
   7708 #ifndef CAPSTONE_DIET
   7709 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7710 #endif
   7711 	},
   7712 	{
   7713 		ARM_VQRSHRNuv4i16, ARM_INS_VQRSHRN,
   7714 #ifndef CAPSTONE_DIET
   7715 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7716 #endif
   7717 	},
   7718 	{
   7719 		ARM_VQRSHRNuv8i8, ARM_INS_VQRSHRN,
   7720 #ifndef CAPSTONE_DIET
   7721 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7722 #endif
   7723 	},
   7724 	{
   7725 		ARM_VQRSHRUNv2i32, ARM_INS_VQRSHRUN,
   7726 #ifndef CAPSTONE_DIET
   7727 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7728 #endif
   7729 	},
   7730 	{
   7731 		ARM_VQRSHRUNv4i16, ARM_INS_VQRSHRUN,
   7732 #ifndef CAPSTONE_DIET
   7733 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7734 #endif
   7735 	},
   7736 	{
   7737 		ARM_VQRSHRUNv8i8, ARM_INS_VQRSHRUN,
   7738 #ifndef CAPSTONE_DIET
   7739 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7740 #endif
   7741 	},
   7742 	{
   7743 		ARM_VQSHLsiv16i8, ARM_INS_VQSHL,
   7744 #ifndef CAPSTONE_DIET
   7745 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7746 #endif
   7747 	},
   7748 	{
   7749 		ARM_VQSHLsiv1i64, ARM_INS_VQSHL,
   7750 #ifndef CAPSTONE_DIET
   7751 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7752 #endif
   7753 	},
   7754 	{
   7755 		ARM_VQSHLsiv2i32, ARM_INS_VQSHL,
   7756 #ifndef CAPSTONE_DIET
   7757 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7758 #endif
   7759 	},
   7760 	{
   7761 		ARM_VQSHLsiv2i64, ARM_INS_VQSHL,
   7762 #ifndef CAPSTONE_DIET
   7763 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7764 #endif
   7765 	},
   7766 	{
   7767 		ARM_VQSHLsiv4i16, ARM_INS_VQSHL,
   7768 #ifndef CAPSTONE_DIET
   7769 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7770 #endif
   7771 	},
   7772 	{
   7773 		ARM_VQSHLsiv4i32, ARM_INS_VQSHL,
   7774 #ifndef CAPSTONE_DIET
   7775 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7776 #endif
   7777 	},
   7778 	{
   7779 		ARM_VQSHLsiv8i16, ARM_INS_VQSHL,
   7780 #ifndef CAPSTONE_DIET
   7781 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7782 #endif
   7783 	},
   7784 	{
   7785 		ARM_VQSHLsiv8i8, ARM_INS_VQSHL,
   7786 #ifndef CAPSTONE_DIET
   7787 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7788 #endif
   7789 	},
   7790 	{
   7791 		ARM_VQSHLsuv16i8, ARM_INS_VQSHLU,
   7792 #ifndef CAPSTONE_DIET
   7793 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7794 #endif
   7795 	},
   7796 	{
   7797 		ARM_VQSHLsuv1i64, ARM_INS_VQSHLU,
   7798 #ifndef CAPSTONE_DIET
   7799 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7800 #endif
   7801 	},
   7802 	{
   7803 		ARM_VQSHLsuv2i32, ARM_INS_VQSHLU,
   7804 #ifndef CAPSTONE_DIET
   7805 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7806 #endif
   7807 	},
   7808 	{
   7809 		ARM_VQSHLsuv2i64, ARM_INS_VQSHLU,
   7810 #ifndef CAPSTONE_DIET
   7811 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7812 #endif
   7813 	},
   7814 	{
   7815 		ARM_VQSHLsuv4i16, ARM_INS_VQSHLU,
   7816 #ifndef CAPSTONE_DIET
   7817 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7818 #endif
   7819 	},
   7820 	{
   7821 		ARM_VQSHLsuv4i32, ARM_INS_VQSHLU,
   7822 #ifndef CAPSTONE_DIET
   7823 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7824 #endif
   7825 	},
   7826 	{
   7827 		ARM_VQSHLsuv8i16, ARM_INS_VQSHLU,
   7828 #ifndef CAPSTONE_DIET
   7829 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7830 #endif
   7831 	},
   7832 	{
   7833 		ARM_VQSHLsuv8i8, ARM_INS_VQSHLU,
   7834 #ifndef CAPSTONE_DIET
   7835 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7836 #endif
   7837 	},
   7838 	{
   7839 		ARM_VQSHLsv16i8, ARM_INS_VQSHL,
   7840 #ifndef CAPSTONE_DIET
   7841 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7842 #endif
   7843 	},
   7844 	{
   7845 		ARM_VQSHLsv1i64, ARM_INS_VQSHL,
   7846 #ifndef CAPSTONE_DIET
   7847 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7848 #endif
   7849 	},
   7850 	{
   7851 		ARM_VQSHLsv2i32, ARM_INS_VQSHL,
   7852 #ifndef CAPSTONE_DIET
   7853 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7854 #endif
   7855 	},
   7856 	{
   7857 		ARM_VQSHLsv2i64, ARM_INS_VQSHL,
   7858 #ifndef CAPSTONE_DIET
   7859 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7860 #endif
   7861 	},
   7862 	{
   7863 		ARM_VQSHLsv4i16, ARM_INS_VQSHL,
   7864 #ifndef CAPSTONE_DIET
   7865 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7866 #endif
   7867 	},
   7868 	{
   7869 		ARM_VQSHLsv4i32, ARM_INS_VQSHL,
   7870 #ifndef CAPSTONE_DIET
   7871 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7872 #endif
   7873 	},
   7874 	{
   7875 		ARM_VQSHLsv8i16, ARM_INS_VQSHL,
   7876 #ifndef CAPSTONE_DIET
   7877 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7878 #endif
   7879 	},
   7880 	{
   7881 		ARM_VQSHLsv8i8, ARM_INS_VQSHL,
   7882 #ifndef CAPSTONE_DIET
   7883 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7884 #endif
   7885 	},
   7886 	{
   7887 		ARM_VQSHLuiv16i8, ARM_INS_VQSHL,
   7888 #ifndef CAPSTONE_DIET
   7889 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7890 #endif
   7891 	},
   7892 	{
   7893 		ARM_VQSHLuiv1i64, ARM_INS_VQSHL,
   7894 #ifndef CAPSTONE_DIET
   7895 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7896 #endif
   7897 	},
   7898 	{
   7899 		ARM_VQSHLuiv2i32, ARM_INS_VQSHL,
   7900 #ifndef CAPSTONE_DIET
   7901 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7902 #endif
   7903 	},
   7904 	{
   7905 		ARM_VQSHLuiv2i64, ARM_INS_VQSHL,
   7906 #ifndef CAPSTONE_DIET
   7907 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7908 #endif
   7909 	},
   7910 	{
   7911 		ARM_VQSHLuiv4i16, ARM_INS_VQSHL,
   7912 #ifndef CAPSTONE_DIET
   7913 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7914 #endif
   7915 	},
   7916 	{
   7917 		ARM_VQSHLuiv4i32, ARM_INS_VQSHL,
   7918 #ifndef CAPSTONE_DIET
   7919 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7920 #endif
   7921 	},
   7922 	{
   7923 		ARM_VQSHLuiv8i16, ARM_INS_VQSHL,
   7924 #ifndef CAPSTONE_DIET
   7925 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7926 #endif
   7927 	},
   7928 	{
   7929 		ARM_VQSHLuiv8i8, ARM_INS_VQSHL,
   7930 #ifndef CAPSTONE_DIET
   7931 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7932 #endif
   7933 	},
   7934 	{
   7935 		ARM_VQSHLuv16i8, ARM_INS_VQSHL,
   7936 #ifndef CAPSTONE_DIET
   7937 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7938 #endif
   7939 	},
   7940 	{
   7941 		ARM_VQSHLuv1i64, ARM_INS_VQSHL,
   7942 #ifndef CAPSTONE_DIET
   7943 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7944 #endif
   7945 	},
   7946 	{
   7947 		ARM_VQSHLuv2i32, ARM_INS_VQSHL,
   7948 #ifndef CAPSTONE_DIET
   7949 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7950 #endif
   7951 	},
   7952 	{
   7953 		ARM_VQSHLuv2i64, ARM_INS_VQSHL,
   7954 #ifndef CAPSTONE_DIET
   7955 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7956 #endif
   7957 	},
   7958 	{
   7959 		ARM_VQSHLuv4i16, ARM_INS_VQSHL,
   7960 #ifndef CAPSTONE_DIET
   7961 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7962 #endif
   7963 	},
   7964 	{
   7965 		ARM_VQSHLuv4i32, ARM_INS_VQSHL,
   7966 #ifndef CAPSTONE_DIET
   7967 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7968 #endif
   7969 	},
   7970 	{
   7971 		ARM_VQSHLuv8i16, ARM_INS_VQSHL,
   7972 #ifndef CAPSTONE_DIET
   7973 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7974 #endif
   7975 	},
   7976 	{
   7977 		ARM_VQSHLuv8i8, ARM_INS_VQSHL,
   7978 #ifndef CAPSTONE_DIET
   7979 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7980 #endif
   7981 	},
   7982 	{
   7983 		ARM_VQSHRNsv2i32, ARM_INS_VQSHRN,
   7984 #ifndef CAPSTONE_DIET
   7985 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7986 #endif
   7987 	},
   7988 	{
   7989 		ARM_VQSHRNsv4i16, ARM_INS_VQSHRN,
   7990 #ifndef CAPSTONE_DIET
   7991 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7992 #endif
   7993 	},
   7994 	{
   7995 		ARM_VQSHRNsv8i8, ARM_INS_VQSHRN,
   7996 #ifndef CAPSTONE_DIET
   7997 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   7998 #endif
   7999 	},
   8000 	{
   8001 		ARM_VQSHRNuv2i32, ARM_INS_VQSHRN,
   8002 #ifndef CAPSTONE_DIET
   8003 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8004 #endif
   8005 	},
   8006 	{
   8007 		ARM_VQSHRNuv4i16, ARM_INS_VQSHRN,
   8008 #ifndef CAPSTONE_DIET
   8009 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8010 #endif
   8011 	},
   8012 	{
   8013 		ARM_VQSHRNuv8i8, ARM_INS_VQSHRN,
   8014 #ifndef CAPSTONE_DIET
   8015 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8016 #endif
   8017 	},
   8018 	{
   8019 		ARM_VQSHRUNv2i32, ARM_INS_VQSHRUN,
   8020 #ifndef CAPSTONE_DIET
   8021 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8022 #endif
   8023 	},
   8024 	{
   8025 		ARM_VQSHRUNv4i16, ARM_INS_VQSHRUN,
   8026 #ifndef CAPSTONE_DIET
   8027 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8028 #endif
   8029 	},
   8030 	{
   8031 		ARM_VQSHRUNv8i8, ARM_INS_VQSHRUN,
   8032 #ifndef CAPSTONE_DIET
   8033 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8034 #endif
   8035 	},
   8036 	{
   8037 		ARM_VQSUBsv16i8, ARM_INS_VQSUB,
   8038 #ifndef CAPSTONE_DIET
   8039 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8040 #endif
   8041 	},
   8042 	{
   8043 		ARM_VQSUBsv1i64, ARM_INS_VQSUB,
   8044 #ifndef CAPSTONE_DIET
   8045 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8046 #endif
   8047 	},
   8048 	{
   8049 		ARM_VQSUBsv2i32, ARM_INS_VQSUB,
   8050 #ifndef CAPSTONE_DIET
   8051 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8052 #endif
   8053 	},
   8054 	{
   8055 		ARM_VQSUBsv2i64, ARM_INS_VQSUB,
   8056 #ifndef CAPSTONE_DIET
   8057 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8058 #endif
   8059 	},
   8060 	{
   8061 		ARM_VQSUBsv4i16, ARM_INS_VQSUB,
   8062 #ifndef CAPSTONE_DIET
   8063 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8064 #endif
   8065 	},
   8066 	{
   8067 		ARM_VQSUBsv4i32, ARM_INS_VQSUB,
   8068 #ifndef CAPSTONE_DIET
   8069 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8070 #endif
   8071 	},
   8072 	{
   8073 		ARM_VQSUBsv8i16, ARM_INS_VQSUB,
   8074 #ifndef CAPSTONE_DIET
   8075 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8076 #endif
   8077 	},
   8078 	{
   8079 		ARM_VQSUBsv8i8, ARM_INS_VQSUB,
   8080 #ifndef CAPSTONE_DIET
   8081 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8082 #endif
   8083 	},
   8084 	{
   8085 		ARM_VQSUBuv16i8, ARM_INS_VQSUB,
   8086 #ifndef CAPSTONE_DIET
   8087 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8088 #endif
   8089 	},
   8090 	{
   8091 		ARM_VQSUBuv1i64, ARM_INS_VQSUB,
   8092 #ifndef CAPSTONE_DIET
   8093 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8094 #endif
   8095 	},
   8096 	{
   8097 		ARM_VQSUBuv2i32, ARM_INS_VQSUB,
   8098 #ifndef CAPSTONE_DIET
   8099 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8100 #endif
   8101 	},
   8102 	{
   8103 		ARM_VQSUBuv2i64, ARM_INS_VQSUB,
   8104 #ifndef CAPSTONE_DIET
   8105 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8106 #endif
   8107 	},
   8108 	{
   8109 		ARM_VQSUBuv4i16, ARM_INS_VQSUB,
   8110 #ifndef CAPSTONE_DIET
   8111 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8112 #endif
   8113 	},
   8114 	{
   8115 		ARM_VQSUBuv4i32, ARM_INS_VQSUB,
   8116 #ifndef CAPSTONE_DIET
   8117 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8118 #endif
   8119 	},
   8120 	{
   8121 		ARM_VQSUBuv8i16, ARM_INS_VQSUB,
   8122 #ifndef CAPSTONE_DIET
   8123 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8124 #endif
   8125 	},
   8126 	{
   8127 		ARM_VQSUBuv8i8, ARM_INS_VQSUB,
   8128 #ifndef CAPSTONE_DIET
   8129 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8130 #endif
   8131 	},
   8132 	{
   8133 		ARM_VRADDHNv2i32, ARM_INS_VRADDHN,
   8134 #ifndef CAPSTONE_DIET
   8135 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8136 #endif
   8137 	},
   8138 	{
   8139 		ARM_VRADDHNv4i16, ARM_INS_VRADDHN,
   8140 #ifndef CAPSTONE_DIET
   8141 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8142 #endif
   8143 	},
   8144 	{
   8145 		ARM_VRADDHNv8i8, ARM_INS_VRADDHN,
   8146 #ifndef CAPSTONE_DIET
   8147 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8148 #endif
   8149 	},
   8150 	{
   8151 		ARM_VRECPEd, ARM_INS_VRECPE,
   8152 #ifndef CAPSTONE_DIET
   8153 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8154 #endif
   8155 	},
   8156 	{
   8157 		ARM_VRECPEfd, ARM_INS_VRECPE,
   8158 #ifndef CAPSTONE_DIET
   8159 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8160 #endif
   8161 	},
   8162 	{
   8163 		ARM_VRECPEfq, ARM_INS_VRECPE,
   8164 #ifndef CAPSTONE_DIET
   8165 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8166 #endif
   8167 	},
   8168 	{
   8169 		ARM_VRECPEq, ARM_INS_VRECPE,
   8170 #ifndef CAPSTONE_DIET
   8171 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8172 #endif
   8173 	},
   8174 	{
   8175 		ARM_VRECPSfd, ARM_INS_VRECPS,
   8176 #ifndef CAPSTONE_DIET
   8177 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8178 #endif
   8179 	},
   8180 	{
   8181 		ARM_VRECPSfq, ARM_INS_VRECPS,
   8182 #ifndef CAPSTONE_DIET
   8183 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8184 #endif
   8185 	},
   8186 	{
   8187 		ARM_VREV16d8, ARM_INS_VREV16,
   8188 #ifndef CAPSTONE_DIET
   8189 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8190 #endif
   8191 	},
   8192 	{
   8193 		ARM_VREV16q8, ARM_INS_VREV16,
   8194 #ifndef CAPSTONE_DIET
   8195 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8196 #endif
   8197 	},
   8198 	{
   8199 		ARM_VREV32d16, ARM_INS_VREV32,
   8200 #ifndef CAPSTONE_DIET
   8201 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8202 #endif
   8203 	},
   8204 	{
   8205 		ARM_VREV32d8, ARM_INS_VREV32,
   8206 #ifndef CAPSTONE_DIET
   8207 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8208 #endif
   8209 	},
   8210 	{
   8211 		ARM_VREV32q16, ARM_INS_VREV32,
   8212 #ifndef CAPSTONE_DIET
   8213 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8214 #endif
   8215 	},
   8216 	{
   8217 		ARM_VREV32q8, ARM_INS_VREV32,
   8218 #ifndef CAPSTONE_DIET
   8219 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8220 #endif
   8221 	},
   8222 	{
   8223 		ARM_VREV64d16, ARM_INS_VREV64,
   8224 #ifndef CAPSTONE_DIET
   8225 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8226 #endif
   8227 	},
   8228 	{
   8229 		ARM_VREV64d32, ARM_INS_VREV64,
   8230 #ifndef CAPSTONE_DIET
   8231 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8232 #endif
   8233 	},
   8234 	{
   8235 		ARM_VREV64d8, ARM_INS_VREV64,
   8236 #ifndef CAPSTONE_DIET
   8237 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8238 #endif
   8239 	},
   8240 	{
   8241 		ARM_VREV64q16, ARM_INS_VREV64,
   8242 #ifndef CAPSTONE_DIET
   8243 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8244 #endif
   8245 	},
   8246 	{
   8247 		ARM_VREV64q32, ARM_INS_VREV64,
   8248 #ifndef CAPSTONE_DIET
   8249 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8250 #endif
   8251 	},
   8252 	{
   8253 		ARM_VREV64q8, ARM_INS_VREV64,
   8254 #ifndef CAPSTONE_DIET
   8255 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8256 #endif
   8257 	},
   8258 	{
   8259 		ARM_VRHADDsv16i8, ARM_INS_VRHADD,
   8260 #ifndef CAPSTONE_DIET
   8261 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8262 #endif
   8263 	},
   8264 	{
   8265 		ARM_VRHADDsv2i32, ARM_INS_VRHADD,
   8266 #ifndef CAPSTONE_DIET
   8267 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8268 #endif
   8269 	},
   8270 	{
   8271 		ARM_VRHADDsv4i16, ARM_INS_VRHADD,
   8272 #ifndef CAPSTONE_DIET
   8273 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8274 #endif
   8275 	},
   8276 	{
   8277 		ARM_VRHADDsv4i32, ARM_INS_VRHADD,
   8278 #ifndef CAPSTONE_DIET
   8279 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8280 #endif
   8281 	},
   8282 	{
   8283 		ARM_VRHADDsv8i16, ARM_INS_VRHADD,
   8284 #ifndef CAPSTONE_DIET
   8285 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8286 #endif
   8287 	},
   8288 	{
   8289 		ARM_VRHADDsv8i8, ARM_INS_VRHADD,
   8290 #ifndef CAPSTONE_DIET
   8291 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8292 #endif
   8293 	},
   8294 	{
   8295 		ARM_VRHADDuv16i8, ARM_INS_VRHADD,
   8296 #ifndef CAPSTONE_DIET
   8297 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8298 #endif
   8299 	},
   8300 	{
   8301 		ARM_VRHADDuv2i32, ARM_INS_VRHADD,
   8302 #ifndef CAPSTONE_DIET
   8303 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8304 #endif
   8305 	},
   8306 	{
   8307 		ARM_VRHADDuv4i16, ARM_INS_VRHADD,
   8308 #ifndef CAPSTONE_DIET
   8309 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8310 #endif
   8311 	},
   8312 	{
   8313 		ARM_VRHADDuv4i32, ARM_INS_VRHADD,
   8314 #ifndef CAPSTONE_DIET
   8315 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8316 #endif
   8317 	},
   8318 	{
   8319 		ARM_VRHADDuv8i16, ARM_INS_VRHADD,
   8320 #ifndef CAPSTONE_DIET
   8321 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8322 #endif
   8323 	},
   8324 	{
   8325 		ARM_VRHADDuv8i8, ARM_INS_VRHADD,
   8326 #ifndef CAPSTONE_DIET
   8327 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8328 #endif
   8329 	},
   8330 	{
   8331 		ARM_VRINTAD, ARM_INS_VRINTA,
   8332 #ifndef CAPSTONE_DIET
   8333 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8334 #endif
   8335 	},
   8336 	{
   8337 		ARM_VRINTAND, ARM_INS_VRINTA,
   8338 #ifndef CAPSTONE_DIET
   8339 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8340 #endif
   8341 	},
   8342 	{
   8343 		ARM_VRINTANQ, ARM_INS_VRINTA,
   8344 #ifndef CAPSTONE_DIET
   8345 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8346 #endif
   8347 	},
   8348 	{
   8349 		ARM_VRINTAS, ARM_INS_VRINTA,
   8350 #ifndef CAPSTONE_DIET
   8351 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8352 #endif
   8353 	},
   8354 	{
   8355 		ARM_VRINTMD, ARM_INS_VRINTM,
   8356 #ifndef CAPSTONE_DIET
   8357 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8358 #endif
   8359 	},
   8360 	{
   8361 		ARM_VRINTMND, ARM_INS_VRINTM,
   8362 #ifndef CAPSTONE_DIET
   8363 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8364 #endif
   8365 	},
   8366 	{
   8367 		ARM_VRINTMNQ, ARM_INS_VRINTM,
   8368 #ifndef CAPSTONE_DIET
   8369 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8370 #endif
   8371 	},
   8372 	{
   8373 		ARM_VRINTMS, ARM_INS_VRINTM,
   8374 #ifndef CAPSTONE_DIET
   8375 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8376 #endif
   8377 	},
   8378 	{
   8379 		ARM_VRINTND, ARM_INS_VRINTN,
   8380 #ifndef CAPSTONE_DIET
   8381 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8382 #endif
   8383 	},
   8384 	{
   8385 		ARM_VRINTNND, ARM_INS_VRINTN,
   8386 #ifndef CAPSTONE_DIET
   8387 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8388 #endif
   8389 	},
   8390 	{
   8391 		ARM_VRINTNNQ, ARM_INS_VRINTN,
   8392 #ifndef CAPSTONE_DIET
   8393 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8394 #endif
   8395 	},
   8396 	{
   8397 		ARM_VRINTNS, ARM_INS_VRINTN,
   8398 #ifndef CAPSTONE_DIET
   8399 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8400 #endif
   8401 	},
   8402 	{
   8403 		ARM_VRINTPD, ARM_INS_VRINTP,
   8404 #ifndef CAPSTONE_DIET
   8405 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8406 #endif
   8407 	},
   8408 	{
   8409 		ARM_VRINTPND, ARM_INS_VRINTP,
   8410 #ifndef CAPSTONE_DIET
   8411 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8412 #endif
   8413 	},
   8414 	{
   8415 		ARM_VRINTPNQ, ARM_INS_VRINTP,
   8416 #ifndef CAPSTONE_DIET
   8417 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8418 #endif
   8419 	},
   8420 	{
   8421 		ARM_VRINTPS, ARM_INS_VRINTP,
   8422 #ifndef CAPSTONE_DIET
   8423 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8424 #endif
   8425 	},
   8426 	{
   8427 		ARM_VRINTRD, ARM_INS_VRINTR,
   8428 #ifndef CAPSTONE_DIET
   8429 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8430 #endif
   8431 	},
   8432 	{
   8433 		ARM_VRINTRS, ARM_INS_VRINTR,
   8434 #ifndef CAPSTONE_DIET
   8435 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8436 #endif
   8437 	},
   8438 	{
   8439 		ARM_VRINTXD, ARM_INS_VRINTX,
   8440 #ifndef CAPSTONE_DIET
   8441 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8442 #endif
   8443 	},
   8444 	{
   8445 		ARM_VRINTXND, ARM_INS_VRINTX,
   8446 #ifndef CAPSTONE_DIET
   8447 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8448 #endif
   8449 	},
   8450 	{
   8451 		ARM_VRINTXNQ, ARM_INS_VRINTX,
   8452 #ifndef CAPSTONE_DIET
   8453 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8454 #endif
   8455 	},
   8456 	{
   8457 		ARM_VRINTXS, ARM_INS_VRINTX,
   8458 #ifndef CAPSTONE_DIET
   8459 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8460 #endif
   8461 	},
   8462 	{
   8463 		ARM_VRINTZD, ARM_INS_VRINTZ,
   8464 #ifndef CAPSTONE_DIET
   8465 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8466 #endif
   8467 	},
   8468 	{
   8469 		ARM_VRINTZND, ARM_INS_VRINTZ,
   8470 #ifndef CAPSTONE_DIET
   8471 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8472 #endif
   8473 	},
   8474 	{
   8475 		ARM_VRINTZNQ, ARM_INS_VRINTZ,
   8476 #ifndef CAPSTONE_DIET
   8477 		{ 0 }, { 0 }, { ARM_GRP_V8, ARM_GRP_NEON, 0 }, 0, 0
   8478 #endif
   8479 	},
   8480 	{
   8481 		ARM_VRINTZS, ARM_INS_VRINTZ,
   8482 #ifndef CAPSTONE_DIET
   8483 		{ 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8484 #endif
   8485 	},
   8486 	{
   8487 		ARM_VRSHLsv16i8, ARM_INS_VRSHL,
   8488 #ifndef CAPSTONE_DIET
   8489 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8490 #endif
   8491 	},
   8492 	{
   8493 		ARM_VRSHLsv1i64, ARM_INS_VRSHL,
   8494 #ifndef CAPSTONE_DIET
   8495 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8496 #endif
   8497 	},
   8498 	{
   8499 		ARM_VRSHLsv2i32, ARM_INS_VRSHL,
   8500 #ifndef CAPSTONE_DIET
   8501 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8502 #endif
   8503 	},
   8504 	{
   8505 		ARM_VRSHLsv2i64, ARM_INS_VRSHL,
   8506 #ifndef CAPSTONE_DIET
   8507 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8508 #endif
   8509 	},
   8510 	{
   8511 		ARM_VRSHLsv4i16, ARM_INS_VRSHL,
   8512 #ifndef CAPSTONE_DIET
   8513 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8514 #endif
   8515 	},
   8516 	{
   8517 		ARM_VRSHLsv4i32, ARM_INS_VRSHL,
   8518 #ifndef CAPSTONE_DIET
   8519 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8520 #endif
   8521 	},
   8522 	{
   8523 		ARM_VRSHLsv8i16, ARM_INS_VRSHL,
   8524 #ifndef CAPSTONE_DIET
   8525 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8526 #endif
   8527 	},
   8528 	{
   8529 		ARM_VRSHLsv8i8, ARM_INS_VRSHL,
   8530 #ifndef CAPSTONE_DIET
   8531 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8532 #endif
   8533 	},
   8534 	{
   8535 		ARM_VRSHLuv16i8, ARM_INS_VRSHL,
   8536 #ifndef CAPSTONE_DIET
   8537 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8538 #endif
   8539 	},
   8540 	{
   8541 		ARM_VRSHLuv1i64, ARM_INS_VRSHL,
   8542 #ifndef CAPSTONE_DIET
   8543 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8544 #endif
   8545 	},
   8546 	{
   8547 		ARM_VRSHLuv2i32, ARM_INS_VRSHL,
   8548 #ifndef CAPSTONE_DIET
   8549 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8550 #endif
   8551 	},
   8552 	{
   8553 		ARM_VRSHLuv2i64, ARM_INS_VRSHL,
   8554 #ifndef CAPSTONE_DIET
   8555 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8556 #endif
   8557 	},
   8558 	{
   8559 		ARM_VRSHLuv4i16, ARM_INS_VRSHL,
   8560 #ifndef CAPSTONE_DIET
   8561 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8562 #endif
   8563 	},
   8564 	{
   8565 		ARM_VRSHLuv4i32, ARM_INS_VRSHL,
   8566 #ifndef CAPSTONE_DIET
   8567 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8568 #endif
   8569 	},
   8570 	{
   8571 		ARM_VRSHLuv8i16, ARM_INS_VRSHL,
   8572 #ifndef CAPSTONE_DIET
   8573 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8574 #endif
   8575 	},
   8576 	{
   8577 		ARM_VRSHLuv8i8, ARM_INS_VRSHL,
   8578 #ifndef CAPSTONE_DIET
   8579 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8580 #endif
   8581 	},
   8582 	{
   8583 		ARM_VRSHRNv2i32, ARM_INS_VRSHRN,
   8584 #ifndef CAPSTONE_DIET
   8585 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8586 #endif
   8587 	},
   8588 	{
   8589 		ARM_VRSHRNv4i16, ARM_INS_VRSHRN,
   8590 #ifndef CAPSTONE_DIET
   8591 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8592 #endif
   8593 	},
   8594 	{
   8595 		ARM_VRSHRNv8i8, ARM_INS_VRSHRN,
   8596 #ifndef CAPSTONE_DIET
   8597 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8598 #endif
   8599 	},
   8600 	{
   8601 		ARM_VRSHRsv16i8, ARM_INS_VRSHR,
   8602 #ifndef CAPSTONE_DIET
   8603 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8604 #endif
   8605 	},
   8606 	{
   8607 		ARM_VRSHRsv1i64, ARM_INS_VRSHR,
   8608 #ifndef CAPSTONE_DIET
   8609 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8610 #endif
   8611 	},
   8612 	{
   8613 		ARM_VRSHRsv2i32, ARM_INS_VRSHR,
   8614 #ifndef CAPSTONE_DIET
   8615 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8616 #endif
   8617 	},
   8618 	{
   8619 		ARM_VRSHRsv2i64, ARM_INS_VRSHR,
   8620 #ifndef CAPSTONE_DIET
   8621 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8622 #endif
   8623 	},
   8624 	{
   8625 		ARM_VRSHRsv4i16, ARM_INS_VRSHR,
   8626 #ifndef CAPSTONE_DIET
   8627 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8628 #endif
   8629 	},
   8630 	{
   8631 		ARM_VRSHRsv4i32, ARM_INS_VRSHR,
   8632 #ifndef CAPSTONE_DIET
   8633 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8634 #endif
   8635 	},
   8636 	{
   8637 		ARM_VRSHRsv8i16, ARM_INS_VRSHR,
   8638 #ifndef CAPSTONE_DIET
   8639 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8640 #endif
   8641 	},
   8642 	{
   8643 		ARM_VRSHRsv8i8, ARM_INS_VRSHR,
   8644 #ifndef CAPSTONE_DIET
   8645 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8646 #endif
   8647 	},
   8648 	{
   8649 		ARM_VRSHRuv16i8, ARM_INS_VRSHR,
   8650 #ifndef CAPSTONE_DIET
   8651 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8652 #endif
   8653 	},
   8654 	{
   8655 		ARM_VRSHRuv1i64, ARM_INS_VRSHR,
   8656 #ifndef CAPSTONE_DIET
   8657 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8658 #endif
   8659 	},
   8660 	{
   8661 		ARM_VRSHRuv2i32, ARM_INS_VRSHR,
   8662 #ifndef CAPSTONE_DIET
   8663 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8664 #endif
   8665 	},
   8666 	{
   8667 		ARM_VRSHRuv2i64, ARM_INS_VRSHR,
   8668 #ifndef CAPSTONE_DIET
   8669 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8670 #endif
   8671 	},
   8672 	{
   8673 		ARM_VRSHRuv4i16, ARM_INS_VRSHR,
   8674 #ifndef CAPSTONE_DIET
   8675 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8676 #endif
   8677 	},
   8678 	{
   8679 		ARM_VRSHRuv4i32, ARM_INS_VRSHR,
   8680 #ifndef CAPSTONE_DIET
   8681 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8682 #endif
   8683 	},
   8684 	{
   8685 		ARM_VRSHRuv8i16, ARM_INS_VRSHR,
   8686 #ifndef CAPSTONE_DIET
   8687 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8688 #endif
   8689 	},
   8690 	{
   8691 		ARM_VRSHRuv8i8, ARM_INS_VRSHR,
   8692 #ifndef CAPSTONE_DIET
   8693 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8694 #endif
   8695 	},
   8696 	{
   8697 		ARM_VRSQRTEd, ARM_INS_VRSQRTE,
   8698 #ifndef CAPSTONE_DIET
   8699 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8700 #endif
   8701 	},
   8702 	{
   8703 		ARM_VRSQRTEfd, ARM_INS_VRSQRTE,
   8704 #ifndef CAPSTONE_DIET
   8705 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8706 #endif
   8707 	},
   8708 	{
   8709 		ARM_VRSQRTEfq, ARM_INS_VRSQRTE,
   8710 #ifndef CAPSTONE_DIET
   8711 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8712 #endif
   8713 	},
   8714 	{
   8715 		ARM_VRSQRTEq, ARM_INS_VRSQRTE,
   8716 #ifndef CAPSTONE_DIET
   8717 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8718 #endif
   8719 	},
   8720 	{
   8721 		ARM_VRSQRTSfd, ARM_INS_VRSQRTS,
   8722 #ifndef CAPSTONE_DIET
   8723 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8724 #endif
   8725 	},
   8726 	{
   8727 		ARM_VRSQRTSfq, ARM_INS_VRSQRTS,
   8728 #ifndef CAPSTONE_DIET
   8729 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8730 #endif
   8731 	},
   8732 	{
   8733 		ARM_VRSRAsv16i8, ARM_INS_VRSRA,
   8734 #ifndef CAPSTONE_DIET
   8735 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8736 #endif
   8737 	},
   8738 	{
   8739 		ARM_VRSRAsv1i64, ARM_INS_VRSRA,
   8740 #ifndef CAPSTONE_DIET
   8741 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8742 #endif
   8743 	},
   8744 	{
   8745 		ARM_VRSRAsv2i32, ARM_INS_VRSRA,
   8746 #ifndef CAPSTONE_DIET
   8747 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8748 #endif
   8749 	},
   8750 	{
   8751 		ARM_VRSRAsv2i64, ARM_INS_VRSRA,
   8752 #ifndef CAPSTONE_DIET
   8753 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8754 #endif
   8755 	},
   8756 	{
   8757 		ARM_VRSRAsv4i16, ARM_INS_VRSRA,
   8758 #ifndef CAPSTONE_DIET
   8759 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8760 #endif
   8761 	},
   8762 	{
   8763 		ARM_VRSRAsv4i32, ARM_INS_VRSRA,
   8764 #ifndef CAPSTONE_DIET
   8765 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8766 #endif
   8767 	},
   8768 	{
   8769 		ARM_VRSRAsv8i16, ARM_INS_VRSRA,
   8770 #ifndef CAPSTONE_DIET
   8771 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8772 #endif
   8773 	},
   8774 	{
   8775 		ARM_VRSRAsv8i8, ARM_INS_VRSRA,
   8776 #ifndef CAPSTONE_DIET
   8777 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8778 #endif
   8779 	},
   8780 	{
   8781 		ARM_VRSRAuv16i8, ARM_INS_VRSRA,
   8782 #ifndef CAPSTONE_DIET
   8783 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8784 #endif
   8785 	},
   8786 	{
   8787 		ARM_VRSRAuv1i64, ARM_INS_VRSRA,
   8788 #ifndef CAPSTONE_DIET
   8789 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8790 #endif
   8791 	},
   8792 	{
   8793 		ARM_VRSRAuv2i32, ARM_INS_VRSRA,
   8794 #ifndef CAPSTONE_DIET
   8795 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8796 #endif
   8797 	},
   8798 	{
   8799 		ARM_VRSRAuv2i64, ARM_INS_VRSRA,
   8800 #ifndef CAPSTONE_DIET
   8801 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8802 #endif
   8803 	},
   8804 	{
   8805 		ARM_VRSRAuv4i16, ARM_INS_VRSRA,
   8806 #ifndef CAPSTONE_DIET
   8807 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8808 #endif
   8809 	},
   8810 	{
   8811 		ARM_VRSRAuv4i32, ARM_INS_VRSRA,
   8812 #ifndef CAPSTONE_DIET
   8813 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8814 #endif
   8815 	},
   8816 	{
   8817 		ARM_VRSRAuv8i16, ARM_INS_VRSRA,
   8818 #ifndef CAPSTONE_DIET
   8819 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8820 #endif
   8821 	},
   8822 	{
   8823 		ARM_VRSRAuv8i8, ARM_INS_VRSRA,
   8824 #ifndef CAPSTONE_DIET
   8825 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8826 #endif
   8827 	},
   8828 	{
   8829 		ARM_VRSUBHNv2i32, ARM_INS_VRSUBHN,
   8830 #ifndef CAPSTONE_DIET
   8831 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8832 #endif
   8833 	},
   8834 	{
   8835 		ARM_VRSUBHNv4i16, ARM_INS_VRSUBHN,
   8836 #ifndef CAPSTONE_DIET
   8837 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8838 #endif
   8839 	},
   8840 	{
   8841 		ARM_VRSUBHNv8i8, ARM_INS_VRSUBHN,
   8842 #ifndef CAPSTONE_DIET
   8843 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8844 #endif
   8845 	},
   8846 	{
   8847 		ARM_VSELEQD, ARM_INS_VSELEQ,
   8848 #ifndef CAPSTONE_DIET
   8849 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8850 #endif
   8851 	},
   8852 	{
   8853 		ARM_VSELEQS, ARM_INS_VSELEQ,
   8854 #ifndef CAPSTONE_DIET
   8855 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8856 #endif
   8857 	},
   8858 	{
   8859 		ARM_VSELGED, ARM_INS_VSELGE,
   8860 #ifndef CAPSTONE_DIET
   8861 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8862 #endif
   8863 	},
   8864 	{
   8865 		ARM_VSELGES, ARM_INS_VSELGE,
   8866 #ifndef CAPSTONE_DIET
   8867 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8868 #endif
   8869 	},
   8870 	{
   8871 		ARM_VSELGTD, ARM_INS_VSELGT,
   8872 #ifndef CAPSTONE_DIET
   8873 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8874 #endif
   8875 	},
   8876 	{
   8877 		ARM_VSELGTS, ARM_INS_VSELGT,
   8878 #ifndef CAPSTONE_DIET
   8879 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8880 #endif
   8881 	},
   8882 	{
   8883 		ARM_VSELVSD, ARM_INS_VSELVS,
   8884 #ifndef CAPSTONE_DIET
   8885 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, ARM_GRP_DPVFP, 0 }, 0, 0
   8886 #endif
   8887 	},
   8888 	{
   8889 		ARM_VSELVSS, ARM_INS_VSELVS,
   8890 #ifndef CAPSTONE_DIET
   8891 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_FPARMV8, 0 }, 0, 0
   8892 #endif
   8893 	},
   8894 	{
   8895 		ARM_VSETLNi16, ARM_INS_VMOV,
   8896 #ifndef CAPSTONE_DIET
   8897 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8898 #endif
   8899 	},
   8900 	{
   8901 		ARM_VSETLNi32, ARM_INS_VMOV,
   8902 #ifndef CAPSTONE_DIET
   8903 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8904 #endif
   8905 	},
   8906 	{
   8907 		ARM_VSETLNi8, ARM_INS_VMOV,
   8908 #ifndef CAPSTONE_DIET
   8909 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8910 #endif
   8911 	},
   8912 	{
   8913 		ARM_VSHLLi16, ARM_INS_VSHLL,
   8914 #ifndef CAPSTONE_DIET
   8915 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8916 #endif
   8917 	},
   8918 	{
   8919 		ARM_VSHLLi32, ARM_INS_VSHLL,
   8920 #ifndef CAPSTONE_DIET
   8921 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8922 #endif
   8923 	},
   8924 	{
   8925 		ARM_VSHLLi8, ARM_INS_VSHLL,
   8926 #ifndef CAPSTONE_DIET
   8927 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8928 #endif
   8929 	},
   8930 	{
   8931 		ARM_VSHLLsv2i64, ARM_INS_VSHLL,
   8932 #ifndef CAPSTONE_DIET
   8933 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8934 #endif
   8935 	},
   8936 	{
   8937 		ARM_VSHLLsv4i32, ARM_INS_VSHLL,
   8938 #ifndef CAPSTONE_DIET
   8939 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8940 #endif
   8941 	},
   8942 	{
   8943 		ARM_VSHLLsv8i16, ARM_INS_VSHLL,
   8944 #ifndef CAPSTONE_DIET
   8945 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8946 #endif
   8947 	},
   8948 	{
   8949 		ARM_VSHLLuv2i64, ARM_INS_VSHLL,
   8950 #ifndef CAPSTONE_DIET
   8951 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8952 #endif
   8953 	},
   8954 	{
   8955 		ARM_VSHLLuv4i32, ARM_INS_VSHLL,
   8956 #ifndef CAPSTONE_DIET
   8957 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8958 #endif
   8959 	},
   8960 	{
   8961 		ARM_VSHLLuv8i16, ARM_INS_VSHLL,
   8962 #ifndef CAPSTONE_DIET
   8963 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8964 #endif
   8965 	},
   8966 	{
   8967 		ARM_VSHLiv16i8, ARM_INS_VSHL,
   8968 #ifndef CAPSTONE_DIET
   8969 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8970 #endif
   8971 	},
   8972 	{
   8973 		ARM_VSHLiv1i64, ARM_INS_VSHL,
   8974 #ifndef CAPSTONE_DIET
   8975 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8976 #endif
   8977 	},
   8978 	{
   8979 		ARM_VSHLiv2i32, ARM_INS_VSHL,
   8980 #ifndef CAPSTONE_DIET
   8981 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8982 #endif
   8983 	},
   8984 	{
   8985 		ARM_VSHLiv2i64, ARM_INS_VSHL,
   8986 #ifndef CAPSTONE_DIET
   8987 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8988 #endif
   8989 	},
   8990 	{
   8991 		ARM_VSHLiv4i16, ARM_INS_VSHL,
   8992 #ifndef CAPSTONE_DIET
   8993 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   8994 #endif
   8995 	},
   8996 	{
   8997 		ARM_VSHLiv4i32, ARM_INS_VSHL,
   8998 #ifndef CAPSTONE_DIET
   8999 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9000 #endif
   9001 	},
   9002 	{
   9003 		ARM_VSHLiv8i16, ARM_INS_VSHL,
   9004 #ifndef CAPSTONE_DIET
   9005 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9006 #endif
   9007 	},
   9008 	{
   9009 		ARM_VSHLiv8i8, ARM_INS_VSHL,
   9010 #ifndef CAPSTONE_DIET
   9011 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9012 #endif
   9013 	},
   9014 	{
   9015 		ARM_VSHLsv16i8, ARM_INS_VSHL,
   9016 #ifndef CAPSTONE_DIET
   9017 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9018 #endif
   9019 	},
   9020 	{
   9021 		ARM_VSHLsv1i64, ARM_INS_VSHL,
   9022 #ifndef CAPSTONE_DIET
   9023 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9024 #endif
   9025 	},
   9026 	{
   9027 		ARM_VSHLsv2i32, ARM_INS_VSHL,
   9028 #ifndef CAPSTONE_DIET
   9029 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9030 #endif
   9031 	},
   9032 	{
   9033 		ARM_VSHLsv2i64, ARM_INS_VSHL,
   9034 #ifndef CAPSTONE_DIET
   9035 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9036 #endif
   9037 	},
   9038 	{
   9039 		ARM_VSHLsv4i16, ARM_INS_VSHL,
   9040 #ifndef CAPSTONE_DIET
   9041 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9042 #endif
   9043 	},
   9044 	{
   9045 		ARM_VSHLsv4i32, ARM_INS_VSHL,
   9046 #ifndef CAPSTONE_DIET
   9047 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9048 #endif
   9049 	},
   9050 	{
   9051 		ARM_VSHLsv8i16, ARM_INS_VSHL,
   9052 #ifndef CAPSTONE_DIET
   9053 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9054 #endif
   9055 	},
   9056 	{
   9057 		ARM_VSHLsv8i8, ARM_INS_VSHL,
   9058 #ifndef CAPSTONE_DIET
   9059 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9060 #endif
   9061 	},
   9062 	{
   9063 		ARM_VSHLuv16i8, ARM_INS_VSHL,
   9064 #ifndef CAPSTONE_DIET
   9065 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9066 #endif
   9067 	},
   9068 	{
   9069 		ARM_VSHLuv1i64, ARM_INS_VSHL,
   9070 #ifndef CAPSTONE_DIET
   9071 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9072 #endif
   9073 	},
   9074 	{
   9075 		ARM_VSHLuv2i32, ARM_INS_VSHL,
   9076 #ifndef CAPSTONE_DIET
   9077 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9078 #endif
   9079 	},
   9080 	{
   9081 		ARM_VSHLuv2i64, ARM_INS_VSHL,
   9082 #ifndef CAPSTONE_DIET
   9083 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9084 #endif
   9085 	},
   9086 	{
   9087 		ARM_VSHLuv4i16, ARM_INS_VSHL,
   9088 #ifndef CAPSTONE_DIET
   9089 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9090 #endif
   9091 	},
   9092 	{
   9093 		ARM_VSHLuv4i32, ARM_INS_VSHL,
   9094 #ifndef CAPSTONE_DIET
   9095 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9096 #endif
   9097 	},
   9098 	{
   9099 		ARM_VSHLuv8i16, ARM_INS_VSHL,
   9100 #ifndef CAPSTONE_DIET
   9101 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9102 #endif
   9103 	},
   9104 	{
   9105 		ARM_VSHLuv8i8, ARM_INS_VSHL,
   9106 #ifndef CAPSTONE_DIET
   9107 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9108 #endif
   9109 	},
   9110 	{
   9111 		ARM_VSHRNv2i32, ARM_INS_VSHRN,
   9112 #ifndef CAPSTONE_DIET
   9113 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9114 #endif
   9115 	},
   9116 	{
   9117 		ARM_VSHRNv4i16, ARM_INS_VSHRN,
   9118 #ifndef CAPSTONE_DIET
   9119 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9120 #endif
   9121 	},
   9122 	{
   9123 		ARM_VSHRNv8i8, ARM_INS_VSHRN,
   9124 #ifndef CAPSTONE_DIET
   9125 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9126 #endif
   9127 	},
   9128 	{
   9129 		ARM_VSHRsv16i8, ARM_INS_VSHR,
   9130 #ifndef CAPSTONE_DIET
   9131 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9132 #endif
   9133 	},
   9134 	{
   9135 		ARM_VSHRsv1i64, ARM_INS_VSHR,
   9136 #ifndef CAPSTONE_DIET
   9137 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9138 #endif
   9139 	},
   9140 	{
   9141 		ARM_VSHRsv2i32, ARM_INS_VSHR,
   9142 #ifndef CAPSTONE_DIET
   9143 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9144 #endif
   9145 	},
   9146 	{
   9147 		ARM_VSHRsv2i64, ARM_INS_VSHR,
   9148 #ifndef CAPSTONE_DIET
   9149 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9150 #endif
   9151 	},
   9152 	{
   9153 		ARM_VSHRsv4i16, ARM_INS_VSHR,
   9154 #ifndef CAPSTONE_DIET
   9155 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9156 #endif
   9157 	},
   9158 	{
   9159 		ARM_VSHRsv4i32, ARM_INS_VSHR,
   9160 #ifndef CAPSTONE_DIET
   9161 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9162 #endif
   9163 	},
   9164 	{
   9165 		ARM_VSHRsv8i16, ARM_INS_VSHR,
   9166 #ifndef CAPSTONE_DIET
   9167 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9168 #endif
   9169 	},
   9170 	{
   9171 		ARM_VSHRsv8i8, ARM_INS_VSHR,
   9172 #ifndef CAPSTONE_DIET
   9173 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9174 #endif
   9175 	},
   9176 	{
   9177 		ARM_VSHRuv16i8, ARM_INS_VSHR,
   9178 #ifndef CAPSTONE_DIET
   9179 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9180 #endif
   9181 	},
   9182 	{
   9183 		ARM_VSHRuv1i64, ARM_INS_VSHR,
   9184 #ifndef CAPSTONE_DIET
   9185 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9186 #endif
   9187 	},
   9188 	{
   9189 		ARM_VSHRuv2i32, ARM_INS_VSHR,
   9190 #ifndef CAPSTONE_DIET
   9191 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9192 #endif
   9193 	},
   9194 	{
   9195 		ARM_VSHRuv2i64, ARM_INS_VSHR,
   9196 #ifndef CAPSTONE_DIET
   9197 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9198 #endif
   9199 	},
   9200 	{
   9201 		ARM_VSHRuv4i16, ARM_INS_VSHR,
   9202 #ifndef CAPSTONE_DIET
   9203 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9204 #endif
   9205 	},
   9206 	{
   9207 		ARM_VSHRuv4i32, ARM_INS_VSHR,
   9208 #ifndef CAPSTONE_DIET
   9209 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9210 #endif
   9211 	},
   9212 	{
   9213 		ARM_VSHRuv8i16, ARM_INS_VSHR,
   9214 #ifndef CAPSTONE_DIET
   9215 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9216 #endif
   9217 	},
   9218 	{
   9219 		ARM_VSHRuv8i8, ARM_INS_VSHR,
   9220 #ifndef CAPSTONE_DIET
   9221 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9222 #endif
   9223 	},
   9224 	{
   9225 		ARM_VSHTOD, ARM_INS_VCVT,
   9226 #ifndef CAPSTONE_DIET
   9227 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   9228 #endif
   9229 	},
   9230 	{
   9231 		ARM_VSHTOS, ARM_INS_VCVT,
   9232 #ifndef CAPSTONE_DIET
   9233 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   9234 #endif
   9235 	},
   9236 	{
   9237 		ARM_VSITOD, ARM_INS_VCVT,
   9238 #ifndef CAPSTONE_DIET
   9239 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   9240 #endif
   9241 	},
   9242 	{
   9243 		ARM_VSITOS, ARM_INS_VCVT,
   9244 #ifndef CAPSTONE_DIET
   9245 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   9246 #endif
   9247 	},
   9248 	{
   9249 		ARM_VSLIv16i8, ARM_INS_VSLI,
   9250 #ifndef CAPSTONE_DIET
   9251 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9252 #endif
   9253 	},
   9254 	{
   9255 		ARM_VSLIv1i64, ARM_INS_VSLI,
   9256 #ifndef CAPSTONE_DIET
   9257 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9258 #endif
   9259 	},
   9260 	{
   9261 		ARM_VSLIv2i32, ARM_INS_VSLI,
   9262 #ifndef CAPSTONE_DIET
   9263 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9264 #endif
   9265 	},
   9266 	{
   9267 		ARM_VSLIv2i64, ARM_INS_VSLI,
   9268 #ifndef CAPSTONE_DIET
   9269 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9270 #endif
   9271 	},
   9272 	{
   9273 		ARM_VSLIv4i16, ARM_INS_VSLI,
   9274 #ifndef CAPSTONE_DIET
   9275 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9276 #endif
   9277 	},
   9278 	{
   9279 		ARM_VSLIv4i32, ARM_INS_VSLI,
   9280 #ifndef CAPSTONE_DIET
   9281 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9282 #endif
   9283 	},
   9284 	{
   9285 		ARM_VSLIv8i16, ARM_INS_VSLI,
   9286 #ifndef CAPSTONE_DIET
   9287 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9288 #endif
   9289 	},
   9290 	{
   9291 		ARM_VSLIv8i8, ARM_INS_VSLI,
   9292 #ifndef CAPSTONE_DIET
   9293 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9294 #endif
   9295 	},
   9296 	{
   9297 		ARM_VSLTOD, ARM_INS_VCVT,
   9298 #ifndef CAPSTONE_DIET
   9299 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   9300 #endif
   9301 	},
   9302 	{
   9303 		ARM_VSLTOS, ARM_INS_VCVT,
   9304 #ifndef CAPSTONE_DIET
   9305 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   9306 #endif
   9307 	},
   9308 	{
   9309 		ARM_VSQRTD, ARM_INS_VSQRT,
   9310 #ifndef CAPSTONE_DIET
   9311 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   9312 #endif
   9313 	},
   9314 	{
   9315 		ARM_VSQRTS, ARM_INS_VSQRT,
   9316 #ifndef CAPSTONE_DIET
   9317 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   9318 #endif
   9319 	},
   9320 	{
   9321 		ARM_VSRAsv16i8, ARM_INS_VSRA,
   9322 #ifndef CAPSTONE_DIET
   9323 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9324 #endif
   9325 	},
   9326 	{
   9327 		ARM_VSRAsv1i64, ARM_INS_VSRA,
   9328 #ifndef CAPSTONE_DIET
   9329 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9330 #endif
   9331 	},
   9332 	{
   9333 		ARM_VSRAsv2i32, ARM_INS_VSRA,
   9334 #ifndef CAPSTONE_DIET
   9335 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9336 #endif
   9337 	},
   9338 	{
   9339 		ARM_VSRAsv2i64, ARM_INS_VSRA,
   9340 #ifndef CAPSTONE_DIET
   9341 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9342 #endif
   9343 	},
   9344 	{
   9345 		ARM_VSRAsv4i16, ARM_INS_VSRA,
   9346 #ifndef CAPSTONE_DIET
   9347 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9348 #endif
   9349 	},
   9350 	{
   9351 		ARM_VSRAsv4i32, ARM_INS_VSRA,
   9352 #ifndef CAPSTONE_DIET
   9353 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9354 #endif
   9355 	},
   9356 	{
   9357 		ARM_VSRAsv8i16, ARM_INS_VSRA,
   9358 #ifndef CAPSTONE_DIET
   9359 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9360 #endif
   9361 	},
   9362 	{
   9363 		ARM_VSRAsv8i8, ARM_INS_VSRA,
   9364 #ifndef CAPSTONE_DIET
   9365 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9366 #endif
   9367 	},
   9368 	{
   9369 		ARM_VSRAuv16i8, ARM_INS_VSRA,
   9370 #ifndef CAPSTONE_DIET
   9371 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9372 #endif
   9373 	},
   9374 	{
   9375 		ARM_VSRAuv1i64, ARM_INS_VSRA,
   9376 #ifndef CAPSTONE_DIET
   9377 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9378 #endif
   9379 	},
   9380 	{
   9381 		ARM_VSRAuv2i32, ARM_INS_VSRA,
   9382 #ifndef CAPSTONE_DIET
   9383 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9384 #endif
   9385 	},
   9386 	{
   9387 		ARM_VSRAuv2i64, ARM_INS_VSRA,
   9388 #ifndef CAPSTONE_DIET
   9389 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9390 #endif
   9391 	},
   9392 	{
   9393 		ARM_VSRAuv4i16, ARM_INS_VSRA,
   9394 #ifndef CAPSTONE_DIET
   9395 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9396 #endif
   9397 	},
   9398 	{
   9399 		ARM_VSRAuv4i32, ARM_INS_VSRA,
   9400 #ifndef CAPSTONE_DIET
   9401 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9402 #endif
   9403 	},
   9404 	{
   9405 		ARM_VSRAuv8i16, ARM_INS_VSRA,
   9406 #ifndef CAPSTONE_DIET
   9407 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9408 #endif
   9409 	},
   9410 	{
   9411 		ARM_VSRAuv8i8, ARM_INS_VSRA,
   9412 #ifndef CAPSTONE_DIET
   9413 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9414 #endif
   9415 	},
   9416 	{
   9417 		ARM_VSRIv16i8, ARM_INS_VSRI,
   9418 #ifndef CAPSTONE_DIET
   9419 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9420 #endif
   9421 	},
   9422 	{
   9423 		ARM_VSRIv1i64, ARM_INS_VSRI,
   9424 #ifndef CAPSTONE_DIET
   9425 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9426 #endif
   9427 	},
   9428 	{
   9429 		ARM_VSRIv2i32, ARM_INS_VSRI,
   9430 #ifndef CAPSTONE_DIET
   9431 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9432 #endif
   9433 	},
   9434 	{
   9435 		ARM_VSRIv2i64, ARM_INS_VSRI,
   9436 #ifndef CAPSTONE_DIET
   9437 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9438 #endif
   9439 	},
   9440 	{
   9441 		ARM_VSRIv4i16, ARM_INS_VSRI,
   9442 #ifndef CAPSTONE_DIET
   9443 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9444 #endif
   9445 	},
   9446 	{
   9447 		ARM_VSRIv4i32, ARM_INS_VSRI,
   9448 #ifndef CAPSTONE_DIET
   9449 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9450 #endif
   9451 	},
   9452 	{
   9453 		ARM_VSRIv8i16, ARM_INS_VSRI,
   9454 #ifndef CAPSTONE_DIET
   9455 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9456 #endif
   9457 	},
   9458 	{
   9459 		ARM_VSRIv8i8, ARM_INS_VSRI,
   9460 #ifndef CAPSTONE_DIET
   9461 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9462 #endif
   9463 	},
   9464 	{
   9465 		ARM_VST1LNd16, ARM_INS_VST1,
   9466 #ifndef CAPSTONE_DIET
   9467 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9468 #endif
   9469 	},
   9470 	{
   9471 		ARM_VST1LNd16_UPD, ARM_INS_VST1,
   9472 #ifndef CAPSTONE_DIET
   9473 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9474 #endif
   9475 	},
   9476 	{
   9477 		ARM_VST1LNd32, ARM_INS_VST1,
   9478 #ifndef CAPSTONE_DIET
   9479 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9480 #endif
   9481 	},
   9482 	{
   9483 		ARM_VST1LNd32_UPD, ARM_INS_VST1,
   9484 #ifndef CAPSTONE_DIET
   9485 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9486 #endif
   9487 	},
   9488 	{
   9489 		ARM_VST1LNd8, ARM_INS_VST1,
   9490 #ifndef CAPSTONE_DIET
   9491 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9492 #endif
   9493 	},
   9494 	{
   9495 		ARM_VST1LNd8_UPD, ARM_INS_VST1,
   9496 #ifndef CAPSTONE_DIET
   9497 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9498 #endif
   9499 	},
   9500 	{
   9501 		ARM_VST1d16, ARM_INS_VST1,
   9502 #ifndef CAPSTONE_DIET
   9503 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9504 #endif
   9505 	},
   9506 	{
   9507 		ARM_VST1d16Q, ARM_INS_VST1,
   9508 #ifndef CAPSTONE_DIET
   9509 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9510 #endif
   9511 	},
   9512 	{
   9513 		ARM_VST1d16Qwb_fixed, ARM_INS_VST1,
   9514 #ifndef CAPSTONE_DIET
   9515 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9516 #endif
   9517 	},
   9518 	{
   9519 		ARM_VST1d16Qwb_register, ARM_INS_VST1,
   9520 #ifndef CAPSTONE_DIET
   9521 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9522 #endif
   9523 	},
   9524 	{
   9525 		ARM_VST1d16T, ARM_INS_VST1,
   9526 #ifndef CAPSTONE_DIET
   9527 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9528 #endif
   9529 	},
   9530 	{
   9531 		ARM_VST1d16Twb_fixed, ARM_INS_VST1,
   9532 #ifndef CAPSTONE_DIET
   9533 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9534 #endif
   9535 	},
   9536 	{
   9537 		ARM_VST1d16Twb_register, ARM_INS_VST1,
   9538 #ifndef CAPSTONE_DIET
   9539 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9540 #endif
   9541 	},
   9542 	{
   9543 		ARM_VST1d16wb_fixed, ARM_INS_VST1,
   9544 #ifndef CAPSTONE_DIET
   9545 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9546 #endif
   9547 	},
   9548 	{
   9549 		ARM_VST1d16wb_register, ARM_INS_VST1,
   9550 #ifndef CAPSTONE_DIET
   9551 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9552 #endif
   9553 	},
   9554 	{
   9555 		ARM_VST1d32, ARM_INS_VST1,
   9556 #ifndef CAPSTONE_DIET
   9557 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9558 #endif
   9559 	},
   9560 	{
   9561 		ARM_VST1d32Q, ARM_INS_VST1,
   9562 #ifndef CAPSTONE_DIET
   9563 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9564 #endif
   9565 	},
   9566 	{
   9567 		ARM_VST1d32Qwb_fixed, ARM_INS_VST1,
   9568 #ifndef CAPSTONE_DIET
   9569 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9570 #endif
   9571 	},
   9572 	{
   9573 		ARM_VST1d32Qwb_register, ARM_INS_VST1,
   9574 #ifndef CAPSTONE_DIET
   9575 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9576 #endif
   9577 	},
   9578 	{
   9579 		ARM_VST1d32T, ARM_INS_VST1,
   9580 #ifndef CAPSTONE_DIET
   9581 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9582 #endif
   9583 	},
   9584 	{
   9585 		ARM_VST1d32Twb_fixed, ARM_INS_VST1,
   9586 #ifndef CAPSTONE_DIET
   9587 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9588 #endif
   9589 	},
   9590 	{
   9591 		ARM_VST1d32Twb_register, ARM_INS_VST1,
   9592 #ifndef CAPSTONE_DIET
   9593 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9594 #endif
   9595 	},
   9596 	{
   9597 		ARM_VST1d32wb_fixed, ARM_INS_VST1,
   9598 #ifndef CAPSTONE_DIET
   9599 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9600 #endif
   9601 	},
   9602 	{
   9603 		ARM_VST1d32wb_register, ARM_INS_VST1,
   9604 #ifndef CAPSTONE_DIET
   9605 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9606 #endif
   9607 	},
   9608 	{
   9609 		ARM_VST1d64, ARM_INS_VST1,
   9610 #ifndef CAPSTONE_DIET
   9611 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9612 #endif
   9613 	},
   9614 	{
   9615 		ARM_VST1d64Q, ARM_INS_VST1,
   9616 #ifndef CAPSTONE_DIET
   9617 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9618 #endif
   9619 	},
   9620 	{
   9621 		ARM_VST1d64Qwb_fixed, ARM_INS_VST1,
   9622 #ifndef CAPSTONE_DIET
   9623 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9624 #endif
   9625 	},
   9626 	{
   9627 		ARM_VST1d64Qwb_register, ARM_INS_VST1,
   9628 #ifndef CAPSTONE_DIET
   9629 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9630 #endif
   9631 	},
   9632 	{
   9633 		ARM_VST1d64T, ARM_INS_VST1,
   9634 #ifndef CAPSTONE_DIET
   9635 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9636 #endif
   9637 	},
   9638 	{
   9639 		ARM_VST1d64Twb_fixed, ARM_INS_VST1,
   9640 #ifndef CAPSTONE_DIET
   9641 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9642 #endif
   9643 	},
   9644 	{
   9645 		ARM_VST1d64Twb_register, ARM_INS_VST1,
   9646 #ifndef CAPSTONE_DIET
   9647 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9648 #endif
   9649 	},
   9650 	{
   9651 		ARM_VST1d64wb_fixed, ARM_INS_VST1,
   9652 #ifndef CAPSTONE_DIET
   9653 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9654 #endif
   9655 	},
   9656 	{
   9657 		ARM_VST1d64wb_register, ARM_INS_VST1,
   9658 #ifndef CAPSTONE_DIET
   9659 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9660 #endif
   9661 	},
   9662 	{
   9663 		ARM_VST1d8, ARM_INS_VST1,
   9664 #ifndef CAPSTONE_DIET
   9665 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9666 #endif
   9667 	},
   9668 	{
   9669 		ARM_VST1d8Q, ARM_INS_VST1,
   9670 #ifndef CAPSTONE_DIET
   9671 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9672 #endif
   9673 	},
   9674 	{
   9675 		ARM_VST1d8Qwb_fixed, ARM_INS_VST1,
   9676 #ifndef CAPSTONE_DIET
   9677 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9678 #endif
   9679 	},
   9680 	{
   9681 		ARM_VST1d8Qwb_register, ARM_INS_VST1,
   9682 #ifndef CAPSTONE_DIET
   9683 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9684 #endif
   9685 	},
   9686 	{
   9687 		ARM_VST1d8T, ARM_INS_VST1,
   9688 #ifndef CAPSTONE_DIET
   9689 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9690 #endif
   9691 	},
   9692 	{
   9693 		ARM_VST1d8Twb_fixed, ARM_INS_VST1,
   9694 #ifndef CAPSTONE_DIET
   9695 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9696 #endif
   9697 	},
   9698 	{
   9699 		ARM_VST1d8Twb_register, ARM_INS_VST1,
   9700 #ifndef CAPSTONE_DIET
   9701 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9702 #endif
   9703 	},
   9704 	{
   9705 		ARM_VST1d8wb_fixed, ARM_INS_VST1,
   9706 #ifndef CAPSTONE_DIET
   9707 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9708 #endif
   9709 	},
   9710 	{
   9711 		ARM_VST1d8wb_register, ARM_INS_VST1,
   9712 #ifndef CAPSTONE_DIET
   9713 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9714 #endif
   9715 	},
   9716 	{
   9717 		ARM_VST1q16, ARM_INS_VST1,
   9718 #ifndef CAPSTONE_DIET
   9719 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9720 #endif
   9721 	},
   9722 	{
   9723 		ARM_VST1q16wb_fixed, ARM_INS_VST1,
   9724 #ifndef CAPSTONE_DIET
   9725 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9726 #endif
   9727 	},
   9728 	{
   9729 		ARM_VST1q16wb_register, ARM_INS_VST1,
   9730 #ifndef CAPSTONE_DIET
   9731 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9732 #endif
   9733 	},
   9734 	{
   9735 		ARM_VST1q32, ARM_INS_VST1,
   9736 #ifndef CAPSTONE_DIET
   9737 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9738 #endif
   9739 	},
   9740 	{
   9741 		ARM_VST1q32wb_fixed, ARM_INS_VST1,
   9742 #ifndef CAPSTONE_DIET
   9743 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9744 #endif
   9745 	},
   9746 	{
   9747 		ARM_VST1q32wb_register, ARM_INS_VST1,
   9748 #ifndef CAPSTONE_DIET
   9749 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9750 #endif
   9751 	},
   9752 	{
   9753 		ARM_VST1q64, ARM_INS_VST1,
   9754 #ifndef CAPSTONE_DIET
   9755 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9756 #endif
   9757 	},
   9758 	{
   9759 		ARM_VST1q64wb_fixed, ARM_INS_VST1,
   9760 #ifndef CAPSTONE_DIET
   9761 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9762 #endif
   9763 	},
   9764 	{
   9765 		ARM_VST1q64wb_register, ARM_INS_VST1,
   9766 #ifndef CAPSTONE_DIET
   9767 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9768 #endif
   9769 	},
   9770 	{
   9771 		ARM_VST1q8, ARM_INS_VST1,
   9772 #ifndef CAPSTONE_DIET
   9773 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9774 #endif
   9775 	},
   9776 	{
   9777 		ARM_VST1q8wb_fixed, ARM_INS_VST1,
   9778 #ifndef CAPSTONE_DIET
   9779 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9780 #endif
   9781 	},
   9782 	{
   9783 		ARM_VST1q8wb_register, ARM_INS_VST1,
   9784 #ifndef CAPSTONE_DIET
   9785 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9786 #endif
   9787 	},
   9788 	{
   9789 		ARM_VST2LNd16, ARM_INS_VST2,
   9790 #ifndef CAPSTONE_DIET
   9791 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9792 #endif
   9793 	},
   9794 	{
   9795 		ARM_VST2LNd16_UPD, ARM_INS_VST2,
   9796 #ifndef CAPSTONE_DIET
   9797 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9798 #endif
   9799 	},
   9800 	{
   9801 		ARM_VST2LNd32, ARM_INS_VST2,
   9802 #ifndef CAPSTONE_DIET
   9803 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9804 #endif
   9805 	},
   9806 	{
   9807 		ARM_VST2LNd32_UPD, ARM_INS_VST2,
   9808 #ifndef CAPSTONE_DIET
   9809 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9810 #endif
   9811 	},
   9812 	{
   9813 		ARM_VST2LNd8, ARM_INS_VST2,
   9814 #ifndef CAPSTONE_DIET
   9815 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9816 #endif
   9817 	},
   9818 	{
   9819 		ARM_VST2LNd8_UPD, ARM_INS_VST2,
   9820 #ifndef CAPSTONE_DIET
   9821 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9822 #endif
   9823 	},
   9824 	{
   9825 		ARM_VST2LNq16, ARM_INS_VST2,
   9826 #ifndef CAPSTONE_DIET
   9827 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9828 #endif
   9829 	},
   9830 	{
   9831 		ARM_VST2LNq16_UPD, ARM_INS_VST2,
   9832 #ifndef CAPSTONE_DIET
   9833 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9834 #endif
   9835 	},
   9836 	{
   9837 		ARM_VST2LNq32, ARM_INS_VST2,
   9838 #ifndef CAPSTONE_DIET
   9839 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9840 #endif
   9841 	},
   9842 	{
   9843 		ARM_VST2LNq32_UPD, ARM_INS_VST2,
   9844 #ifndef CAPSTONE_DIET
   9845 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9846 #endif
   9847 	},
   9848 	{
   9849 		ARM_VST2b16, ARM_INS_VST2,
   9850 #ifndef CAPSTONE_DIET
   9851 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9852 #endif
   9853 	},
   9854 	{
   9855 		ARM_VST2b16wb_fixed, ARM_INS_VST2,
   9856 #ifndef CAPSTONE_DIET
   9857 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9858 #endif
   9859 	},
   9860 	{
   9861 		ARM_VST2b16wb_register, ARM_INS_VST2,
   9862 #ifndef CAPSTONE_DIET
   9863 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9864 #endif
   9865 	},
   9866 	{
   9867 		ARM_VST2b32, ARM_INS_VST2,
   9868 #ifndef CAPSTONE_DIET
   9869 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9870 #endif
   9871 	},
   9872 	{
   9873 		ARM_VST2b32wb_fixed, ARM_INS_VST2,
   9874 #ifndef CAPSTONE_DIET
   9875 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9876 #endif
   9877 	},
   9878 	{
   9879 		ARM_VST2b32wb_register, ARM_INS_VST2,
   9880 #ifndef CAPSTONE_DIET
   9881 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9882 #endif
   9883 	},
   9884 	{
   9885 		ARM_VST2b8, ARM_INS_VST2,
   9886 #ifndef CAPSTONE_DIET
   9887 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9888 #endif
   9889 	},
   9890 	{
   9891 		ARM_VST2b8wb_fixed, ARM_INS_VST2,
   9892 #ifndef CAPSTONE_DIET
   9893 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9894 #endif
   9895 	},
   9896 	{
   9897 		ARM_VST2b8wb_register, ARM_INS_VST2,
   9898 #ifndef CAPSTONE_DIET
   9899 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9900 #endif
   9901 	},
   9902 	{
   9903 		ARM_VST2d16, ARM_INS_VST2,
   9904 #ifndef CAPSTONE_DIET
   9905 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9906 #endif
   9907 	},
   9908 	{
   9909 		ARM_VST2d16wb_fixed, ARM_INS_VST2,
   9910 #ifndef CAPSTONE_DIET
   9911 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9912 #endif
   9913 	},
   9914 	{
   9915 		ARM_VST2d16wb_register, ARM_INS_VST2,
   9916 #ifndef CAPSTONE_DIET
   9917 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9918 #endif
   9919 	},
   9920 	{
   9921 		ARM_VST2d32, ARM_INS_VST2,
   9922 #ifndef CAPSTONE_DIET
   9923 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9924 #endif
   9925 	},
   9926 	{
   9927 		ARM_VST2d32wb_fixed, ARM_INS_VST2,
   9928 #ifndef CAPSTONE_DIET
   9929 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9930 #endif
   9931 	},
   9932 	{
   9933 		ARM_VST2d32wb_register, ARM_INS_VST2,
   9934 #ifndef CAPSTONE_DIET
   9935 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9936 #endif
   9937 	},
   9938 	{
   9939 		ARM_VST2d8, ARM_INS_VST2,
   9940 #ifndef CAPSTONE_DIET
   9941 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9942 #endif
   9943 	},
   9944 	{
   9945 		ARM_VST2d8wb_fixed, ARM_INS_VST2,
   9946 #ifndef CAPSTONE_DIET
   9947 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9948 #endif
   9949 	},
   9950 	{
   9951 		ARM_VST2d8wb_register, ARM_INS_VST2,
   9952 #ifndef CAPSTONE_DIET
   9953 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9954 #endif
   9955 	},
   9956 	{
   9957 		ARM_VST2q16, ARM_INS_VST2,
   9958 #ifndef CAPSTONE_DIET
   9959 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9960 #endif
   9961 	},
   9962 	{
   9963 		ARM_VST2q16wb_fixed, ARM_INS_VST2,
   9964 #ifndef CAPSTONE_DIET
   9965 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9966 #endif
   9967 	},
   9968 	{
   9969 		ARM_VST2q16wb_register, ARM_INS_VST2,
   9970 #ifndef CAPSTONE_DIET
   9971 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9972 #endif
   9973 	},
   9974 	{
   9975 		ARM_VST2q32, ARM_INS_VST2,
   9976 #ifndef CAPSTONE_DIET
   9977 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9978 #endif
   9979 	},
   9980 	{
   9981 		ARM_VST2q32wb_fixed, ARM_INS_VST2,
   9982 #ifndef CAPSTONE_DIET
   9983 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9984 #endif
   9985 	},
   9986 	{
   9987 		ARM_VST2q32wb_register, ARM_INS_VST2,
   9988 #ifndef CAPSTONE_DIET
   9989 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9990 #endif
   9991 	},
   9992 	{
   9993 		ARM_VST2q8, ARM_INS_VST2,
   9994 #ifndef CAPSTONE_DIET
   9995 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   9996 #endif
   9997 	},
   9998 	{
   9999 		ARM_VST2q8wb_fixed, ARM_INS_VST2,
   10000 #ifndef CAPSTONE_DIET
   10001 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10002 #endif
   10003 	},
   10004 	{
   10005 		ARM_VST2q8wb_register, ARM_INS_VST2,
   10006 #ifndef CAPSTONE_DIET
   10007 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10008 #endif
   10009 	},
   10010 	{
   10011 		ARM_VST3LNd16, ARM_INS_VST3,
   10012 #ifndef CAPSTONE_DIET
   10013 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10014 #endif
   10015 	},
   10016 	{
   10017 		ARM_VST3LNd16_UPD, ARM_INS_VST3,
   10018 #ifndef CAPSTONE_DIET
   10019 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10020 #endif
   10021 	},
   10022 	{
   10023 		ARM_VST3LNd32, ARM_INS_VST3,
   10024 #ifndef CAPSTONE_DIET
   10025 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10026 #endif
   10027 	},
   10028 	{
   10029 		ARM_VST3LNd32_UPD, ARM_INS_VST3,
   10030 #ifndef CAPSTONE_DIET
   10031 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10032 #endif
   10033 	},
   10034 	{
   10035 		ARM_VST3LNd8, ARM_INS_VST3,
   10036 #ifndef CAPSTONE_DIET
   10037 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10038 #endif
   10039 	},
   10040 	{
   10041 		ARM_VST3LNd8_UPD, ARM_INS_VST3,
   10042 #ifndef CAPSTONE_DIET
   10043 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10044 #endif
   10045 	},
   10046 	{
   10047 		ARM_VST3LNq16, ARM_INS_VST3,
   10048 #ifndef CAPSTONE_DIET
   10049 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10050 #endif
   10051 	},
   10052 	{
   10053 		ARM_VST3LNq16_UPD, ARM_INS_VST3,
   10054 #ifndef CAPSTONE_DIET
   10055 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10056 #endif
   10057 	},
   10058 	{
   10059 		ARM_VST3LNq32, ARM_INS_VST3,
   10060 #ifndef CAPSTONE_DIET
   10061 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10062 #endif
   10063 	},
   10064 	{
   10065 		ARM_VST3LNq32_UPD, ARM_INS_VST3,
   10066 #ifndef CAPSTONE_DIET
   10067 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10068 #endif
   10069 	},
   10070 	{
   10071 		ARM_VST3d16, ARM_INS_VST3,
   10072 #ifndef CAPSTONE_DIET
   10073 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10074 #endif
   10075 	},
   10076 	{
   10077 		ARM_VST3d16_UPD, ARM_INS_VST3,
   10078 #ifndef CAPSTONE_DIET
   10079 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10080 #endif
   10081 	},
   10082 	{
   10083 		ARM_VST3d32, ARM_INS_VST3,
   10084 #ifndef CAPSTONE_DIET
   10085 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10086 #endif
   10087 	},
   10088 	{
   10089 		ARM_VST3d32_UPD, ARM_INS_VST3,
   10090 #ifndef CAPSTONE_DIET
   10091 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10092 #endif
   10093 	},
   10094 	{
   10095 		ARM_VST3d8, ARM_INS_VST3,
   10096 #ifndef CAPSTONE_DIET
   10097 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10098 #endif
   10099 	},
   10100 	{
   10101 		ARM_VST3d8_UPD, ARM_INS_VST3,
   10102 #ifndef CAPSTONE_DIET
   10103 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10104 #endif
   10105 	},
   10106 	{
   10107 		ARM_VST3q16, ARM_INS_VST3,
   10108 #ifndef CAPSTONE_DIET
   10109 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10110 #endif
   10111 	},
   10112 	{
   10113 		ARM_VST3q16_UPD, ARM_INS_VST3,
   10114 #ifndef CAPSTONE_DIET
   10115 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10116 #endif
   10117 	},
   10118 	{
   10119 		ARM_VST3q32, ARM_INS_VST3,
   10120 #ifndef CAPSTONE_DIET
   10121 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10122 #endif
   10123 	},
   10124 	{
   10125 		ARM_VST3q32_UPD, ARM_INS_VST3,
   10126 #ifndef CAPSTONE_DIET
   10127 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10128 #endif
   10129 	},
   10130 	{
   10131 		ARM_VST3q8, ARM_INS_VST3,
   10132 #ifndef CAPSTONE_DIET
   10133 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10134 #endif
   10135 	},
   10136 	{
   10137 		ARM_VST3q8_UPD, ARM_INS_VST3,
   10138 #ifndef CAPSTONE_DIET
   10139 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10140 #endif
   10141 	},
   10142 	{
   10143 		ARM_VST4LNd16, ARM_INS_VST4,
   10144 #ifndef CAPSTONE_DIET
   10145 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10146 #endif
   10147 	},
   10148 	{
   10149 		ARM_VST4LNd16_UPD, ARM_INS_VST4,
   10150 #ifndef CAPSTONE_DIET
   10151 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10152 #endif
   10153 	},
   10154 	{
   10155 		ARM_VST4LNd32, ARM_INS_VST4,
   10156 #ifndef CAPSTONE_DIET
   10157 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10158 #endif
   10159 	},
   10160 	{
   10161 		ARM_VST4LNd32_UPD, ARM_INS_VST4,
   10162 #ifndef CAPSTONE_DIET
   10163 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10164 #endif
   10165 	},
   10166 	{
   10167 		ARM_VST4LNd8, ARM_INS_VST4,
   10168 #ifndef CAPSTONE_DIET
   10169 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10170 #endif
   10171 	},
   10172 	{
   10173 		ARM_VST4LNd8_UPD, ARM_INS_VST4,
   10174 #ifndef CAPSTONE_DIET
   10175 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10176 #endif
   10177 	},
   10178 	{
   10179 		ARM_VST4LNq16, ARM_INS_VST4,
   10180 #ifndef CAPSTONE_DIET
   10181 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10182 #endif
   10183 	},
   10184 	{
   10185 		ARM_VST4LNq16_UPD, ARM_INS_VST4,
   10186 #ifndef CAPSTONE_DIET
   10187 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10188 #endif
   10189 	},
   10190 	{
   10191 		ARM_VST4LNq32, ARM_INS_VST4,
   10192 #ifndef CAPSTONE_DIET
   10193 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10194 #endif
   10195 	},
   10196 	{
   10197 		ARM_VST4LNq32_UPD, ARM_INS_VST4,
   10198 #ifndef CAPSTONE_DIET
   10199 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10200 #endif
   10201 	},
   10202 	{
   10203 		ARM_VST4d16, ARM_INS_VST4,
   10204 #ifndef CAPSTONE_DIET
   10205 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10206 #endif
   10207 	},
   10208 	{
   10209 		ARM_VST4d16_UPD, ARM_INS_VST4,
   10210 #ifndef CAPSTONE_DIET
   10211 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10212 #endif
   10213 	},
   10214 	{
   10215 		ARM_VST4d32, ARM_INS_VST4,
   10216 #ifndef CAPSTONE_DIET
   10217 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10218 #endif
   10219 	},
   10220 	{
   10221 		ARM_VST4d32_UPD, ARM_INS_VST4,
   10222 #ifndef CAPSTONE_DIET
   10223 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10224 #endif
   10225 	},
   10226 	{
   10227 		ARM_VST4d8, ARM_INS_VST4,
   10228 #ifndef CAPSTONE_DIET
   10229 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10230 #endif
   10231 	},
   10232 	{
   10233 		ARM_VST4d8_UPD, ARM_INS_VST4,
   10234 #ifndef CAPSTONE_DIET
   10235 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10236 #endif
   10237 	},
   10238 	{
   10239 		ARM_VST4q16, ARM_INS_VST4,
   10240 #ifndef CAPSTONE_DIET
   10241 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10242 #endif
   10243 	},
   10244 	{
   10245 		ARM_VST4q16_UPD, ARM_INS_VST4,
   10246 #ifndef CAPSTONE_DIET
   10247 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10248 #endif
   10249 	},
   10250 	{
   10251 		ARM_VST4q32, ARM_INS_VST4,
   10252 #ifndef CAPSTONE_DIET
   10253 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10254 #endif
   10255 	},
   10256 	{
   10257 		ARM_VST4q32_UPD, ARM_INS_VST4,
   10258 #ifndef CAPSTONE_DIET
   10259 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10260 #endif
   10261 	},
   10262 	{
   10263 		ARM_VST4q8, ARM_INS_VST4,
   10264 #ifndef CAPSTONE_DIET
   10265 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10266 #endif
   10267 	},
   10268 	{
   10269 		ARM_VST4q8_UPD, ARM_INS_VST4,
   10270 #ifndef CAPSTONE_DIET
   10271 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10272 #endif
   10273 	},
   10274 	{
   10275 		ARM_VSTMDDB_UPD, ARM_INS_VSTMDB,
   10276 #ifndef CAPSTONE_DIET
   10277 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10278 #endif
   10279 	},
   10280 	{
   10281 		ARM_VSTMDIA, ARM_INS_VSTMIA,
   10282 #ifndef CAPSTONE_DIET
   10283 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10284 #endif
   10285 	},
   10286 	{
   10287 		ARM_VSTMDIA_UPD, ARM_INS_VSTMIA,
   10288 #ifndef CAPSTONE_DIET
   10289 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10290 #endif
   10291 	},
   10292 	{
   10293 		ARM_VSTMSDB_UPD, ARM_INS_VSTMDB,
   10294 #ifndef CAPSTONE_DIET
   10295 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10296 #endif
   10297 	},
   10298 	{
   10299 		ARM_VSTMSIA, ARM_INS_VSTMIA,
   10300 #ifndef CAPSTONE_DIET
   10301 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10302 #endif
   10303 	},
   10304 	{
   10305 		ARM_VSTMSIA_UPD, ARM_INS_VSTMIA,
   10306 #ifndef CAPSTONE_DIET
   10307 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10308 #endif
   10309 	},
   10310 	{
   10311 		ARM_VSTRD, ARM_INS_VSTR,
   10312 #ifndef CAPSTONE_DIET
   10313 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10314 #endif
   10315 	},
   10316 	{
   10317 		ARM_VSTRS, ARM_INS_VSTR,
   10318 #ifndef CAPSTONE_DIET
   10319 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10320 #endif
   10321 	},
   10322 	{
   10323 		ARM_VSUBD, ARM_INS_VSUB,
   10324 #ifndef CAPSTONE_DIET
   10325 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10326 #endif
   10327 	},
   10328 	{
   10329 		ARM_VSUBHNv2i32, ARM_INS_VSUBHN,
   10330 #ifndef CAPSTONE_DIET
   10331 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10332 #endif
   10333 	},
   10334 	{
   10335 		ARM_VSUBHNv4i16, ARM_INS_VSUBHN,
   10336 #ifndef CAPSTONE_DIET
   10337 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10338 #endif
   10339 	},
   10340 	{
   10341 		ARM_VSUBHNv8i8, ARM_INS_VSUBHN,
   10342 #ifndef CAPSTONE_DIET
   10343 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10344 #endif
   10345 	},
   10346 	{
   10347 		ARM_VSUBLsv2i64, ARM_INS_VSUBL,
   10348 #ifndef CAPSTONE_DIET
   10349 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10350 #endif
   10351 	},
   10352 	{
   10353 		ARM_VSUBLsv4i32, ARM_INS_VSUBL,
   10354 #ifndef CAPSTONE_DIET
   10355 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10356 #endif
   10357 	},
   10358 	{
   10359 		ARM_VSUBLsv8i16, ARM_INS_VSUBL,
   10360 #ifndef CAPSTONE_DIET
   10361 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10362 #endif
   10363 	},
   10364 	{
   10365 		ARM_VSUBLuv2i64, ARM_INS_VSUBL,
   10366 #ifndef CAPSTONE_DIET
   10367 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10368 #endif
   10369 	},
   10370 	{
   10371 		ARM_VSUBLuv4i32, ARM_INS_VSUBL,
   10372 #ifndef CAPSTONE_DIET
   10373 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10374 #endif
   10375 	},
   10376 	{
   10377 		ARM_VSUBLuv8i16, ARM_INS_VSUBL,
   10378 #ifndef CAPSTONE_DIET
   10379 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10380 #endif
   10381 	},
   10382 	{
   10383 		ARM_VSUBS, ARM_INS_VSUB,
   10384 #ifndef CAPSTONE_DIET
   10385 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10386 #endif
   10387 	},
   10388 	{
   10389 		ARM_VSUBWsv2i64, ARM_INS_VSUBW,
   10390 #ifndef CAPSTONE_DIET
   10391 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10392 #endif
   10393 	},
   10394 	{
   10395 		ARM_VSUBWsv4i32, ARM_INS_VSUBW,
   10396 #ifndef CAPSTONE_DIET
   10397 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10398 #endif
   10399 	},
   10400 	{
   10401 		ARM_VSUBWsv8i16, ARM_INS_VSUBW,
   10402 #ifndef CAPSTONE_DIET
   10403 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10404 #endif
   10405 	},
   10406 	{
   10407 		ARM_VSUBWuv2i64, ARM_INS_VSUBW,
   10408 #ifndef CAPSTONE_DIET
   10409 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10410 #endif
   10411 	},
   10412 	{
   10413 		ARM_VSUBWuv4i32, ARM_INS_VSUBW,
   10414 #ifndef CAPSTONE_DIET
   10415 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10416 #endif
   10417 	},
   10418 	{
   10419 		ARM_VSUBWuv8i16, ARM_INS_VSUBW,
   10420 #ifndef CAPSTONE_DIET
   10421 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10422 #endif
   10423 	},
   10424 	{
   10425 		ARM_VSUBfd, ARM_INS_VSUB,
   10426 #ifndef CAPSTONE_DIET
   10427 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10428 #endif
   10429 	},
   10430 	{
   10431 		ARM_VSUBfq, ARM_INS_VSUB,
   10432 #ifndef CAPSTONE_DIET
   10433 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10434 #endif
   10435 	},
   10436 	{
   10437 		ARM_VSUBv16i8, ARM_INS_VSUB,
   10438 #ifndef CAPSTONE_DIET
   10439 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10440 #endif
   10441 	},
   10442 	{
   10443 		ARM_VSUBv1i64, ARM_INS_VSUB,
   10444 #ifndef CAPSTONE_DIET
   10445 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10446 #endif
   10447 	},
   10448 	{
   10449 		ARM_VSUBv2i32, ARM_INS_VSUB,
   10450 #ifndef CAPSTONE_DIET
   10451 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10452 #endif
   10453 	},
   10454 	{
   10455 		ARM_VSUBv2i64, ARM_INS_VSUB,
   10456 #ifndef CAPSTONE_DIET
   10457 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10458 #endif
   10459 	},
   10460 	{
   10461 		ARM_VSUBv4i16, ARM_INS_VSUB,
   10462 #ifndef CAPSTONE_DIET
   10463 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10464 #endif
   10465 	},
   10466 	{
   10467 		ARM_VSUBv4i32, ARM_INS_VSUB,
   10468 #ifndef CAPSTONE_DIET
   10469 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10470 #endif
   10471 	},
   10472 	{
   10473 		ARM_VSUBv8i16, ARM_INS_VSUB,
   10474 #ifndef CAPSTONE_DIET
   10475 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10476 #endif
   10477 	},
   10478 	{
   10479 		ARM_VSUBv8i8, ARM_INS_VSUB,
   10480 #ifndef CAPSTONE_DIET
   10481 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10482 #endif
   10483 	},
   10484 	{
   10485 		ARM_VSWPd, ARM_INS_VSWP,
   10486 #ifndef CAPSTONE_DIET
   10487 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10488 #endif
   10489 	},
   10490 	{
   10491 		ARM_VSWPq, ARM_INS_VSWP,
   10492 #ifndef CAPSTONE_DIET
   10493 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10494 #endif
   10495 	},
   10496 	{
   10497 		ARM_VTBL1, ARM_INS_VTBL,
   10498 #ifndef CAPSTONE_DIET
   10499 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10500 #endif
   10501 	},
   10502 	{
   10503 		ARM_VTBL2, ARM_INS_VTBL,
   10504 #ifndef CAPSTONE_DIET
   10505 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10506 #endif
   10507 	},
   10508 	{
   10509 		ARM_VTBL3, ARM_INS_VTBL,
   10510 #ifndef CAPSTONE_DIET
   10511 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10512 #endif
   10513 	},
   10514 	{
   10515 		ARM_VTBL4, ARM_INS_VTBL,
   10516 #ifndef CAPSTONE_DIET
   10517 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10518 #endif
   10519 	},
   10520 	{
   10521 		ARM_VTBX1, ARM_INS_VTBX,
   10522 #ifndef CAPSTONE_DIET
   10523 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10524 #endif
   10525 	},
   10526 	{
   10527 		ARM_VTBX2, ARM_INS_VTBX,
   10528 #ifndef CAPSTONE_DIET
   10529 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10530 #endif
   10531 	},
   10532 	{
   10533 		ARM_VTBX3, ARM_INS_VTBX,
   10534 #ifndef CAPSTONE_DIET
   10535 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10536 #endif
   10537 	},
   10538 	{
   10539 		ARM_VTBX4, ARM_INS_VTBX,
   10540 #ifndef CAPSTONE_DIET
   10541 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10542 #endif
   10543 	},
   10544 	{
   10545 		ARM_VTOSHD, ARM_INS_VCVT,
   10546 #ifndef CAPSTONE_DIET
   10547 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10548 #endif
   10549 	},
   10550 	{
   10551 		ARM_VTOSHS, ARM_INS_VCVT,
   10552 #ifndef CAPSTONE_DIET
   10553 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10554 #endif
   10555 	},
   10556 	{
   10557 		ARM_VTOSIRD, ARM_INS_VCVTR,
   10558 #ifndef CAPSTONE_DIET
   10559 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10560 #endif
   10561 	},
   10562 	{
   10563 		ARM_VTOSIRS, ARM_INS_VCVTR,
   10564 #ifndef CAPSTONE_DIET
   10565 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10566 #endif
   10567 	},
   10568 	{
   10569 		ARM_VTOSIZD, ARM_INS_VCVT,
   10570 #ifndef CAPSTONE_DIET
   10571 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10572 #endif
   10573 	},
   10574 	{
   10575 		ARM_VTOSIZS, ARM_INS_VCVT,
   10576 #ifndef CAPSTONE_DIET
   10577 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10578 #endif
   10579 	},
   10580 	{
   10581 		ARM_VTOSLD, ARM_INS_VCVT,
   10582 #ifndef CAPSTONE_DIET
   10583 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10584 #endif
   10585 	},
   10586 	{
   10587 		ARM_VTOSLS, ARM_INS_VCVT,
   10588 #ifndef CAPSTONE_DIET
   10589 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10590 #endif
   10591 	},
   10592 	{
   10593 		ARM_VTOUHD, ARM_INS_VCVT,
   10594 #ifndef CAPSTONE_DIET
   10595 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10596 #endif
   10597 	},
   10598 	{
   10599 		ARM_VTOUHS, ARM_INS_VCVT,
   10600 #ifndef CAPSTONE_DIET
   10601 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10602 #endif
   10603 	},
   10604 	{
   10605 		ARM_VTOUIRD, ARM_INS_VCVTR,
   10606 #ifndef CAPSTONE_DIET
   10607 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10608 #endif
   10609 	},
   10610 	{
   10611 		ARM_VTOUIRS, ARM_INS_VCVTR,
   10612 #ifndef CAPSTONE_DIET
   10613 		{ ARM_REG_FPSCR, 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10614 #endif
   10615 	},
   10616 	{
   10617 		ARM_VTOUIZD, ARM_INS_VCVT,
   10618 #ifndef CAPSTONE_DIET
   10619 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10620 #endif
   10621 	},
   10622 	{
   10623 		ARM_VTOUIZS, ARM_INS_VCVT,
   10624 #ifndef CAPSTONE_DIET
   10625 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10626 #endif
   10627 	},
   10628 	{
   10629 		ARM_VTOULD, ARM_INS_VCVT,
   10630 #ifndef CAPSTONE_DIET
   10631 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10632 #endif
   10633 	},
   10634 	{
   10635 		ARM_VTOULS, ARM_INS_VCVT,
   10636 #ifndef CAPSTONE_DIET
   10637 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10638 #endif
   10639 	},
   10640 	{
   10641 		ARM_VTRNd16, ARM_INS_VTRN,
   10642 #ifndef CAPSTONE_DIET
   10643 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10644 #endif
   10645 	},
   10646 	{
   10647 		ARM_VTRNd32, ARM_INS_VTRN,
   10648 #ifndef CAPSTONE_DIET
   10649 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10650 #endif
   10651 	},
   10652 	{
   10653 		ARM_VTRNd8, ARM_INS_VTRN,
   10654 #ifndef CAPSTONE_DIET
   10655 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10656 #endif
   10657 	},
   10658 	{
   10659 		ARM_VTRNq16, ARM_INS_VTRN,
   10660 #ifndef CAPSTONE_DIET
   10661 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10662 #endif
   10663 	},
   10664 	{
   10665 		ARM_VTRNq32, ARM_INS_VTRN,
   10666 #ifndef CAPSTONE_DIET
   10667 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10668 #endif
   10669 	},
   10670 	{
   10671 		ARM_VTRNq8, ARM_INS_VTRN,
   10672 #ifndef CAPSTONE_DIET
   10673 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10674 #endif
   10675 	},
   10676 	{
   10677 		ARM_VTSTv16i8, ARM_INS_VTST,
   10678 #ifndef CAPSTONE_DIET
   10679 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10680 #endif
   10681 	},
   10682 	{
   10683 		ARM_VTSTv2i32, ARM_INS_VTST,
   10684 #ifndef CAPSTONE_DIET
   10685 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10686 #endif
   10687 	},
   10688 	{
   10689 		ARM_VTSTv4i16, ARM_INS_VTST,
   10690 #ifndef CAPSTONE_DIET
   10691 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10692 #endif
   10693 	},
   10694 	{
   10695 		ARM_VTSTv4i32, ARM_INS_VTST,
   10696 #ifndef CAPSTONE_DIET
   10697 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10698 #endif
   10699 	},
   10700 	{
   10701 		ARM_VTSTv8i16, ARM_INS_VTST,
   10702 #ifndef CAPSTONE_DIET
   10703 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10704 #endif
   10705 	},
   10706 	{
   10707 		ARM_VTSTv8i8, ARM_INS_VTST,
   10708 #ifndef CAPSTONE_DIET
   10709 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10710 #endif
   10711 	},
   10712 	{
   10713 		ARM_VUHTOD, ARM_INS_VCVT,
   10714 #ifndef CAPSTONE_DIET
   10715 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10716 #endif
   10717 	},
   10718 	{
   10719 		ARM_VUHTOS, ARM_INS_VCVT,
   10720 #ifndef CAPSTONE_DIET
   10721 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10722 #endif
   10723 	},
   10724 	{
   10725 		ARM_VUITOD, ARM_INS_VCVT,
   10726 #ifndef CAPSTONE_DIET
   10727 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10728 #endif
   10729 	},
   10730 	{
   10731 		ARM_VUITOS, ARM_INS_VCVT,
   10732 #ifndef CAPSTONE_DIET
   10733 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10734 #endif
   10735 	},
   10736 	{
   10737 		ARM_VULTOD, ARM_INS_VCVT,
   10738 #ifndef CAPSTONE_DIET
   10739 		{ 0 }, { 0 }, { ARM_GRP_VFP2, ARM_GRP_DPVFP, 0 }, 0, 0
   10740 #endif
   10741 	},
   10742 	{
   10743 		ARM_VULTOS, ARM_INS_VCVT,
   10744 #ifndef CAPSTONE_DIET
   10745 		{ 0 }, { 0 }, { ARM_GRP_VFP2, 0 }, 0, 0
   10746 #endif
   10747 	},
   10748 	{
   10749 		ARM_VUZPd16, ARM_INS_VUZP,
   10750 #ifndef CAPSTONE_DIET
   10751 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10752 #endif
   10753 	},
   10754 	{
   10755 		ARM_VUZPd8, ARM_INS_VUZP,
   10756 #ifndef CAPSTONE_DIET
   10757 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10758 #endif
   10759 	},
   10760 	{
   10761 		ARM_VUZPq16, ARM_INS_VUZP,
   10762 #ifndef CAPSTONE_DIET
   10763 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10764 #endif
   10765 	},
   10766 	{
   10767 		ARM_VUZPq32, ARM_INS_VUZP,
   10768 #ifndef CAPSTONE_DIET
   10769 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10770 #endif
   10771 	},
   10772 	{
   10773 		ARM_VUZPq8, ARM_INS_VUZP,
   10774 #ifndef CAPSTONE_DIET
   10775 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10776 #endif
   10777 	},
   10778 	{
   10779 		ARM_VZIPd16, ARM_INS_VZIP,
   10780 #ifndef CAPSTONE_DIET
   10781 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10782 #endif
   10783 	},
   10784 	{
   10785 		ARM_VZIPd8, ARM_INS_VZIP,
   10786 #ifndef CAPSTONE_DIET
   10787 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10788 #endif
   10789 	},
   10790 	{
   10791 		ARM_VZIPq16, ARM_INS_VZIP,
   10792 #ifndef CAPSTONE_DIET
   10793 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10794 #endif
   10795 	},
   10796 	{
   10797 		ARM_VZIPq32, ARM_INS_VZIP,
   10798 #ifndef CAPSTONE_DIET
   10799 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10800 #endif
   10801 	},
   10802 	{
   10803 		ARM_VZIPq8, ARM_INS_VZIP,
   10804 #ifndef CAPSTONE_DIET
   10805 		{ 0 }, { 0 }, { ARM_GRP_NEON, 0 }, 0, 0
   10806 #endif
   10807 	},
   10808 	{
   10809 		ARM_sysLDMDA, ARM_INS_LDMDA,
   10810 #ifndef CAPSTONE_DIET
   10811 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10812 #endif
   10813 	},
   10814 	{
   10815 		ARM_sysLDMDA_UPD, ARM_INS_LDMDA,
   10816 #ifndef CAPSTONE_DIET
   10817 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10818 #endif
   10819 	},
   10820 	{
   10821 		ARM_sysLDMDB, ARM_INS_LDMDB,
   10822 #ifndef CAPSTONE_DIET
   10823 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10824 #endif
   10825 	},
   10826 	{
   10827 		ARM_sysLDMDB_UPD, ARM_INS_LDMDB,
   10828 #ifndef CAPSTONE_DIET
   10829 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10830 #endif
   10831 	},
   10832 	{
   10833 		ARM_sysLDMIA, ARM_INS_LDM,
   10834 #ifndef CAPSTONE_DIET
   10835 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10836 #endif
   10837 	},
   10838 	{
   10839 		ARM_sysLDMIA_UPD, ARM_INS_LDM,
   10840 #ifndef CAPSTONE_DIET
   10841 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10842 #endif
   10843 	},
   10844 	{
   10845 		ARM_sysLDMIB, ARM_INS_LDMIB,
   10846 #ifndef CAPSTONE_DIET
   10847 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10848 #endif
   10849 	},
   10850 	{
   10851 		ARM_sysLDMIB_UPD, ARM_INS_LDMIB,
   10852 #ifndef CAPSTONE_DIET
   10853 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10854 #endif
   10855 	},
   10856 	{
   10857 		ARM_sysSTMDA, ARM_INS_STMDA,
   10858 #ifndef CAPSTONE_DIET
   10859 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10860 #endif
   10861 	},
   10862 	{
   10863 		ARM_sysSTMDA_UPD, ARM_INS_STMDA,
   10864 #ifndef CAPSTONE_DIET
   10865 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10866 #endif
   10867 	},
   10868 	{
   10869 		ARM_sysSTMDB, ARM_INS_STMDB,
   10870 #ifndef CAPSTONE_DIET
   10871 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10872 #endif
   10873 	},
   10874 	{
   10875 		ARM_sysSTMDB_UPD, ARM_INS_STMDB,
   10876 #ifndef CAPSTONE_DIET
   10877 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10878 #endif
   10879 	},
   10880 	{
   10881 		ARM_sysSTMIA, ARM_INS_STM,
   10882 #ifndef CAPSTONE_DIET
   10883 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10884 #endif
   10885 	},
   10886 	{
   10887 		ARM_sysSTMIA_UPD, ARM_INS_STM,
   10888 #ifndef CAPSTONE_DIET
   10889 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10890 #endif
   10891 	},
   10892 	{
   10893 		ARM_sysSTMIB, ARM_INS_STMIB,
   10894 #ifndef CAPSTONE_DIET
   10895 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10896 #endif
   10897 	},
   10898 	{
   10899 		ARM_sysSTMIB_UPD, ARM_INS_STMIB,
   10900 #ifndef CAPSTONE_DIET
   10901 		{ 0 }, { 0 }, { ARM_GRP_ARM, 0 }, 0, 0
   10902 #endif
   10903 	},
   10904 	{
   10905 		ARM_t2ADCri, ARM_INS_ADC,
   10906 #ifndef CAPSTONE_DIET
   10907 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10908 #endif
   10909 	},
   10910 	{
   10911 		ARM_t2ADCrr, ARM_INS_ADC,
   10912 #ifndef CAPSTONE_DIET
   10913 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10914 #endif
   10915 	},
   10916 	{
   10917 		ARM_t2ADCrs, ARM_INS_ADC,
   10918 #ifndef CAPSTONE_DIET
   10919 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10920 #endif
   10921 	},
   10922 	{
   10923 		ARM_t2ADDri, ARM_INS_ADD,
   10924 #ifndef CAPSTONE_DIET
   10925 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10926 #endif
   10927 	},
   10928 	{
   10929 		ARM_t2ADDri12, ARM_INS_ADDW,
   10930 #ifndef CAPSTONE_DIET
   10931 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10932 #endif
   10933 	},
   10934 	{
   10935 		ARM_t2ADDrr, ARM_INS_ADD,
   10936 #ifndef CAPSTONE_DIET
   10937 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10938 #endif
   10939 	},
   10940 	{
   10941 		ARM_t2ADDrs, ARM_INS_ADD,
   10942 #ifndef CAPSTONE_DIET
   10943 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10944 #endif
   10945 	},
   10946 	{
   10947 		ARM_t2ADR, ARM_INS_ADR,
   10948 #ifndef CAPSTONE_DIET
   10949 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10950 #endif
   10951 	},
   10952 	{
   10953 		ARM_t2ANDri, ARM_INS_AND,
   10954 #ifndef CAPSTONE_DIET
   10955 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10956 #endif
   10957 	},
   10958 	{
   10959 		ARM_t2ANDrr, ARM_INS_AND,
   10960 #ifndef CAPSTONE_DIET
   10961 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10962 #endif
   10963 	},
   10964 	{
   10965 		ARM_t2ANDrs, ARM_INS_AND,
   10966 #ifndef CAPSTONE_DIET
   10967 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10968 #endif
   10969 	},
   10970 	{
   10971 		ARM_t2ASRri, ARM_INS_ASR,
   10972 #ifndef CAPSTONE_DIET
   10973 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10974 #endif
   10975 	},
   10976 	{
   10977 		ARM_t2ASRrr, ARM_INS_ASR,
   10978 #ifndef CAPSTONE_DIET
   10979 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10980 #endif
   10981 	},
   10982 	{
   10983 		ARM_t2B, ARM_INS_B,
   10984 #ifndef CAPSTONE_DIET
   10985 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
   10986 #endif
   10987 	},
   10988 	{
   10989 		ARM_t2BFC, ARM_INS_BFC,
   10990 #ifndef CAPSTONE_DIET
   10991 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10992 #endif
   10993 	},
   10994 	{
   10995 		ARM_t2BFI, ARM_INS_BFI,
   10996 #ifndef CAPSTONE_DIET
   10997 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   10998 #endif
   10999 	},
   11000 	{
   11001 		ARM_t2BICri, ARM_INS_BIC,
   11002 #ifndef CAPSTONE_DIET
   11003 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11004 #endif
   11005 	},
   11006 	{
   11007 		ARM_t2BICrr, ARM_INS_BIC,
   11008 #ifndef CAPSTONE_DIET
   11009 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11010 #endif
   11011 	},
   11012 	{
   11013 		ARM_t2BICrs, ARM_INS_BIC,
   11014 #ifndef CAPSTONE_DIET
   11015 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11016 #endif
   11017 	},
   11018 	{
   11019 		ARM_t2BXJ, ARM_INS_BXJ,
   11020 #ifndef CAPSTONE_DIET
   11021 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, ARM_GRP_PREV8, 0 }, 0, 1
   11022 #endif
   11023 	},
   11024 	{
   11025 		ARM_t2Bcc, ARM_INS_B,
   11026 #ifndef CAPSTONE_DIET
   11027 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
   11028 #endif
   11029 	},
   11030 	{
   11031 		ARM_t2CDP, ARM_INS_CDP,
   11032 #ifndef CAPSTONE_DIET
   11033 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
   11034 #endif
   11035 	},
   11036 	{
   11037 		ARM_t2CDP2, ARM_INS_CDP2,
   11038 #ifndef CAPSTONE_DIET
   11039 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
   11040 #endif
   11041 	},
   11042 	{
   11043 		ARM_t2CLREX, ARM_INS_CLREX,
   11044 #ifndef CAPSTONE_DIET
   11045 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
   11046 #endif
   11047 	},
   11048 	{
   11049 		ARM_t2CLZ, ARM_INS_CLZ,
   11050 #ifndef CAPSTONE_DIET
   11051 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11052 #endif
   11053 	},
   11054 	{
   11055 		ARM_t2CMNri, ARM_INS_CMN,
   11056 #ifndef CAPSTONE_DIET
   11057 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11058 #endif
   11059 	},
   11060 	{
   11061 		ARM_t2CMNzrr, ARM_INS_CMN,
   11062 #ifndef CAPSTONE_DIET
   11063 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11064 #endif
   11065 	},
   11066 	{
   11067 		ARM_t2CMNzrs, ARM_INS_CMN,
   11068 #ifndef CAPSTONE_DIET
   11069 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11070 #endif
   11071 	},
   11072 	{
   11073 		ARM_t2CMPri, ARM_INS_CMP,
   11074 #ifndef CAPSTONE_DIET
   11075 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11076 #endif
   11077 	},
   11078 	{
   11079 		ARM_t2CMPrr, ARM_INS_CMP,
   11080 #ifndef CAPSTONE_DIET
   11081 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11082 #endif
   11083 	},
   11084 	{
   11085 		ARM_t2CMPrs, ARM_INS_CMP,
   11086 #ifndef CAPSTONE_DIET
   11087 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11088 #endif
   11089 	},
   11090 	{
   11091 		ARM_t2CPS1p, ARM_INS_CPS,
   11092 #ifndef CAPSTONE_DIET
   11093 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11094 #endif
   11095 	},
   11096 	{
   11097 		ARM_t2CPS2p, ARM_INS_CPS,
   11098 #ifndef CAPSTONE_DIET
   11099 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11100 #endif
   11101 	},
   11102 	{
   11103 		ARM_t2CPS3p, ARM_INS_CPS,
   11104 #ifndef CAPSTONE_DIET
   11105 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11106 #endif
   11107 	},
   11108 	{
   11109 		ARM_t2CRC32B, ARM_INS_CRC32B,
   11110 #ifndef CAPSTONE_DIET
   11111 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
   11112 #endif
   11113 	},
   11114 	{
   11115 		ARM_t2CRC32CB, ARM_INS_CRC32CB,
   11116 #ifndef CAPSTONE_DIET
   11117 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
   11118 #endif
   11119 	},
   11120 	{
   11121 		ARM_t2CRC32CH, ARM_INS_CRC32CH,
   11122 #ifndef CAPSTONE_DIET
   11123 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
   11124 #endif
   11125 	},
   11126 	{
   11127 		ARM_t2CRC32CW, ARM_INS_CRC32CW,
   11128 #ifndef CAPSTONE_DIET
   11129 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
   11130 #endif
   11131 	},
   11132 	{
   11133 		ARM_t2CRC32H, ARM_INS_CRC32H,
   11134 #ifndef CAPSTONE_DIET
   11135 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
   11136 #endif
   11137 	},
   11138 	{
   11139 		ARM_t2CRC32W, ARM_INS_CRC32W,
   11140 #ifndef CAPSTONE_DIET
   11141 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, ARM_GRP_CRC, 0 }, 0, 0
   11142 #endif
   11143 	},
   11144 	{
   11145 		ARM_t2DBG, ARM_INS_DBG,
   11146 #ifndef CAPSTONE_DIET
   11147 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11148 #endif
   11149 	},
   11150 	{
   11151 		ARM_t2DCPS1, ARM_INS_DCPS1,
   11152 #ifndef CAPSTONE_DIET
   11153 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
   11154 #endif
   11155 	},
   11156 	{
   11157 		ARM_t2DCPS2, ARM_INS_DCPS2,
   11158 #ifndef CAPSTONE_DIET
   11159 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
   11160 #endif
   11161 	},
   11162 	{
   11163 		ARM_t2DCPS3, ARM_INS_DCPS3,
   11164 #ifndef CAPSTONE_DIET
   11165 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V8, 0 }, 0, 0
   11166 #endif
   11167 	},
   11168 	{
   11169 		ARM_t2DMB, ARM_INS_DMB,
   11170 #ifndef CAPSTONE_DIET
   11171 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
   11172 #endif
   11173 	},
   11174 	{
   11175 		ARM_t2DSB, ARM_INS_DSB,
   11176 #ifndef CAPSTONE_DIET
   11177 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
   11178 #endif
   11179 	},
   11180 	{
   11181 		ARM_t2EORri, ARM_INS_EOR,
   11182 #ifndef CAPSTONE_DIET
   11183 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11184 #endif
   11185 	},
   11186 	{
   11187 		ARM_t2EORrr, ARM_INS_EOR,
   11188 #ifndef CAPSTONE_DIET
   11189 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11190 #endif
   11191 	},
   11192 	{
   11193 		ARM_t2EORrs, ARM_INS_EOR,
   11194 #ifndef CAPSTONE_DIET
   11195 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11196 #endif
   11197 	},
   11198 	{
   11199 		ARM_t2HINT, ARM_INS_HINT,
   11200 #ifndef CAPSTONE_DIET
   11201 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11202 #endif
   11203 	},
   11204 	{
   11205 		ARM_t2ISB, ARM_INS_ISB,
   11206 #ifndef CAPSTONE_DIET
   11207 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_DATABARRIER, 0 }, 0, 0
   11208 #endif
   11209 	},
   11210 	{
   11211 		ARM_t2IT, ARM_INS_IT,
   11212 #ifndef CAPSTONE_DIET
   11213 		{ 0 }, { ARM_REG_ITSTATE, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11214 #endif
   11215 	},
   11216 	{
   11217 		ARM_t2LDA, ARM_INS_LDA,
   11218 #ifndef CAPSTONE_DIET
   11219 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   11220 #endif
   11221 	},
   11222 	{
   11223 		ARM_t2LDAB, ARM_INS_LDAB,
   11224 #ifndef CAPSTONE_DIET
   11225 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   11226 #endif
   11227 	},
   11228 	{
   11229 		ARM_t2LDAEX, ARM_INS_LDAEX,
   11230 #ifndef CAPSTONE_DIET
   11231 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   11232 #endif
   11233 	},
   11234 	{
   11235 		ARM_t2LDAEXB, ARM_INS_LDAEXB,
   11236 #ifndef CAPSTONE_DIET
   11237 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   11238 #endif
   11239 	},
   11240 	{
   11241 		ARM_t2LDAEXD, ARM_INS_LDAEXD,
   11242 #ifndef CAPSTONE_DIET
   11243 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   11244 #endif
   11245 	},
   11246 	{
   11247 		ARM_t2LDAEXH, ARM_INS_LDAEXH,
   11248 #ifndef CAPSTONE_DIET
   11249 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   11250 #endif
   11251 	},
   11252 	{
   11253 		ARM_t2LDAH, ARM_INS_LDAH,
   11254 #ifndef CAPSTONE_DIET
   11255 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   11256 #endif
   11257 	},
   11258 	{
   11259 		ARM_t2LDC2L_OFFSET, ARM_INS_LDC2L,
   11260 #ifndef CAPSTONE_DIET
   11261 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11262 #endif
   11263 	},
   11264 	{
   11265 		ARM_t2LDC2L_OPTION, ARM_INS_LDC2L,
   11266 #ifndef CAPSTONE_DIET
   11267 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11268 #endif
   11269 	},
   11270 	{
   11271 		ARM_t2LDC2L_POST, ARM_INS_LDC2L,
   11272 #ifndef CAPSTONE_DIET
   11273 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11274 #endif
   11275 	},
   11276 	{
   11277 		ARM_t2LDC2L_PRE, ARM_INS_LDC2L,
   11278 #ifndef CAPSTONE_DIET
   11279 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11280 #endif
   11281 	},
   11282 	{
   11283 		ARM_t2LDC2_OFFSET, ARM_INS_LDC2,
   11284 #ifndef CAPSTONE_DIET
   11285 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11286 #endif
   11287 	},
   11288 	{
   11289 		ARM_t2LDC2_OPTION, ARM_INS_LDC2,
   11290 #ifndef CAPSTONE_DIET
   11291 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11292 #endif
   11293 	},
   11294 	{
   11295 		ARM_t2LDC2_POST, ARM_INS_LDC2,
   11296 #ifndef CAPSTONE_DIET
   11297 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11298 #endif
   11299 	},
   11300 	{
   11301 		ARM_t2LDC2_PRE, ARM_INS_LDC2,
   11302 #ifndef CAPSTONE_DIET
   11303 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   11304 #endif
   11305 	},
   11306 	{
   11307 		ARM_t2LDCL_OFFSET, ARM_INS_LDCL,
   11308 #ifndef CAPSTONE_DIET
   11309 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11310 #endif
   11311 	},
   11312 	{
   11313 		ARM_t2LDCL_OPTION, ARM_INS_LDCL,
   11314 #ifndef CAPSTONE_DIET
   11315 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11316 #endif
   11317 	},
   11318 	{
   11319 		ARM_t2LDCL_POST, ARM_INS_LDCL,
   11320 #ifndef CAPSTONE_DIET
   11321 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11322 #endif
   11323 	},
   11324 	{
   11325 		ARM_t2LDCL_PRE, ARM_INS_LDCL,
   11326 #ifndef CAPSTONE_DIET
   11327 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11328 #endif
   11329 	},
   11330 	{
   11331 		ARM_t2LDC_OFFSET, ARM_INS_LDC,
   11332 #ifndef CAPSTONE_DIET
   11333 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11334 #endif
   11335 	},
   11336 	{
   11337 		ARM_t2LDC_OPTION, ARM_INS_LDC,
   11338 #ifndef CAPSTONE_DIET
   11339 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11340 #endif
   11341 	},
   11342 	{
   11343 		ARM_t2LDC_POST, ARM_INS_LDC,
   11344 #ifndef CAPSTONE_DIET
   11345 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11346 #endif
   11347 	},
   11348 	{
   11349 		ARM_t2LDC_PRE, ARM_INS_LDC,
   11350 #ifndef CAPSTONE_DIET
   11351 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11352 #endif
   11353 	},
   11354 	{
   11355 		ARM_t2LDMDB, ARM_INS_LDMDB,
   11356 #ifndef CAPSTONE_DIET
   11357 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11358 #endif
   11359 	},
   11360 	{
   11361 		ARM_t2LDMDB_UPD, ARM_INS_LDMDB,
   11362 #ifndef CAPSTONE_DIET
   11363 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11364 #endif
   11365 	},
   11366 	{
   11367 		ARM_t2LDMIA, ARM_INS_LDM,
   11368 #ifndef CAPSTONE_DIET
   11369 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11370 #endif
   11371 	},
   11372 	{
   11373 		ARM_t2LDMIA_UPD, ARM_INS_LDM,
   11374 #ifndef CAPSTONE_DIET
   11375 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11376 #endif
   11377 	},
   11378 	{
   11379 		ARM_t2LDRBT, ARM_INS_LDRBT,
   11380 #ifndef CAPSTONE_DIET
   11381 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11382 #endif
   11383 	},
   11384 	{
   11385 		ARM_t2LDRB_POST, ARM_INS_LDRB,
   11386 #ifndef CAPSTONE_DIET
   11387 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11388 #endif
   11389 	},
   11390 	{
   11391 		ARM_t2LDRB_PRE, ARM_INS_LDRB,
   11392 #ifndef CAPSTONE_DIET
   11393 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11394 #endif
   11395 	},
   11396 	{
   11397 		ARM_t2LDRBi12, ARM_INS_LDRB,
   11398 #ifndef CAPSTONE_DIET
   11399 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11400 #endif
   11401 	},
   11402 	{
   11403 		ARM_t2LDRBi8, ARM_INS_LDRB,
   11404 #ifndef CAPSTONE_DIET
   11405 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11406 #endif
   11407 	},
   11408 	{
   11409 		ARM_t2LDRBpci, ARM_INS_LDRB,
   11410 #ifndef CAPSTONE_DIET
   11411 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11412 #endif
   11413 	},
   11414 	{
   11415 		ARM_t2LDRBs, ARM_INS_LDRB,
   11416 #ifndef CAPSTONE_DIET
   11417 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11418 #endif
   11419 	},
   11420 	{
   11421 		ARM_t2LDRD_POST, ARM_INS_LDRD,
   11422 #ifndef CAPSTONE_DIET
   11423 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11424 #endif
   11425 	},
   11426 	{
   11427 		ARM_t2LDRD_PRE, ARM_INS_LDRD,
   11428 #ifndef CAPSTONE_DIET
   11429 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11430 #endif
   11431 	},
   11432 	{
   11433 		ARM_t2LDRDi8, ARM_INS_LDRD,
   11434 #ifndef CAPSTONE_DIET
   11435 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11436 #endif
   11437 	},
   11438 	{
   11439 		ARM_t2LDREX, ARM_INS_LDREX,
   11440 #ifndef CAPSTONE_DIET
   11441 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11442 #endif
   11443 	},
   11444 	{
   11445 		ARM_t2LDREXB, ARM_INS_LDREXB,
   11446 #ifndef CAPSTONE_DIET
   11447 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11448 #endif
   11449 	},
   11450 	{
   11451 		ARM_t2LDREXD, ARM_INS_LDREXD,
   11452 #ifndef CAPSTONE_DIET
   11453 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
   11454 #endif
   11455 	},
   11456 	{
   11457 		ARM_t2LDREXH, ARM_INS_LDREXH,
   11458 #ifndef CAPSTONE_DIET
   11459 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11460 #endif
   11461 	},
   11462 	{
   11463 		ARM_t2LDRHT, ARM_INS_LDRHT,
   11464 #ifndef CAPSTONE_DIET
   11465 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11466 #endif
   11467 	},
   11468 	{
   11469 		ARM_t2LDRH_POST, ARM_INS_LDRH,
   11470 #ifndef CAPSTONE_DIET
   11471 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11472 #endif
   11473 	},
   11474 	{
   11475 		ARM_t2LDRH_PRE, ARM_INS_LDRH,
   11476 #ifndef CAPSTONE_DIET
   11477 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11478 #endif
   11479 	},
   11480 	{
   11481 		ARM_t2LDRHi12, ARM_INS_LDRH,
   11482 #ifndef CAPSTONE_DIET
   11483 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11484 #endif
   11485 	},
   11486 	{
   11487 		ARM_t2LDRHi8, ARM_INS_LDRH,
   11488 #ifndef CAPSTONE_DIET
   11489 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11490 #endif
   11491 	},
   11492 	{
   11493 		ARM_t2LDRHpci, ARM_INS_LDRH,
   11494 #ifndef CAPSTONE_DIET
   11495 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11496 #endif
   11497 	},
   11498 	{
   11499 		ARM_t2LDRHs, ARM_INS_LDRH,
   11500 #ifndef CAPSTONE_DIET
   11501 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11502 #endif
   11503 	},
   11504 	{
   11505 		ARM_t2LDRSBT, ARM_INS_LDRSBT,
   11506 #ifndef CAPSTONE_DIET
   11507 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11508 #endif
   11509 	},
   11510 	{
   11511 		ARM_t2LDRSB_POST, ARM_INS_LDRSB,
   11512 #ifndef CAPSTONE_DIET
   11513 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11514 #endif
   11515 	},
   11516 	{
   11517 		ARM_t2LDRSB_PRE, ARM_INS_LDRSB,
   11518 #ifndef CAPSTONE_DIET
   11519 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11520 #endif
   11521 	},
   11522 	{
   11523 		ARM_t2LDRSBi12, ARM_INS_LDRSB,
   11524 #ifndef CAPSTONE_DIET
   11525 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11526 #endif
   11527 	},
   11528 	{
   11529 		ARM_t2LDRSBi8, ARM_INS_LDRSB,
   11530 #ifndef CAPSTONE_DIET
   11531 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11532 #endif
   11533 	},
   11534 	{
   11535 		ARM_t2LDRSBpci, ARM_INS_LDRSB,
   11536 #ifndef CAPSTONE_DIET
   11537 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11538 #endif
   11539 	},
   11540 	{
   11541 		ARM_t2LDRSBs, ARM_INS_LDRSB,
   11542 #ifndef CAPSTONE_DIET
   11543 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11544 #endif
   11545 	},
   11546 	{
   11547 		ARM_t2LDRSHT, ARM_INS_LDRSHT,
   11548 #ifndef CAPSTONE_DIET
   11549 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11550 #endif
   11551 	},
   11552 	{
   11553 		ARM_t2LDRSH_POST, ARM_INS_LDRSH,
   11554 #ifndef CAPSTONE_DIET
   11555 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11556 #endif
   11557 	},
   11558 	{
   11559 		ARM_t2LDRSH_PRE, ARM_INS_LDRSH,
   11560 #ifndef CAPSTONE_DIET
   11561 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11562 #endif
   11563 	},
   11564 	{
   11565 		ARM_t2LDRSHi12, ARM_INS_LDRSH,
   11566 #ifndef CAPSTONE_DIET
   11567 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11568 #endif
   11569 	},
   11570 	{
   11571 		ARM_t2LDRSHi8, ARM_INS_LDRSH,
   11572 #ifndef CAPSTONE_DIET
   11573 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11574 #endif
   11575 	},
   11576 	{
   11577 		ARM_t2LDRSHpci, ARM_INS_LDRSH,
   11578 #ifndef CAPSTONE_DIET
   11579 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11580 #endif
   11581 	},
   11582 	{
   11583 		ARM_t2LDRSHs, ARM_INS_LDRSH,
   11584 #ifndef CAPSTONE_DIET
   11585 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11586 #endif
   11587 	},
   11588 	{
   11589 		ARM_t2LDRT, ARM_INS_LDRT,
   11590 #ifndef CAPSTONE_DIET
   11591 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11592 #endif
   11593 	},
   11594 	{
   11595 		ARM_t2LDR_POST, ARM_INS_LDR,
   11596 #ifndef CAPSTONE_DIET
   11597 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11598 #endif
   11599 	},
   11600 	{
   11601 		ARM_t2LDR_PRE, ARM_INS_LDR,
   11602 #ifndef CAPSTONE_DIET
   11603 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11604 #endif
   11605 	},
   11606 	{
   11607 		ARM_t2LDRi12, ARM_INS_LDR,
   11608 #ifndef CAPSTONE_DIET
   11609 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11610 #endif
   11611 	},
   11612 	{
   11613 		ARM_t2LDRi8, ARM_INS_LDR,
   11614 #ifndef CAPSTONE_DIET
   11615 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11616 #endif
   11617 	},
   11618 	{
   11619 		ARM_t2LDRpci, ARM_INS_LDR,
   11620 #ifndef CAPSTONE_DIET
   11621 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11622 #endif
   11623 	},
   11624 	{
   11625 		ARM_t2LDRs, ARM_INS_LDR,
   11626 #ifndef CAPSTONE_DIET
   11627 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11628 #endif
   11629 	},
   11630 	{
   11631 		ARM_t2LSLri, ARM_INS_LSL,
   11632 #ifndef CAPSTONE_DIET
   11633 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11634 #endif
   11635 	},
   11636 	{
   11637 		ARM_t2LSLrr, ARM_INS_LSL,
   11638 #ifndef CAPSTONE_DIET
   11639 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11640 #endif
   11641 	},
   11642 	{
   11643 		ARM_t2LSRri, ARM_INS_LSR,
   11644 #ifndef CAPSTONE_DIET
   11645 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11646 #endif
   11647 	},
   11648 	{
   11649 		ARM_t2LSRrr, ARM_INS_LSR,
   11650 #ifndef CAPSTONE_DIET
   11651 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11652 #endif
   11653 	},
   11654 	{
   11655 		ARM_t2MCR, ARM_INS_MCR,
   11656 #ifndef CAPSTONE_DIET
   11657 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11658 #endif
   11659 	},
   11660 	{
   11661 		ARM_t2MCR2, ARM_INS_MCR2,
   11662 #ifndef CAPSTONE_DIET
   11663 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
   11664 #endif
   11665 	},
   11666 	{
   11667 		ARM_t2MCRR, ARM_INS_MCRR,
   11668 #ifndef CAPSTONE_DIET
   11669 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11670 #endif
   11671 	},
   11672 	{
   11673 		ARM_t2MCRR2, ARM_INS_MCRR2,
   11674 #ifndef CAPSTONE_DIET
   11675 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
   11676 #endif
   11677 	},
   11678 	{
   11679 		ARM_t2MLA, ARM_INS_MLA,
   11680 #ifndef CAPSTONE_DIET
   11681 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0
   11682 #endif
   11683 	},
   11684 	{
   11685 		ARM_t2MLS, ARM_INS_MLS,
   11686 #ifndef CAPSTONE_DIET
   11687 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_MULOPS, 0 }, 0, 0
   11688 #endif
   11689 	},
   11690 	{
   11691 		ARM_t2MOVTi16, ARM_INS_MOVT,
   11692 #ifndef CAPSTONE_DIET
   11693 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11694 #endif
   11695 	},
   11696 	{
   11697 		ARM_t2MOVi, ARM_INS_MOV,
   11698 #ifndef CAPSTONE_DIET
   11699 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11700 #endif
   11701 	},
   11702 	{
   11703 		ARM_t2MOVi16, ARM_INS_MOVW,
   11704 #ifndef CAPSTONE_DIET
   11705 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11706 #endif
   11707 	},
   11708 	{
   11709 		ARM_t2MOVr, ARM_INS_MOV,
   11710 #ifndef CAPSTONE_DIET
   11711 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11712 #endif
   11713 	},
   11714 	{
   11715 		ARM_t2MOVsra_flag, ARM_INS_ASR,
   11716 #ifndef CAPSTONE_DIET
   11717 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11718 #endif
   11719 	},
   11720 	{
   11721 		ARM_t2MOVsrl_flag, ARM_INS_LSR,
   11722 #ifndef CAPSTONE_DIET
   11723 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11724 #endif
   11725 	},
   11726 	{
   11727 		ARM_t2MRC, ARM_INS_MRC,
   11728 #ifndef CAPSTONE_DIET
   11729 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11730 #endif
   11731 	},
   11732 	{
   11733 		ARM_t2MRC2, ARM_INS_MRC2,
   11734 #ifndef CAPSTONE_DIET
   11735 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
   11736 #endif
   11737 	},
   11738 	{
   11739 		ARM_t2MRRC, ARM_INS_MRRC,
   11740 #ifndef CAPSTONE_DIET
   11741 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11742 #endif
   11743 	},
   11744 	{
   11745 		ARM_t2MRRC2, ARM_INS_MRRC2,
   11746 #ifndef CAPSTONE_DIET
   11747 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_PREV8, 0 }, 0, 0
   11748 #endif
   11749 	},
   11750 	{
   11751 		ARM_t2MRS_AR, ARM_INS_MRS,
   11752 #ifndef CAPSTONE_DIET
   11753 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
   11754 #endif
   11755 	},
   11756 	{
   11757 		ARM_t2MRS_M, ARM_INS_MRS,
   11758 #ifndef CAPSTONE_DIET
   11759 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0
   11760 #endif
   11761 	},
   11762 	{
   11763 		ARM_t2MRSsys_AR, ARM_INS_MRS,
   11764 #ifndef CAPSTONE_DIET
   11765 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
   11766 #endif
   11767 	},
   11768 	{
   11769 		ARM_t2MSR_AR, ARM_INS_MSR,
   11770 #ifndef CAPSTONE_DIET
   11771 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
   11772 #endif
   11773 	},
   11774 	{
   11775 		ARM_t2MSR_M, ARM_INS_MSR,
   11776 #ifndef CAPSTONE_DIET
   11777 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_MCLASS, 0 }, 0, 0
   11778 #endif
   11779 	},
   11780 	{
   11781 		ARM_t2MUL, ARM_INS_MUL,
   11782 #ifndef CAPSTONE_DIET
   11783 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11784 #endif
   11785 	},
   11786 	{
   11787 		ARM_t2MVNi, ARM_INS_MVN,
   11788 #ifndef CAPSTONE_DIET
   11789 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11790 #endif
   11791 	},
   11792 	{
   11793 		ARM_t2MVNr, ARM_INS_MVN,
   11794 #ifndef CAPSTONE_DIET
   11795 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11796 #endif
   11797 	},
   11798 	{
   11799 		ARM_t2MVNs, ARM_INS_MVN,
   11800 #ifndef CAPSTONE_DIET
   11801 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11802 #endif
   11803 	},
   11804 	{
   11805 		ARM_t2ORNri, ARM_INS_ORN,
   11806 #ifndef CAPSTONE_DIET
   11807 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11808 #endif
   11809 	},
   11810 	{
   11811 		ARM_t2ORNrr, ARM_INS_ORN,
   11812 #ifndef CAPSTONE_DIET
   11813 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11814 #endif
   11815 	},
   11816 	{
   11817 		ARM_t2ORNrs, ARM_INS_ORN,
   11818 #ifndef CAPSTONE_DIET
   11819 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11820 #endif
   11821 	},
   11822 	{
   11823 		ARM_t2ORRri, ARM_INS_ORR,
   11824 #ifndef CAPSTONE_DIET
   11825 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11826 #endif
   11827 	},
   11828 	{
   11829 		ARM_t2ORRrr, ARM_INS_ORR,
   11830 #ifndef CAPSTONE_DIET
   11831 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11832 #endif
   11833 	},
   11834 	{
   11835 		ARM_t2ORRrs, ARM_INS_ORR,
   11836 #ifndef CAPSTONE_DIET
   11837 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11838 #endif
   11839 	},
   11840 	{
   11841 		ARM_t2PKHBT, ARM_INS_PKHBT,
   11842 #ifndef CAPSTONE_DIET
   11843 		{ 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
   11844 #endif
   11845 	},
   11846 	{
   11847 		ARM_t2PKHTB, ARM_INS_PKHTB,
   11848 #ifndef CAPSTONE_DIET
   11849 		{ 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
   11850 #endif
   11851 	},
   11852 	{
   11853 		ARM_t2PLDWi12, ARM_INS_PLDW,
   11854 #ifndef CAPSTONE_DIET
   11855 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
   11856 #endif
   11857 	},
   11858 	{
   11859 		ARM_t2PLDWi8, ARM_INS_PLDW,
   11860 #ifndef CAPSTONE_DIET
   11861 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
   11862 #endif
   11863 	},
   11864 	{
   11865 		ARM_t2PLDWs, ARM_INS_PLDW,
   11866 #ifndef CAPSTONE_DIET
   11867 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, ARM_GRP_MULTPRO, 0 }, 0, 0
   11868 #endif
   11869 	},
   11870 	{
   11871 		ARM_t2PLDi12, ARM_INS_PLD,
   11872 #ifndef CAPSTONE_DIET
   11873 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11874 #endif
   11875 	},
   11876 	{
   11877 		ARM_t2PLDi8, ARM_INS_PLD,
   11878 #ifndef CAPSTONE_DIET
   11879 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11880 #endif
   11881 	},
   11882 	{
   11883 		ARM_t2PLDpci, ARM_INS_PLD,
   11884 #ifndef CAPSTONE_DIET
   11885 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11886 #endif
   11887 	},
   11888 	{
   11889 		ARM_t2PLDs, ARM_INS_PLD,
   11890 #ifndef CAPSTONE_DIET
   11891 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11892 #endif
   11893 	},
   11894 	{
   11895 		ARM_t2PLIi12, ARM_INS_PLI,
   11896 #ifndef CAPSTONE_DIET
   11897 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
   11898 #endif
   11899 	},
   11900 	{
   11901 		ARM_t2PLIi8, ARM_INS_PLI,
   11902 #ifndef CAPSTONE_DIET
   11903 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
   11904 #endif
   11905 	},
   11906 	{
   11907 		ARM_t2PLIpci, ARM_INS_PLI,
   11908 #ifndef CAPSTONE_DIET
   11909 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
   11910 #endif
   11911 	},
   11912 	{
   11913 		ARM_t2PLIs, ARM_INS_PLI,
   11914 #ifndef CAPSTONE_DIET
   11915 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_V7, 0 }, 0, 0
   11916 #endif
   11917 	},
   11918 	{
   11919 		ARM_t2QADD, ARM_INS_QADD,
   11920 #ifndef CAPSTONE_DIET
   11921 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11922 #endif
   11923 	},
   11924 	{
   11925 		ARM_t2QADD16, ARM_INS_QADD16,
   11926 #ifndef CAPSTONE_DIET
   11927 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11928 #endif
   11929 	},
   11930 	{
   11931 		ARM_t2QADD8, ARM_INS_QADD8,
   11932 #ifndef CAPSTONE_DIET
   11933 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11934 #endif
   11935 	},
   11936 	{
   11937 		ARM_t2QASX, ARM_INS_QASX,
   11938 #ifndef CAPSTONE_DIET
   11939 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11940 #endif
   11941 	},
   11942 	{
   11943 		ARM_t2QDADD, ARM_INS_QDADD,
   11944 #ifndef CAPSTONE_DIET
   11945 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11946 #endif
   11947 	},
   11948 	{
   11949 		ARM_t2QDSUB, ARM_INS_QDSUB,
   11950 #ifndef CAPSTONE_DIET
   11951 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11952 #endif
   11953 	},
   11954 	{
   11955 		ARM_t2QSAX, ARM_INS_QSAX,
   11956 #ifndef CAPSTONE_DIET
   11957 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11958 #endif
   11959 	},
   11960 	{
   11961 		ARM_t2QSUB, ARM_INS_QSUB,
   11962 #ifndef CAPSTONE_DIET
   11963 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11964 #endif
   11965 	},
   11966 	{
   11967 		ARM_t2QSUB16, ARM_INS_QSUB16,
   11968 #ifndef CAPSTONE_DIET
   11969 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11970 #endif
   11971 	},
   11972 	{
   11973 		ARM_t2QSUB8, ARM_INS_QSUB8,
   11974 #ifndef CAPSTONE_DIET
   11975 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   11976 #endif
   11977 	},
   11978 	{
   11979 		ARM_t2RBIT, ARM_INS_RBIT,
   11980 #ifndef CAPSTONE_DIET
   11981 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11982 #endif
   11983 	},
   11984 	{
   11985 		ARM_t2REV, ARM_INS_REV,
   11986 #ifndef CAPSTONE_DIET
   11987 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11988 #endif
   11989 	},
   11990 	{
   11991 		ARM_t2REV16, ARM_INS_REV16,
   11992 #ifndef CAPSTONE_DIET
   11993 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   11994 #endif
   11995 	},
   11996 	{
   11997 		ARM_t2REVSH, ARM_INS_REVSH,
   11998 #ifndef CAPSTONE_DIET
   11999 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12000 #endif
   12001 	},
   12002 	{
   12003 		ARM_t2RFEDB, ARM_INS_RFEDB,
   12004 #ifndef CAPSTONE_DIET
   12005 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12006 #endif
   12007 	},
   12008 	{
   12009 		ARM_t2RFEDBW, ARM_INS_RFEDB,
   12010 #ifndef CAPSTONE_DIET
   12011 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12012 #endif
   12013 	},
   12014 	{
   12015 		ARM_t2RFEIA, ARM_INS_RFEIA,
   12016 #ifndef CAPSTONE_DIET
   12017 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12018 #endif
   12019 	},
   12020 	{
   12021 		ARM_t2RFEIAW, ARM_INS_RFEIA,
   12022 #ifndef CAPSTONE_DIET
   12023 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12024 #endif
   12025 	},
   12026 	{
   12027 		ARM_t2RORri, ARM_INS_ROR,
   12028 #ifndef CAPSTONE_DIET
   12029 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12030 #endif
   12031 	},
   12032 	{
   12033 		ARM_t2RORrr, ARM_INS_ROR,
   12034 #ifndef CAPSTONE_DIET
   12035 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12036 #endif
   12037 	},
   12038 	{
   12039 		ARM_t2RRX, ARM_INS_RRX,
   12040 #ifndef CAPSTONE_DIET
   12041 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12042 #endif
   12043 	},
   12044 	{
   12045 		ARM_t2RSBri, ARM_INS_RSB,
   12046 #ifndef CAPSTONE_DIET
   12047 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12048 #endif
   12049 	},
   12050 	{
   12051 		ARM_t2RSBrr, ARM_INS_RSB,
   12052 #ifndef CAPSTONE_DIET
   12053 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12054 #endif
   12055 	},
   12056 	{
   12057 		ARM_t2RSBrs, ARM_INS_RSB,
   12058 #ifndef CAPSTONE_DIET
   12059 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12060 #endif
   12061 	},
   12062 	{
   12063 		ARM_t2SADD16, ARM_INS_SADD16,
   12064 #ifndef CAPSTONE_DIET
   12065 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12066 #endif
   12067 	},
   12068 	{
   12069 		ARM_t2SADD8, ARM_INS_SADD8,
   12070 #ifndef CAPSTONE_DIET
   12071 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12072 #endif
   12073 	},
   12074 	{
   12075 		ARM_t2SASX, ARM_INS_SASX,
   12076 #ifndef CAPSTONE_DIET
   12077 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12078 #endif
   12079 	},
   12080 	{
   12081 		ARM_t2SBCri, ARM_INS_SBC,
   12082 #ifndef CAPSTONE_DIET
   12083 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12084 #endif
   12085 	},
   12086 	{
   12087 		ARM_t2SBCrr, ARM_INS_SBC,
   12088 #ifndef CAPSTONE_DIET
   12089 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12090 #endif
   12091 	},
   12092 	{
   12093 		ARM_t2SBCrs, ARM_INS_SBC,
   12094 #ifndef CAPSTONE_DIET
   12095 		{ ARM_REG_CPSR, 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12096 #endif
   12097 	},
   12098 	{
   12099 		ARM_t2SBFX, ARM_INS_SBFX,
   12100 #ifndef CAPSTONE_DIET
   12101 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12102 #endif
   12103 	},
   12104 	{
   12105 		ARM_t2SDIV, ARM_INS_SDIV,
   12106 #ifndef CAPSTONE_DIET
   12107 		{ 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0
   12108 #endif
   12109 	},
   12110 	{
   12111 		ARM_t2SEL, ARM_INS_SEL,
   12112 #ifndef CAPSTONE_DIET
   12113 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12114 #endif
   12115 	},
   12116 	{
   12117 		ARM_t2SHADD16, ARM_INS_SHADD16,
   12118 #ifndef CAPSTONE_DIET
   12119 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12120 #endif
   12121 	},
   12122 	{
   12123 		ARM_t2SHADD8, ARM_INS_SHADD8,
   12124 #ifndef CAPSTONE_DIET
   12125 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12126 #endif
   12127 	},
   12128 	{
   12129 		ARM_t2SHASX, ARM_INS_SHASX,
   12130 #ifndef CAPSTONE_DIET
   12131 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12132 #endif
   12133 	},
   12134 	{
   12135 		ARM_t2SHSAX, ARM_INS_SHSAX,
   12136 #ifndef CAPSTONE_DIET
   12137 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12138 #endif
   12139 	},
   12140 	{
   12141 		ARM_t2SHSUB16, ARM_INS_SHSUB16,
   12142 #ifndef CAPSTONE_DIET
   12143 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12144 #endif
   12145 	},
   12146 	{
   12147 		ARM_t2SHSUB8, ARM_INS_SHSUB8,
   12148 #ifndef CAPSTONE_DIET
   12149 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12150 #endif
   12151 	},
   12152 	{
   12153 		ARM_t2SMC, ARM_INS_SMC,
   12154 #ifndef CAPSTONE_DIET
   12155 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_TRUSTZONE, 0 }, 0, 0
   12156 #endif
   12157 	},
   12158 	{
   12159 		ARM_t2SMLABB, ARM_INS_SMLABB,
   12160 #ifndef CAPSTONE_DIET
   12161 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12162 #endif
   12163 	},
   12164 	{
   12165 		ARM_t2SMLABT, ARM_INS_SMLABT,
   12166 #ifndef CAPSTONE_DIET
   12167 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12168 #endif
   12169 	},
   12170 	{
   12171 		ARM_t2SMLAD, ARM_INS_SMLAD,
   12172 #ifndef CAPSTONE_DIET
   12173 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12174 #endif
   12175 	},
   12176 	{
   12177 		ARM_t2SMLADX, ARM_INS_SMLADX,
   12178 #ifndef CAPSTONE_DIET
   12179 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12180 #endif
   12181 	},
   12182 	{
   12183 		ARM_t2SMLAL, ARM_INS_SMLAL,
   12184 #ifndef CAPSTONE_DIET
   12185 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12186 #endif
   12187 	},
   12188 	{
   12189 		ARM_t2SMLALBB, ARM_INS_SMLALBB,
   12190 #ifndef CAPSTONE_DIET
   12191 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12192 #endif
   12193 	},
   12194 	{
   12195 		ARM_t2SMLALBT, ARM_INS_SMLALBT,
   12196 #ifndef CAPSTONE_DIET
   12197 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12198 #endif
   12199 	},
   12200 	{
   12201 		ARM_t2SMLALD, ARM_INS_SMLALD,
   12202 #ifndef CAPSTONE_DIET
   12203 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12204 #endif
   12205 	},
   12206 	{
   12207 		ARM_t2SMLALDX, ARM_INS_SMLALDX,
   12208 #ifndef CAPSTONE_DIET
   12209 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12210 #endif
   12211 	},
   12212 	{
   12213 		ARM_t2SMLALTB, ARM_INS_SMLALTB,
   12214 #ifndef CAPSTONE_DIET
   12215 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12216 #endif
   12217 	},
   12218 	{
   12219 		ARM_t2SMLALTT, ARM_INS_SMLALTT,
   12220 #ifndef CAPSTONE_DIET
   12221 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12222 #endif
   12223 	},
   12224 	{
   12225 		ARM_t2SMLATB, ARM_INS_SMLATB,
   12226 #ifndef CAPSTONE_DIET
   12227 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12228 #endif
   12229 	},
   12230 	{
   12231 		ARM_t2SMLATT, ARM_INS_SMLATT,
   12232 #ifndef CAPSTONE_DIET
   12233 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12234 #endif
   12235 	},
   12236 	{
   12237 		ARM_t2SMLAWB, ARM_INS_SMLAWB,
   12238 #ifndef CAPSTONE_DIET
   12239 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12240 #endif
   12241 	},
   12242 	{
   12243 		ARM_t2SMLAWT, ARM_INS_SMLAWT,
   12244 #ifndef CAPSTONE_DIET
   12245 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12246 #endif
   12247 	},
   12248 	{
   12249 		ARM_t2SMLSD, ARM_INS_SMLSD,
   12250 #ifndef CAPSTONE_DIET
   12251 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12252 #endif
   12253 	},
   12254 	{
   12255 		ARM_t2SMLSDX, ARM_INS_SMLSDX,
   12256 #ifndef CAPSTONE_DIET
   12257 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12258 #endif
   12259 	},
   12260 	{
   12261 		ARM_t2SMLSLD, ARM_INS_SMLSLD,
   12262 #ifndef CAPSTONE_DIET
   12263 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12264 #endif
   12265 	},
   12266 	{
   12267 		ARM_t2SMLSLDX, ARM_INS_SMLSLDX,
   12268 #ifndef CAPSTONE_DIET
   12269 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12270 #endif
   12271 	},
   12272 	{
   12273 		ARM_t2SMMLA, ARM_INS_SMMLA,
   12274 #ifndef CAPSTONE_DIET
   12275 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12276 #endif
   12277 	},
   12278 	{
   12279 		ARM_t2SMMLAR, ARM_INS_SMMLAR,
   12280 #ifndef CAPSTONE_DIET
   12281 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12282 #endif
   12283 	},
   12284 	{
   12285 		ARM_t2SMMLS, ARM_INS_SMMLS,
   12286 #ifndef CAPSTONE_DIET
   12287 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, ARM_GRP_MULOPS, 0 }, 0, 0
   12288 #endif
   12289 	},
   12290 	{
   12291 		ARM_t2SMMLSR, ARM_INS_SMMLSR,
   12292 #ifndef CAPSTONE_DIET
   12293 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12294 #endif
   12295 	},
   12296 	{
   12297 		ARM_t2SMMUL, ARM_INS_SMMUL,
   12298 #ifndef CAPSTONE_DIET
   12299 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12300 #endif
   12301 	},
   12302 	{
   12303 		ARM_t2SMMULR, ARM_INS_SMMULR,
   12304 #ifndef CAPSTONE_DIET
   12305 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12306 #endif
   12307 	},
   12308 	{
   12309 		ARM_t2SMUAD, ARM_INS_SMUAD,
   12310 #ifndef CAPSTONE_DIET
   12311 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12312 #endif
   12313 	},
   12314 	{
   12315 		ARM_t2SMUADX, ARM_INS_SMUADX,
   12316 #ifndef CAPSTONE_DIET
   12317 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12318 #endif
   12319 	},
   12320 	{
   12321 		ARM_t2SMULBB, ARM_INS_SMULBB,
   12322 #ifndef CAPSTONE_DIET
   12323 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12324 #endif
   12325 	},
   12326 	{
   12327 		ARM_t2SMULBT, ARM_INS_SMULBT,
   12328 #ifndef CAPSTONE_DIET
   12329 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12330 #endif
   12331 	},
   12332 	{
   12333 		ARM_t2SMULL, ARM_INS_SMULL,
   12334 #ifndef CAPSTONE_DIET
   12335 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12336 #endif
   12337 	},
   12338 	{
   12339 		ARM_t2SMULTB, ARM_INS_SMULTB,
   12340 #ifndef CAPSTONE_DIET
   12341 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12342 #endif
   12343 	},
   12344 	{
   12345 		ARM_t2SMULTT, ARM_INS_SMULTT,
   12346 #ifndef CAPSTONE_DIET
   12347 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12348 #endif
   12349 	},
   12350 	{
   12351 		ARM_t2SMULWB, ARM_INS_SMULWB,
   12352 #ifndef CAPSTONE_DIET
   12353 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12354 #endif
   12355 	},
   12356 	{
   12357 		ARM_t2SMULWT, ARM_INS_SMULWT,
   12358 #ifndef CAPSTONE_DIET
   12359 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12360 #endif
   12361 	},
   12362 	{
   12363 		ARM_t2SMUSD, ARM_INS_SMUSD,
   12364 #ifndef CAPSTONE_DIET
   12365 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12366 #endif
   12367 	},
   12368 	{
   12369 		ARM_t2SMUSDX, ARM_INS_SMUSDX,
   12370 #ifndef CAPSTONE_DIET
   12371 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12372 #endif
   12373 	},
   12374 	{
   12375 		ARM_t2SRSDB, ARM_INS_SRSDB,
   12376 #ifndef CAPSTONE_DIET
   12377 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12378 #endif
   12379 	},
   12380 	{
   12381 		ARM_t2SRSDB_UPD, ARM_INS_SRSDB,
   12382 #ifndef CAPSTONE_DIET
   12383 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12384 #endif
   12385 	},
   12386 	{
   12387 		ARM_t2SRSIA, ARM_INS_SRSIA,
   12388 #ifndef CAPSTONE_DIET
   12389 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12390 #endif
   12391 	},
   12392 	{
   12393 		ARM_t2SRSIA_UPD, ARM_INS_SRSIA,
   12394 #ifndef CAPSTONE_DIET
   12395 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12396 #endif
   12397 	},
   12398 	{
   12399 		ARM_t2SSAT, ARM_INS_SSAT,
   12400 #ifndef CAPSTONE_DIET
   12401 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12402 #endif
   12403 	},
   12404 	{
   12405 		ARM_t2SSAT16, ARM_INS_SSAT16,
   12406 #ifndef CAPSTONE_DIET
   12407 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12408 #endif
   12409 	},
   12410 	{
   12411 		ARM_t2SSAX, ARM_INS_SSAX,
   12412 #ifndef CAPSTONE_DIET
   12413 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12414 #endif
   12415 	},
   12416 	{
   12417 		ARM_t2SSUB16, ARM_INS_SSUB16,
   12418 #ifndef CAPSTONE_DIET
   12419 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12420 #endif
   12421 	},
   12422 	{
   12423 		ARM_t2SSUB8, ARM_INS_SSUB8,
   12424 #ifndef CAPSTONE_DIET
   12425 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12426 #endif
   12427 	},
   12428 	{
   12429 		ARM_t2STC2L_OFFSET, ARM_INS_STC2L,
   12430 #ifndef CAPSTONE_DIET
   12431 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12432 #endif
   12433 	},
   12434 	{
   12435 		ARM_t2STC2L_OPTION, ARM_INS_STC2L,
   12436 #ifndef CAPSTONE_DIET
   12437 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12438 #endif
   12439 	},
   12440 	{
   12441 		ARM_t2STC2L_POST, ARM_INS_STC2L,
   12442 #ifndef CAPSTONE_DIET
   12443 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12444 #endif
   12445 	},
   12446 	{
   12447 		ARM_t2STC2L_PRE, ARM_INS_STC2L,
   12448 #ifndef CAPSTONE_DIET
   12449 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12450 #endif
   12451 	},
   12452 	{
   12453 		ARM_t2STC2_OFFSET, ARM_INS_STC2,
   12454 #ifndef CAPSTONE_DIET
   12455 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12456 #endif
   12457 	},
   12458 	{
   12459 		ARM_t2STC2_OPTION, ARM_INS_STC2,
   12460 #ifndef CAPSTONE_DIET
   12461 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12462 #endif
   12463 	},
   12464 	{
   12465 		ARM_t2STC2_POST, ARM_INS_STC2,
   12466 #ifndef CAPSTONE_DIET
   12467 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12468 #endif
   12469 	},
   12470 	{
   12471 		ARM_t2STC2_PRE, ARM_INS_STC2,
   12472 #ifndef CAPSTONE_DIET
   12473 		{ 0 }, { 0 }, { ARM_GRP_PREV8, ARM_GRP_THUMB2, 0 }, 0, 0
   12474 #endif
   12475 	},
   12476 	{
   12477 		ARM_t2STCL_OFFSET, ARM_INS_STCL,
   12478 #ifndef CAPSTONE_DIET
   12479 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12480 #endif
   12481 	},
   12482 	{
   12483 		ARM_t2STCL_OPTION, ARM_INS_STCL,
   12484 #ifndef CAPSTONE_DIET
   12485 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12486 #endif
   12487 	},
   12488 	{
   12489 		ARM_t2STCL_POST, ARM_INS_STCL,
   12490 #ifndef CAPSTONE_DIET
   12491 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12492 #endif
   12493 	},
   12494 	{
   12495 		ARM_t2STCL_PRE, ARM_INS_STCL,
   12496 #ifndef CAPSTONE_DIET
   12497 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12498 #endif
   12499 	},
   12500 	{
   12501 		ARM_t2STC_OFFSET, ARM_INS_STC,
   12502 #ifndef CAPSTONE_DIET
   12503 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12504 #endif
   12505 	},
   12506 	{
   12507 		ARM_t2STC_OPTION, ARM_INS_STC,
   12508 #ifndef CAPSTONE_DIET
   12509 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12510 #endif
   12511 	},
   12512 	{
   12513 		ARM_t2STC_POST, ARM_INS_STC,
   12514 #ifndef CAPSTONE_DIET
   12515 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12516 #endif
   12517 	},
   12518 	{
   12519 		ARM_t2STC_PRE, ARM_INS_STC,
   12520 #ifndef CAPSTONE_DIET
   12521 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12522 #endif
   12523 	},
   12524 	{
   12525 		ARM_t2STL, ARM_INS_STL,
   12526 #ifndef CAPSTONE_DIET
   12527 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   12528 #endif
   12529 	},
   12530 	{
   12531 		ARM_t2STLB, ARM_INS_STLB,
   12532 #ifndef CAPSTONE_DIET
   12533 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   12534 #endif
   12535 	},
   12536 	{
   12537 		ARM_t2STLEX, ARM_INS_STLEX,
   12538 #ifndef CAPSTONE_DIET
   12539 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   12540 #endif
   12541 	},
   12542 	{
   12543 		ARM_t2STLEXB, ARM_INS_STLEXB,
   12544 #ifndef CAPSTONE_DIET
   12545 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   12546 #endif
   12547 	},
   12548 	{
   12549 		ARM_t2STLEXD, ARM_INS_STLEXD,
   12550 #ifndef CAPSTONE_DIET
   12551 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   12552 #endif
   12553 	},
   12554 	{
   12555 		ARM_t2STLEXH, ARM_INS_STLEXH,
   12556 #ifndef CAPSTONE_DIET
   12557 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   12558 #endif
   12559 	},
   12560 	{
   12561 		ARM_t2STLH, ARM_INS_STLH,
   12562 #ifndef CAPSTONE_DIET
   12563 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   12564 #endif
   12565 	},
   12566 	{
   12567 		ARM_t2STMDB, ARM_INS_STMDB,
   12568 #ifndef CAPSTONE_DIET
   12569 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12570 #endif
   12571 	},
   12572 	{
   12573 		ARM_t2STMDB_UPD, ARM_INS_STMDB,
   12574 #ifndef CAPSTONE_DIET
   12575 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12576 #endif
   12577 	},
   12578 	{
   12579 		ARM_t2STMIA, ARM_INS_STM,
   12580 #ifndef CAPSTONE_DIET
   12581 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12582 #endif
   12583 	},
   12584 	{
   12585 		ARM_t2STMIA_UPD, ARM_INS_STM,
   12586 #ifndef CAPSTONE_DIET
   12587 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12588 #endif
   12589 	},
   12590 	{
   12591 		ARM_t2STRBT, ARM_INS_STRBT,
   12592 #ifndef CAPSTONE_DIET
   12593 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12594 #endif
   12595 	},
   12596 	{
   12597 		ARM_t2STRB_POST, ARM_INS_STRB,
   12598 #ifndef CAPSTONE_DIET
   12599 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12600 #endif
   12601 	},
   12602 	{
   12603 		ARM_t2STRB_PRE, ARM_INS_STRB,
   12604 #ifndef CAPSTONE_DIET
   12605 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12606 #endif
   12607 	},
   12608 	{
   12609 		ARM_t2STRBi12, ARM_INS_STRB,
   12610 #ifndef CAPSTONE_DIET
   12611 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12612 #endif
   12613 	},
   12614 	{
   12615 		ARM_t2STRBi8, ARM_INS_STRB,
   12616 #ifndef CAPSTONE_DIET
   12617 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12618 #endif
   12619 	},
   12620 	{
   12621 		ARM_t2STRBs, ARM_INS_STRB,
   12622 #ifndef CAPSTONE_DIET
   12623 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12624 #endif
   12625 	},
   12626 	{
   12627 		ARM_t2STRD_POST, ARM_INS_STRD,
   12628 #ifndef CAPSTONE_DIET
   12629 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12630 #endif
   12631 	},
   12632 	{
   12633 		ARM_t2STRD_PRE, ARM_INS_STRD,
   12634 #ifndef CAPSTONE_DIET
   12635 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12636 #endif
   12637 	},
   12638 	{
   12639 		ARM_t2STRDi8, ARM_INS_STRD,
   12640 #ifndef CAPSTONE_DIET
   12641 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12642 #endif
   12643 	},
   12644 	{
   12645 		ARM_t2STREX, ARM_INS_STREX,
   12646 #ifndef CAPSTONE_DIET
   12647 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12648 #endif
   12649 	},
   12650 	{
   12651 		ARM_t2STREXB, ARM_INS_STREXB,
   12652 #ifndef CAPSTONE_DIET
   12653 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12654 #endif
   12655 	},
   12656 	{
   12657 		ARM_t2STREXD, ARM_INS_STREXD,
   12658 #ifndef CAPSTONE_DIET
   12659 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_NOTMCLASS, 0 }, 0, 0
   12660 #endif
   12661 	},
   12662 	{
   12663 		ARM_t2STREXH, ARM_INS_STREXH,
   12664 #ifndef CAPSTONE_DIET
   12665 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12666 #endif
   12667 	},
   12668 	{
   12669 		ARM_t2STRHT, ARM_INS_STRHT,
   12670 #ifndef CAPSTONE_DIET
   12671 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12672 #endif
   12673 	},
   12674 	{
   12675 		ARM_t2STRH_POST, ARM_INS_STRH,
   12676 #ifndef CAPSTONE_DIET
   12677 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12678 #endif
   12679 	},
   12680 	{
   12681 		ARM_t2STRH_PRE, ARM_INS_STRH,
   12682 #ifndef CAPSTONE_DIET
   12683 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12684 #endif
   12685 	},
   12686 	{
   12687 		ARM_t2STRHi12, ARM_INS_STRH,
   12688 #ifndef CAPSTONE_DIET
   12689 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12690 #endif
   12691 	},
   12692 	{
   12693 		ARM_t2STRHi8, ARM_INS_STRH,
   12694 #ifndef CAPSTONE_DIET
   12695 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12696 #endif
   12697 	},
   12698 	{
   12699 		ARM_t2STRHs, ARM_INS_STRH,
   12700 #ifndef CAPSTONE_DIET
   12701 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12702 #endif
   12703 	},
   12704 	{
   12705 		ARM_t2STRT, ARM_INS_STRT,
   12706 #ifndef CAPSTONE_DIET
   12707 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12708 #endif
   12709 	},
   12710 	{
   12711 		ARM_t2STR_POST, ARM_INS_STR,
   12712 #ifndef CAPSTONE_DIET
   12713 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12714 #endif
   12715 	},
   12716 	{
   12717 		ARM_t2STR_PRE, ARM_INS_STR,
   12718 #ifndef CAPSTONE_DIET
   12719 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12720 #endif
   12721 	},
   12722 	{
   12723 		ARM_t2STRi12, ARM_INS_STR,
   12724 #ifndef CAPSTONE_DIET
   12725 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12726 #endif
   12727 	},
   12728 	{
   12729 		ARM_t2STRi8, ARM_INS_STR,
   12730 #ifndef CAPSTONE_DIET
   12731 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12732 #endif
   12733 	},
   12734 	{
   12735 		ARM_t2STRs, ARM_INS_STR,
   12736 #ifndef CAPSTONE_DIET
   12737 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12738 #endif
   12739 	},
   12740 	{
   12741 		ARM_t2SUBS_PC_LR, ARM_INS_SUB,
   12742 #ifndef CAPSTONE_DIET
   12743 		{ 0 }, { ARM_REG_PC, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12744 #endif
   12745 	},
   12746 	{
   12747 		ARM_t2SUBri, ARM_INS_SUB,
   12748 #ifndef CAPSTONE_DIET
   12749 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12750 #endif
   12751 	},
   12752 	{
   12753 		ARM_t2SUBri12, ARM_INS_SUBW,
   12754 #ifndef CAPSTONE_DIET
   12755 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12756 #endif
   12757 	},
   12758 	{
   12759 		ARM_t2SUBrr, ARM_INS_SUB,
   12760 #ifndef CAPSTONE_DIET
   12761 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12762 #endif
   12763 	},
   12764 	{
   12765 		ARM_t2SUBrs, ARM_INS_SUB,
   12766 #ifndef CAPSTONE_DIET
   12767 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12768 #endif
   12769 	},
   12770 	{
   12771 		ARM_t2SXTAB, ARM_INS_SXTAB,
   12772 #ifndef CAPSTONE_DIET
   12773 		{ 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
   12774 #endif
   12775 	},
   12776 	{
   12777 		ARM_t2SXTAB16, ARM_INS_SXTAB16,
   12778 #ifndef CAPSTONE_DIET
   12779 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12780 #endif
   12781 	},
   12782 	{
   12783 		ARM_t2SXTAH, ARM_INS_SXTAH,
   12784 #ifndef CAPSTONE_DIET
   12785 		{ 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
   12786 #endif
   12787 	},
   12788 	{
   12789 		ARM_t2SXTB, ARM_INS_SXTB,
   12790 #ifndef CAPSTONE_DIET
   12791 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12792 #endif
   12793 	},
   12794 	{
   12795 		ARM_t2SXTB16, ARM_INS_SXTB16,
   12796 #ifndef CAPSTONE_DIET
   12797 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_T2EXTRACTPACK, 0 }, 0, 0
   12798 #endif
   12799 	},
   12800 	{
   12801 		ARM_t2SXTH, ARM_INS_SXTH,
   12802 #ifndef CAPSTONE_DIET
   12803 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12804 #endif
   12805 	},
   12806 	{
   12807 		ARM_t2TBB, ARM_INS_TBB,
   12808 #ifndef CAPSTONE_DIET
   12809 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 1
   12810 #endif
   12811 	},
   12812 	{
   12813 		ARM_t2TBH, ARM_INS_TBH,
   12814 #ifndef CAPSTONE_DIET
   12815 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 1
   12816 #endif
   12817 	},
   12818 	{
   12819 		ARM_t2TEQri, ARM_INS_TEQ,
   12820 #ifndef CAPSTONE_DIET
   12821 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12822 #endif
   12823 	},
   12824 	{
   12825 		ARM_t2TEQrr, ARM_INS_TEQ,
   12826 #ifndef CAPSTONE_DIET
   12827 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12828 #endif
   12829 	},
   12830 	{
   12831 		ARM_t2TEQrs, ARM_INS_TEQ,
   12832 #ifndef CAPSTONE_DIET
   12833 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12834 #endif
   12835 	},
   12836 	{
   12837 		ARM_t2TSTri, ARM_INS_TST,
   12838 #ifndef CAPSTONE_DIET
   12839 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12840 #endif
   12841 	},
   12842 	{
   12843 		ARM_t2TSTrr, ARM_INS_TST,
   12844 #ifndef CAPSTONE_DIET
   12845 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12846 #endif
   12847 	},
   12848 	{
   12849 		ARM_t2TSTrs, ARM_INS_TST,
   12850 #ifndef CAPSTONE_DIET
   12851 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12852 #endif
   12853 	},
   12854 	{
   12855 		ARM_t2UADD16, ARM_INS_UADD16,
   12856 #ifndef CAPSTONE_DIET
   12857 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12858 #endif
   12859 	},
   12860 	{
   12861 		ARM_t2UADD8, ARM_INS_UADD8,
   12862 #ifndef CAPSTONE_DIET
   12863 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12864 #endif
   12865 	},
   12866 	{
   12867 		ARM_t2UASX, ARM_INS_UASX,
   12868 #ifndef CAPSTONE_DIET
   12869 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12870 #endif
   12871 	},
   12872 	{
   12873 		ARM_t2UBFX, ARM_INS_UBFX,
   12874 #ifndef CAPSTONE_DIET
   12875 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12876 #endif
   12877 	},
   12878 	{
   12879 		ARM_t2UDF, ARM_INS_UDF,
   12880 #ifndef CAPSTONE_DIET
   12881 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12882 #endif
   12883 	},
   12884 	{
   12885 		ARM_t2UDIV, ARM_INS_UDIV,
   12886 #ifndef CAPSTONE_DIET
   12887 		{ 0 }, { 0 }, { ARM_GRP_DIVIDE, ARM_GRP_THUMB2, 0 }, 0, 0
   12888 #endif
   12889 	},
   12890 	{
   12891 		ARM_t2UHADD16, ARM_INS_UHADD16,
   12892 #ifndef CAPSTONE_DIET
   12893 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12894 #endif
   12895 	},
   12896 	{
   12897 		ARM_t2UHADD8, ARM_INS_UHADD8,
   12898 #ifndef CAPSTONE_DIET
   12899 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12900 #endif
   12901 	},
   12902 	{
   12903 		ARM_t2UHASX, ARM_INS_UHASX,
   12904 #ifndef CAPSTONE_DIET
   12905 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12906 #endif
   12907 	},
   12908 	{
   12909 		ARM_t2UHSAX, ARM_INS_UHSAX,
   12910 #ifndef CAPSTONE_DIET
   12911 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12912 #endif
   12913 	},
   12914 	{
   12915 		ARM_t2UHSUB16, ARM_INS_UHSUB16,
   12916 #ifndef CAPSTONE_DIET
   12917 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12918 #endif
   12919 	},
   12920 	{
   12921 		ARM_t2UHSUB8, ARM_INS_UHSUB8,
   12922 #ifndef CAPSTONE_DIET
   12923 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12924 #endif
   12925 	},
   12926 	{
   12927 		ARM_t2UMAAL, ARM_INS_UMAAL,
   12928 #ifndef CAPSTONE_DIET
   12929 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12930 #endif
   12931 	},
   12932 	{
   12933 		ARM_t2UMLAL, ARM_INS_UMLAL,
   12934 #ifndef CAPSTONE_DIET
   12935 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12936 #endif
   12937 	},
   12938 	{
   12939 		ARM_t2UMULL, ARM_INS_UMULL,
   12940 #ifndef CAPSTONE_DIET
   12941 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12942 #endif
   12943 	},
   12944 	{
   12945 		ARM_t2UQADD16, ARM_INS_UQADD16,
   12946 #ifndef CAPSTONE_DIET
   12947 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12948 #endif
   12949 	},
   12950 	{
   12951 		ARM_t2UQADD8, ARM_INS_UQADD8,
   12952 #ifndef CAPSTONE_DIET
   12953 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12954 #endif
   12955 	},
   12956 	{
   12957 		ARM_t2UQASX, ARM_INS_UQASX,
   12958 #ifndef CAPSTONE_DIET
   12959 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12960 #endif
   12961 	},
   12962 	{
   12963 		ARM_t2UQSAX, ARM_INS_UQSAX,
   12964 #ifndef CAPSTONE_DIET
   12965 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12966 #endif
   12967 	},
   12968 	{
   12969 		ARM_t2UQSUB16, ARM_INS_UQSUB16,
   12970 #ifndef CAPSTONE_DIET
   12971 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12972 #endif
   12973 	},
   12974 	{
   12975 		ARM_t2UQSUB8, ARM_INS_UQSUB8,
   12976 #ifndef CAPSTONE_DIET
   12977 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12978 #endif
   12979 	},
   12980 	{
   12981 		ARM_t2USAD8, ARM_INS_USAD8,
   12982 #ifndef CAPSTONE_DIET
   12983 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12984 #endif
   12985 	},
   12986 	{
   12987 		ARM_t2USADA8, ARM_INS_USADA8,
   12988 #ifndef CAPSTONE_DIET
   12989 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   12990 #endif
   12991 	},
   12992 	{
   12993 		ARM_t2USAT, ARM_INS_USAT,
   12994 #ifndef CAPSTONE_DIET
   12995 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   12996 #endif
   12997 	},
   12998 	{
   12999 		ARM_t2USAT16, ARM_INS_USAT16,
   13000 #ifndef CAPSTONE_DIET
   13001 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   13002 #endif
   13003 	},
   13004 	{
   13005 		ARM_t2USAX, ARM_INS_USAX,
   13006 #ifndef CAPSTONE_DIET
   13007 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   13008 #endif
   13009 	},
   13010 	{
   13011 		ARM_t2USUB16, ARM_INS_USUB16,
   13012 #ifndef CAPSTONE_DIET
   13013 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   13014 #endif
   13015 	},
   13016 	{
   13017 		ARM_t2USUB8, ARM_INS_USUB8,
   13018 #ifndef CAPSTONE_DIET
   13019 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, ARM_GRP_THUMB2DSP, 0 }, 0, 0
   13020 #endif
   13021 	},
   13022 	{
   13023 		ARM_t2UXTAB, ARM_INS_UXTAB,
   13024 #ifndef CAPSTONE_DIET
   13025 		{ 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
   13026 #endif
   13027 	},
   13028 	{
   13029 		ARM_t2UXTAB16, ARM_INS_UXTAB16,
   13030 #ifndef CAPSTONE_DIET
   13031 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   13032 #endif
   13033 	},
   13034 	{
   13035 		ARM_t2UXTAH, ARM_INS_UXTAH,
   13036 #ifndef CAPSTONE_DIET
   13037 		{ 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
   13038 #endif
   13039 	},
   13040 	{
   13041 		ARM_t2UXTB, ARM_INS_UXTB,
   13042 #ifndef CAPSTONE_DIET
   13043 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   13044 #endif
   13045 	},
   13046 	{
   13047 		ARM_t2UXTB16, ARM_INS_UXTB16,
   13048 #ifndef CAPSTONE_DIET
   13049 		{ 0 }, { 0 }, { ARM_GRP_T2EXTRACTPACK, ARM_GRP_THUMB2, 0 }, 0, 0
   13050 #endif
   13051 	},
   13052 	{
   13053 		ARM_t2UXTH, ARM_INS_UXTH,
   13054 #ifndef CAPSTONE_DIET
   13055 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 0, 0
   13056 #endif
   13057 	},
   13058 	{
   13059 		ARM_tADC, ARM_INS_ADC,
   13060 #ifndef CAPSTONE_DIET
   13061 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13062 #endif
   13063 	},
   13064 	{
   13065 		ARM_tADDhirr, ARM_INS_ADD,
   13066 #ifndef CAPSTONE_DIET
   13067 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13068 #endif
   13069 	},
   13070 	{
   13071 		ARM_tADDi3, ARM_INS_ADD,
   13072 #ifndef CAPSTONE_DIET
   13073 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13074 #endif
   13075 	},
   13076 	{
   13077 		ARM_tADDi8, ARM_INS_ADD,
   13078 #ifndef CAPSTONE_DIET
   13079 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13080 #endif
   13081 	},
   13082 	{
   13083 		ARM_tADDrSP, ARM_INS_ADD,
   13084 #ifndef CAPSTONE_DIET
   13085 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13086 #endif
   13087 	},
   13088 	{
   13089 		ARM_tADDrSPi, ARM_INS_ADD,
   13090 #ifndef CAPSTONE_DIET
   13091 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13092 #endif
   13093 	},
   13094 	{
   13095 		ARM_tADDrr, ARM_INS_ADD,
   13096 #ifndef CAPSTONE_DIET
   13097 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13098 #endif
   13099 	},
   13100 	{
   13101 		ARM_tADDspi, ARM_INS_ADD,
   13102 #ifndef CAPSTONE_DIET
   13103 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13104 #endif
   13105 	},
   13106 	{
   13107 		ARM_tADDspr, ARM_INS_ADD,
   13108 #ifndef CAPSTONE_DIET
   13109 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13110 #endif
   13111 	},
   13112 	{
   13113 		ARM_tADR, ARM_INS_ADR,
   13114 #ifndef CAPSTONE_DIET
   13115 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13116 #endif
   13117 	},
   13118 	{
   13119 		ARM_tAND, ARM_INS_AND,
   13120 #ifndef CAPSTONE_DIET
   13121 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13122 #endif
   13123 	},
   13124 	{
   13125 		ARM_tASRri, ARM_INS_ASR,
   13126 #ifndef CAPSTONE_DIET
   13127 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13128 #endif
   13129 	},
   13130 	{
   13131 		ARM_tASRrr, ARM_INS_ASR,
   13132 #ifndef CAPSTONE_DIET
   13133 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13134 #endif
   13135 	},
   13136 	{
   13137 		ARM_tB, ARM_INS_B,
   13138 #ifndef CAPSTONE_DIET
   13139 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0
   13140 #endif
   13141 	},
   13142 	{
   13143 		ARM_tBIC, ARM_INS_BIC,
   13144 #ifndef CAPSTONE_DIET
   13145 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13146 #endif
   13147 	},
   13148 	{
   13149 		ARM_tBKPT, ARM_INS_BKPT,
   13150 #ifndef CAPSTONE_DIET
   13151 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13152 #endif
   13153 	},
   13154 	{
   13155 		ARM_tBL, ARM_INS_BL,
   13156 #ifndef CAPSTONE_DIET
   13157 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, 0 }, 1, 0
   13158 #endif
   13159 	},
   13160 	{
   13161 		ARM_tBLXi, ARM_INS_BLX,
   13162 #ifndef CAPSTONE_DIET
   13163 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, ARM_GRP_V5T, ARM_GRP_NOTMCLASS, 0 }, 1, 0
   13164 #endif
   13165 	},
   13166 	{
   13167 		ARM_tBLXr, ARM_INS_BLX,
   13168 #ifndef CAPSTONE_DIET
   13169 		{ ARM_REG_PC, 0 }, { ARM_REG_LR, 0 }, { ARM_GRP_THUMB, ARM_GRP_V5T, 0 }, 0, 1
   13170 #endif
   13171 	},
   13172 	{
   13173 		ARM_tBX, ARM_INS_BX,
   13174 #ifndef CAPSTONE_DIET
   13175 		{ 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 1
   13176 #endif
   13177 	},
   13178 	{
   13179 		ARM_tBcc, ARM_INS_B,
   13180 #ifndef CAPSTONE_DIET
   13181 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 1, 0
   13182 #endif
   13183 	},
   13184 	{
   13185 		ARM_tCBNZ, ARM_INS_CBNZ,
   13186 #ifndef CAPSTONE_DIET
   13187 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
   13188 #endif
   13189 	},
   13190 	{
   13191 		ARM_tCBZ, ARM_INS_CBZ,
   13192 #ifndef CAPSTONE_DIET
   13193 		{ 0 }, { 0 }, { ARM_GRP_THUMB2, 0 }, 1, 0
   13194 #endif
   13195 	},
   13196 	{
   13197 		ARM_tCMNz, ARM_INS_CMN,
   13198 #ifndef CAPSTONE_DIET
   13199 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13200 #endif
   13201 	},
   13202 	{
   13203 		ARM_tCMPhir, ARM_INS_CMP,
   13204 #ifndef CAPSTONE_DIET
   13205 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13206 #endif
   13207 	},
   13208 	{
   13209 		ARM_tCMPi8, ARM_INS_CMP,
   13210 #ifndef CAPSTONE_DIET
   13211 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13212 #endif
   13213 	},
   13214 	{
   13215 		ARM_tCMPr, ARM_INS_CMP,
   13216 #ifndef CAPSTONE_DIET
   13217 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13218 #endif
   13219 	},
   13220 	{
   13221 		ARM_tCPS, ARM_INS_CPS,
   13222 #ifndef CAPSTONE_DIET
   13223 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13224 #endif
   13225 	},
   13226 	{
   13227 		ARM_tEOR, ARM_INS_EOR,
   13228 #ifndef CAPSTONE_DIET
   13229 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13230 #endif
   13231 	},
   13232 	{
   13233 		ARM_tHINT, ARM_INS_HINT,
   13234 #ifndef CAPSTONE_DIET
   13235 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V6M, 0 }, 0, 0
   13236 #endif
   13237 	},
   13238 	{
   13239 		ARM_tHLT, ARM_INS_HLT,
   13240 #ifndef CAPSTONE_DIET
   13241 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V8, 0 }, 0, 0
   13242 #endif
   13243 	},
   13244 	{
   13245 		ARM_tLDMIA, ARM_INS_LDM,
   13246 #ifndef CAPSTONE_DIET
   13247 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13248 #endif
   13249 	},
   13250 	{
   13251 		ARM_tLDRBi, ARM_INS_LDRB,
   13252 #ifndef CAPSTONE_DIET
   13253 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13254 #endif
   13255 	},
   13256 	{
   13257 		ARM_tLDRBr, ARM_INS_LDRB,
   13258 #ifndef CAPSTONE_DIET
   13259 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13260 #endif
   13261 	},
   13262 	{
   13263 		ARM_tLDRHi, ARM_INS_LDRH,
   13264 #ifndef CAPSTONE_DIET
   13265 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13266 #endif
   13267 	},
   13268 	{
   13269 		ARM_tLDRHr, ARM_INS_LDRH,
   13270 #ifndef CAPSTONE_DIET
   13271 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13272 #endif
   13273 	},
   13274 	{
   13275 		ARM_tLDRSB, ARM_INS_LDRSB,
   13276 #ifndef CAPSTONE_DIET
   13277 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13278 #endif
   13279 	},
   13280 	{
   13281 		ARM_tLDRSH, ARM_INS_LDRSH,
   13282 #ifndef CAPSTONE_DIET
   13283 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13284 #endif
   13285 	},
   13286 	{
   13287 		ARM_tLDRi, ARM_INS_LDR,
   13288 #ifndef CAPSTONE_DIET
   13289 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13290 #endif
   13291 	},
   13292 	{
   13293 		ARM_tLDRpci, ARM_INS_LDR,
   13294 #ifndef CAPSTONE_DIET
   13295 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13296 #endif
   13297 	},
   13298 	{
   13299 		ARM_tLDRr, ARM_INS_LDR,
   13300 #ifndef CAPSTONE_DIET
   13301 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13302 #endif
   13303 	},
   13304 	{
   13305 		ARM_tLDRspi, ARM_INS_LDR,
   13306 #ifndef CAPSTONE_DIET
   13307 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13308 #endif
   13309 	},
   13310 	{
   13311 		ARM_tLSLri, ARM_INS_LSL,
   13312 #ifndef CAPSTONE_DIET
   13313 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13314 #endif
   13315 	},
   13316 	{
   13317 		ARM_tLSLrr, ARM_INS_LSL,
   13318 #ifndef CAPSTONE_DIET
   13319 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13320 #endif
   13321 	},
   13322 	{
   13323 		ARM_tLSRri, ARM_INS_LSR,
   13324 #ifndef CAPSTONE_DIET
   13325 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13326 #endif
   13327 	},
   13328 	{
   13329 		ARM_tLSRrr, ARM_INS_LSR,
   13330 #ifndef CAPSTONE_DIET
   13331 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13332 #endif
   13333 	},
   13334 	{
   13335 		ARM_tMOVSr, ARM_INS_MOV,
   13336 #ifndef CAPSTONE_DIET
   13337 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13338 #endif
   13339 	},
   13340 	{
   13341 		ARM_tMOVi8, ARM_INS_MOV,
   13342 #ifndef CAPSTONE_DIET
   13343 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13344 #endif
   13345 	},
   13346 	{
   13347 		ARM_tMOVr, ARM_INS_MOV,
   13348 #ifndef CAPSTONE_DIET
   13349 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13350 #endif
   13351 	},
   13352 	{
   13353 		ARM_tMUL, ARM_INS_MUL,
   13354 #ifndef CAPSTONE_DIET
   13355 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13356 #endif
   13357 	},
   13358 	{
   13359 		ARM_tMVN, ARM_INS_MVN,
   13360 #ifndef CAPSTONE_DIET
   13361 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13362 #endif
   13363 	},
   13364 	{
   13365 		ARM_tORR, ARM_INS_ORR,
   13366 #ifndef CAPSTONE_DIET
   13367 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13368 #endif
   13369 	},
   13370 	{
   13371 		ARM_tPOP, ARM_INS_POP,
   13372 #ifndef CAPSTONE_DIET
   13373 		{ ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13374 #endif
   13375 	},
   13376 	{
   13377 		ARM_tPUSH, ARM_INS_PUSH,
   13378 #ifndef CAPSTONE_DIET
   13379 		{ ARM_REG_SP, 0 }, { ARM_REG_SP, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13380 #endif
   13381 	},
   13382 	{
   13383 		ARM_tREV, ARM_INS_REV,
   13384 #ifndef CAPSTONE_DIET
   13385 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
   13386 #endif
   13387 	},
   13388 	{
   13389 		ARM_tREV16, ARM_INS_REV16,
   13390 #ifndef CAPSTONE_DIET
   13391 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
   13392 #endif
   13393 	},
   13394 	{
   13395 		ARM_tREVSH, ARM_INS_REVSH,
   13396 #ifndef CAPSTONE_DIET
   13397 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
   13398 #endif
   13399 	},
   13400 	{
   13401 		ARM_tROR, ARM_INS_ROR,
   13402 #ifndef CAPSTONE_DIET
   13403 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13404 #endif
   13405 	},
   13406 	{
   13407 		ARM_tRSB, ARM_INS_RSB,
   13408 #ifndef CAPSTONE_DIET
   13409 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13410 #endif
   13411 	},
   13412 	{
   13413 		ARM_tSBC, ARM_INS_SBC,
   13414 #ifndef CAPSTONE_DIET
   13415 		{ ARM_REG_CPSR, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13416 #endif
   13417 	},
   13418 	{
   13419 		ARM_tSETEND, ARM_INS_SETEND,
   13420 #ifndef CAPSTONE_DIET
   13421 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_V6, ARM_GRP_NOTMCLASS, 0}, 0, 0
   13422 #endif
   13423 	},
   13424 	{
   13425 		ARM_tSTMIA_UPD, ARM_INS_STM,
   13426 #ifndef CAPSTONE_DIET
   13427 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13428 #endif
   13429 	},
   13430 	{
   13431 		ARM_tSTRBi, ARM_INS_STRB,
   13432 #ifndef CAPSTONE_DIET
   13433 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13434 #endif
   13435 	},
   13436 	{
   13437 		ARM_tSTRBr, ARM_INS_STRB,
   13438 #ifndef CAPSTONE_DIET
   13439 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13440 #endif
   13441 	},
   13442 	{
   13443 		ARM_tSTRHi, ARM_INS_STRH,
   13444 #ifndef CAPSTONE_DIET
   13445 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13446 #endif
   13447 	},
   13448 	{
   13449 		ARM_tSTRHr, ARM_INS_STRH,
   13450 #ifndef CAPSTONE_DIET
   13451 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13452 #endif
   13453 	},
   13454 	{
   13455 		ARM_tSTRi, ARM_INS_STR,
   13456 #ifndef CAPSTONE_DIET
   13457 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13458 #endif
   13459 	},
   13460 	{
   13461 		ARM_tSTRr, ARM_INS_STR,
   13462 #ifndef CAPSTONE_DIET
   13463 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13464 #endif
   13465 	},
   13466 	{
   13467 		ARM_tSTRspi, ARM_INS_STR,
   13468 #ifndef CAPSTONE_DIET
   13469 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13470 #endif
   13471 	},
   13472 	{
   13473 		ARM_tSUBi3, ARM_INS_SUB,
   13474 #ifndef CAPSTONE_DIET
   13475 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13476 #endif
   13477 	},
   13478 	{
   13479 		ARM_tSUBi8, ARM_INS_SUB,
   13480 #ifndef CAPSTONE_DIET
   13481 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13482 #endif
   13483 	},
   13484 	{
   13485 		ARM_tSUBrr, ARM_INS_SUB,
   13486 #ifndef CAPSTONE_DIET
   13487 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13488 #endif
   13489 	},
   13490 	{
   13491 		ARM_tSUBspi, ARM_INS_SUB,
   13492 #ifndef CAPSTONE_DIET
   13493 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13494 #endif
   13495 	},
   13496 	{
   13497 		ARM_tSVC, ARM_INS_SVC,
   13498 #ifndef CAPSTONE_DIET
   13499 		{ ARM_REG_SP, 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13500 #endif
   13501 	},
   13502 	{
   13503 		ARM_tSXTB, ARM_INS_SXTB,
   13504 #ifndef CAPSTONE_DIET
   13505 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
   13506 #endif
   13507 	},
   13508 	{
   13509 		ARM_tSXTH, ARM_INS_SXTH,
   13510 #ifndef CAPSTONE_DIET
   13511 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
   13512 #endif
   13513 	},
   13514 	{
   13515 		ARM_tTRAP, ARM_INS_TRAP,
   13516 #ifndef CAPSTONE_DIET
   13517 		{ 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
   13518 #endif
   13519 	},
   13520 	{
   13521 		ARM_tTST, ARM_INS_TST,
   13522 #ifndef CAPSTONE_DIET
   13523 		{ 0 }, { ARM_REG_CPSR, 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, 0 }, 0, 0
   13524 #endif
   13525 	},
   13526 	{
   13527 		ARM_tUDF, ARM_INS_UDF,
   13528 #ifndef CAPSTONE_DIET
   13529 		{ 0 }, { 0 }, { ARM_GRP_THUMB, 0 }, 0, 0
   13530 #endif
   13531 	},
   13532 	{
   13533 		ARM_tUXTB, ARM_INS_UXTB,
   13534 #ifndef CAPSTONE_DIET
   13535 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
   13536 #endif
   13537 	},
   13538 	{
   13539 		ARM_tUXTH, ARM_INS_UXTH,
   13540 #ifndef CAPSTONE_DIET
   13541 		{ 0 }, { 0 }, { ARM_GRP_THUMB, ARM_GRP_THUMB1ONLY, ARM_GRP_V6, 0 }, 0, 0
   13542 #endif
   13543 	},
   13544 };
   13545 
   13546 void ARM_get_insn_id(cs_struct *h, cs_insn *insn, unsigned int id)
   13547 {
   13548 	int i = insn_find(insns, ARR_SIZE(insns), id, &h->insn_cache);
   13549 	if (i != 0) {
   13550 		insn->id = insns[i].mapid;
   13551 
   13552 		if (h->detail) {
   13553 #ifndef CAPSTONE_DIET
   13554 			cs_struct handle;
   13555 			handle.detail = h->detail;
   13556 
   13557 			memcpy(insn->detail->regs_read, insns[i].regs_use, sizeof(insns[i].regs_use));
   13558 			insn->detail->regs_read_count = (uint8_t)count_positive(insns[i].regs_use);
   13559 
   13560 			memcpy(insn->detail->regs_write, insns[i].regs_mod, sizeof(insns[i].regs_mod));
   13561 			insn->detail->regs_write_count = (uint8_t)count_positive(insns[i].regs_mod);
   13562 
   13563 			memcpy(insn->detail->groups, insns[i].groups, sizeof(insns[i].groups));
   13564 			insn->detail->groups_count = (uint8_t)count_positive(insns[i].groups);
   13565 
   13566 			insn->detail->arm.update_flags = cs_reg_write((csh)&handle, insn, ARM_REG_CPSR);
   13567 
   13568 			if (insns[i].branch || insns[i].indirect_branch) {
   13569 				// this insn also belongs to JUMP group. add JUMP group
   13570 				insn->detail->groups[insn->detail->groups_count] = ARM_GRP_JUMP;
   13571 				insn->detail->groups_count++;
   13572 			}
   13573 #endif
   13574 		}
   13575 	}
   13576 }
   13577 
   13578 #ifndef CAPSTONE_DIET
   13579 static name_map insn_name_maps[] = {
   13580 	{ ARM_INS_INVALID, NULL },
   13581 
   13582 	{ ARM_INS_ADC, "adc" },
   13583 	{ ARM_INS_ADD, "add" },
   13584 	{ ARM_INS_ADR, "adr" },
   13585 	{ ARM_INS_AESD, "aesd" },
   13586 	{ ARM_INS_AESE, "aese" },
   13587 	{ ARM_INS_AESIMC, "aesimc" },
   13588 	{ ARM_INS_AESMC, "aesmc" },
   13589 	{ ARM_INS_AND, "and" },
   13590 	{ ARM_INS_BFC, "bfc" },
   13591 	{ ARM_INS_BFI, "bfi" },
   13592 	{ ARM_INS_BIC, "bic" },
   13593 	{ ARM_INS_BKPT, "bkpt" },
   13594 	{ ARM_INS_BL, "bl" },
   13595 	{ ARM_INS_BLX, "blx" },
   13596 	{ ARM_INS_BX, "bx" },
   13597 	{ ARM_INS_BXJ, "bxj" },
   13598 	{ ARM_INS_B, "b" },
   13599 	{ ARM_INS_CDP, "cdp" },
   13600 	{ ARM_INS_CDP2, "cdp2" },
   13601 	{ ARM_INS_CLREX, "clrex" },
   13602 	{ ARM_INS_CLZ, "clz" },
   13603 	{ ARM_INS_CMN, "cmn" },
   13604 	{ ARM_INS_CMP, "cmp" },
   13605 	{ ARM_INS_CPS, "cps" },
   13606 	{ ARM_INS_CRC32B, "crc32b" },
   13607 	{ ARM_INS_CRC32CB, "crc32cb" },
   13608 	{ ARM_INS_CRC32CH, "crc32ch" },
   13609 	{ ARM_INS_CRC32CW, "crc32cw" },
   13610 	{ ARM_INS_CRC32H, "crc32h" },
   13611 	{ ARM_INS_CRC32W, "crc32w" },
   13612 	{ ARM_INS_DBG, "dbg" },
   13613 	{ ARM_INS_DMB, "dmb" },
   13614 	{ ARM_INS_DSB, "dsb" },
   13615 	{ ARM_INS_EOR, "eor" },
   13616 	{ ARM_INS_VMOV, "vmov" },
   13617 	{ ARM_INS_FLDMDBX, "fldmdbx" },
   13618 	{ ARM_INS_FLDMIAX, "fldmiax" },
   13619 	{ ARM_INS_VMRS, "vmrs" },
   13620 	{ ARM_INS_FSTMDBX, "fstmdbx" },
   13621 	{ ARM_INS_FSTMIAX, "fstmiax" },
   13622 	{ ARM_INS_HINT, "hint" },
   13623 	{ ARM_INS_HLT, "hlt" },
   13624 	{ ARM_INS_ISB, "isb" },
   13625 	{ ARM_INS_LDA, "lda" },
   13626 	{ ARM_INS_LDAB, "ldab" },
   13627 	{ ARM_INS_LDAEX, "ldaex" },
   13628 	{ ARM_INS_LDAEXB, "ldaexb" },
   13629 	{ ARM_INS_LDAEXD, "ldaexd" },
   13630 	{ ARM_INS_LDAEXH, "ldaexh" },
   13631 	{ ARM_INS_LDAH, "ldah" },
   13632 	{ ARM_INS_LDC2L, "ldc2l" },
   13633 	{ ARM_INS_LDC2, "ldc2" },
   13634 	{ ARM_INS_LDCL, "ldcl" },
   13635 	{ ARM_INS_LDC, "ldc" },
   13636 	{ ARM_INS_LDMDA, "ldmda" },
   13637 	{ ARM_INS_LDMDB, "ldmdb" },
   13638 	{ ARM_INS_LDM, "ldm" },
   13639 	{ ARM_INS_LDMIB, "ldmib" },
   13640 	{ ARM_INS_LDRBT, "ldrbt" },
   13641 	{ ARM_INS_LDRB, "ldrb" },
   13642 	{ ARM_INS_LDRD, "ldrd" },
   13643 	{ ARM_INS_LDREX, "ldrex" },
   13644 	{ ARM_INS_LDREXB, "ldrexb" },
   13645 	{ ARM_INS_LDREXD, "ldrexd" },
   13646 	{ ARM_INS_LDREXH, "ldrexh" },
   13647 	{ ARM_INS_LDRH, "ldrh" },
   13648 	{ ARM_INS_LDRHT, "ldrht" },
   13649 	{ ARM_INS_LDRSB, "ldrsb" },
   13650 	{ ARM_INS_LDRSBT, "ldrsbt" },
   13651 	{ ARM_INS_LDRSH, "ldrsh" },
   13652 	{ ARM_INS_LDRSHT, "ldrsht" },
   13653 	{ ARM_INS_LDRT, "ldrt" },
   13654 	{ ARM_INS_LDR, "ldr" },
   13655 	{ ARM_INS_MCR, "mcr" },
   13656 	{ ARM_INS_MCR2, "mcr2" },
   13657 	{ ARM_INS_MCRR, "mcrr" },
   13658 	{ ARM_INS_MCRR2, "mcrr2" },
   13659 	{ ARM_INS_MLA, "mla" },
   13660 	{ ARM_INS_MLS, "mls" },
   13661 	{ ARM_INS_MOV, "mov" },
   13662 	{ ARM_INS_MOVT, "movt" },
   13663 	{ ARM_INS_MOVW, "movw" },
   13664 	{ ARM_INS_MRC, "mrc" },
   13665 	{ ARM_INS_MRC2, "mrc2" },
   13666 	{ ARM_INS_MRRC, "mrrc" },
   13667 	{ ARM_INS_MRRC2, "mrrc2" },
   13668 	{ ARM_INS_MRS, "mrs" },
   13669 	{ ARM_INS_MSR, "msr" },
   13670 	{ ARM_INS_MUL, "mul" },
   13671 	{ ARM_INS_MVN, "mvn" },
   13672 	{ ARM_INS_ORR, "orr" },
   13673 	{ ARM_INS_PKHBT, "pkhbt" },
   13674 	{ ARM_INS_PKHTB, "pkhtb" },
   13675 	{ ARM_INS_PLDW, "pldw" },
   13676 	{ ARM_INS_PLD, "pld" },
   13677 	{ ARM_INS_PLI, "pli" },
   13678 	{ ARM_INS_QADD, "qadd" },
   13679 	{ ARM_INS_QADD16, "qadd16" },
   13680 	{ ARM_INS_QADD8, "qadd8" },
   13681 	{ ARM_INS_QASX, "qasx" },
   13682 	{ ARM_INS_QDADD, "qdadd" },
   13683 	{ ARM_INS_QDSUB, "qdsub" },
   13684 	{ ARM_INS_QSAX, "qsax" },
   13685 	{ ARM_INS_QSUB, "qsub" },
   13686 	{ ARM_INS_QSUB16, "qsub16" },
   13687 	{ ARM_INS_QSUB8, "qsub8" },
   13688 	{ ARM_INS_RBIT, "rbit" },
   13689 	{ ARM_INS_REV, "rev" },
   13690 	{ ARM_INS_REV16, "rev16" },
   13691 	{ ARM_INS_REVSH, "revsh" },
   13692 	{ ARM_INS_RFEDA, "rfeda" },
   13693 	{ ARM_INS_RFEDB, "rfedb" },
   13694 	{ ARM_INS_RFEIA, "rfeia" },
   13695 	{ ARM_INS_RFEIB, "rfeib" },
   13696 	{ ARM_INS_RSB, "rsb" },
   13697 	{ ARM_INS_RSC, "rsc" },
   13698 	{ ARM_INS_SADD16, "sadd16" },
   13699 	{ ARM_INS_SADD8, "sadd8" },
   13700 	{ ARM_INS_SASX, "sasx" },
   13701 	{ ARM_INS_SBC, "sbc" },
   13702 	{ ARM_INS_SBFX, "sbfx" },
   13703 	{ ARM_INS_SDIV, "sdiv" },
   13704 	{ ARM_INS_SEL, "sel" },
   13705 	{ ARM_INS_SETEND, "setend" },
   13706 	{ ARM_INS_SHA1C, "sha1c" },
   13707 	{ ARM_INS_SHA1H, "sha1h" },
   13708 	{ ARM_INS_SHA1M, "sha1m" },
   13709 	{ ARM_INS_SHA1P, "sha1p" },
   13710 	{ ARM_INS_SHA1SU0, "sha1su0" },
   13711 	{ ARM_INS_SHA1SU1, "sha1su1" },
   13712 	{ ARM_INS_SHA256H, "sha256h" },
   13713 	{ ARM_INS_SHA256H2, "sha256h2" },
   13714 	{ ARM_INS_SHA256SU0, "sha256su0" },
   13715 	{ ARM_INS_SHA256SU1, "sha256su1" },
   13716 	{ ARM_INS_SHADD16, "shadd16" },
   13717 	{ ARM_INS_SHADD8, "shadd8" },
   13718 	{ ARM_INS_SHASX, "shasx" },
   13719 	{ ARM_INS_SHSAX, "shsax" },
   13720 	{ ARM_INS_SHSUB16, "shsub16" },
   13721 	{ ARM_INS_SHSUB8, "shsub8" },
   13722 	{ ARM_INS_SMC, "smc" },
   13723 	{ ARM_INS_SMLABB, "smlabb" },
   13724 	{ ARM_INS_SMLABT, "smlabt" },
   13725 	{ ARM_INS_SMLAD, "smlad" },
   13726 	{ ARM_INS_SMLADX, "smladx" },
   13727 	{ ARM_INS_SMLAL, "smlal" },
   13728 	{ ARM_INS_SMLALBB, "smlalbb" },
   13729 	{ ARM_INS_SMLALBT, "smlalbt" },
   13730 	{ ARM_INS_SMLALD, "smlald" },
   13731 	{ ARM_INS_SMLALDX, "smlaldx" },
   13732 	{ ARM_INS_SMLALTB, "smlaltb" },
   13733 	{ ARM_INS_SMLALTT, "smlaltt" },
   13734 	{ ARM_INS_SMLATB, "smlatb" },
   13735 	{ ARM_INS_SMLATT, "smlatt" },
   13736 	{ ARM_INS_SMLAWB, "smlawb" },
   13737 	{ ARM_INS_SMLAWT, "smlawt" },
   13738 	{ ARM_INS_SMLSD, "smlsd" },
   13739 	{ ARM_INS_SMLSDX, "smlsdx" },
   13740 	{ ARM_INS_SMLSLD, "smlsld" },
   13741 	{ ARM_INS_SMLSLDX, "smlsldx" },
   13742 	{ ARM_INS_SMMLA, "smmla" },
   13743 	{ ARM_INS_SMMLAR, "smmlar" },
   13744 	{ ARM_INS_SMMLS, "smmls" },
   13745 	{ ARM_INS_SMMLSR, "smmlsr" },
   13746 	{ ARM_INS_SMMUL, "smmul" },
   13747 	{ ARM_INS_SMMULR, "smmulr" },
   13748 	{ ARM_INS_SMUAD, "smuad" },
   13749 	{ ARM_INS_SMUADX, "smuadx" },
   13750 	{ ARM_INS_SMULBB, "smulbb" },
   13751 	{ ARM_INS_SMULBT, "smulbt" },
   13752 	{ ARM_INS_SMULL, "smull" },
   13753 	{ ARM_INS_SMULTB, "smultb" },
   13754 	{ ARM_INS_SMULTT, "smultt" },
   13755 	{ ARM_INS_SMULWB, "smulwb" },
   13756 	{ ARM_INS_SMULWT, "smulwt" },
   13757 	{ ARM_INS_SMUSD, "smusd" },
   13758 	{ ARM_INS_SMUSDX, "smusdx" },
   13759 	{ ARM_INS_SRSDA, "srsda" },
   13760 	{ ARM_INS_SRSDB, "srsdb" },
   13761 	{ ARM_INS_SRSIA, "srsia" },
   13762 	{ ARM_INS_SRSIB, "srsib" },
   13763 	{ ARM_INS_SSAT, "ssat" },
   13764 	{ ARM_INS_SSAT16, "ssat16" },
   13765 	{ ARM_INS_SSAX, "ssax" },
   13766 	{ ARM_INS_SSUB16, "ssub16" },
   13767 	{ ARM_INS_SSUB8, "ssub8" },
   13768 	{ ARM_INS_STC2L, "stc2l" },
   13769 	{ ARM_INS_STC2, "stc2" },
   13770 	{ ARM_INS_STCL, "stcl" },
   13771 	{ ARM_INS_STC, "stc" },
   13772 	{ ARM_INS_STL, "stl" },
   13773 	{ ARM_INS_STLB, "stlb" },
   13774 	{ ARM_INS_STLEX, "stlex" },
   13775 	{ ARM_INS_STLEXB, "stlexb" },
   13776 	{ ARM_INS_STLEXD, "stlexd" },
   13777 	{ ARM_INS_STLEXH, "stlexh" },
   13778 	{ ARM_INS_STLH, "stlh" },
   13779 	{ ARM_INS_STMDA, "stmda" },
   13780 	{ ARM_INS_STMDB, "stmdb" },
   13781 	{ ARM_INS_STM, "stm" },
   13782 	{ ARM_INS_STMIB, "stmib" },
   13783 	{ ARM_INS_STRBT, "strbt" },
   13784 	{ ARM_INS_STRB, "strb" },
   13785 	{ ARM_INS_STRD, "strd" },
   13786 	{ ARM_INS_STREX, "strex" },
   13787 	{ ARM_INS_STREXB, "strexb" },
   13788 	{ ARM_INS_STREXD, "strexd" },
   13789 	{ ARM_INS_STREXH, "strexh" },
   13790 	{ ARM_INS_STRH, "strh" },
   13791 	{ ARM_INS_STRHT, "strht" },
   13792 	{ ARM_INS_STRT, "strt" },
   13793 	{ ARM_INS_STR, "str" },
   13794 	{ ARM_INS_SUB, "sub" },
   13795 	{ ARM_INS_SVC, "svc" },
   13796 	{ ARM_INS_SWP, "swp" },
   13797 	{ ARM_INS_SWPB, "swpb" },
   13798 	{ ARM_INS_SXTAB, "sxtab" },
   13799 	{ ARM_INS_SXTAB16, "sxtab16" },
   13800 	{ ARM_INS_SXTAH, "sxtah" },
   13801 	{ ARM_INS_SXTB, "sxtb" },
   13802 	{ ARM_INS_SXTB16, "sxtb16" },
   13803 	{ ARM_INS_SXTH, "sxth" },
   13804 	{ ARM_INS_TEQ, "teq" },
   13805 	{ ARM_INS_TRAP, "trap" },
   13806 	{ ARM_INS_TST, "tst" },
   13807 	{ ARM_INS_UADD16, "uadd16" },
   13808 	{ ARM_INS_UADD8, "uadd8" },
   13809 	{ ARM_INS_UASX, "uasx" },
   13810 	{ ARM_INS_UBFX, "ubfx" },
   13811 	{ ARM_INS_UDF, "udf" },
   13812 	{ ARM_INS_UDIV, "udiv" },
   13813 	{ ARM_INS_UHADD16, "uhadd16" },
   13814 	{ ARM_INS_UHADD8, "uhadd8" },
   13815 	{ ARM_INS_UHASX, "uhasx" },
   13816 	{ ARM_INS_UHSAX, "uhsax" },
   13817 	{ ARM_INS_UHSUB16, "uhsub16" },
   13818 	{ ARM_INS_UHSUB8, "uhsub8" },
   13819 	{ ARM_INS_UMAAL, "umaal" },
   13820 	{ ARM_INS_UMLAL, "umlal" },
   13821 	{ ARM_INS_UMULL, "umull" },
   13822 	{ ARM_INS_UQADD16, "uqadd16" },
   13823 	{ ARM_INS_UQADD8, "uqadd8" },
   13824 	{ ARM_INS_UQASX, "uqasx" },
   13825 	{ ARM_INS_UQSAX, "uqsax" },
   13826 	{ ARM_INS_UQSUB16, "uqsub16" },
   13827 	{ ARM_INS_UQSUB8, "uqsub8" },
   13828 	{ ARM_INS_USAD8, "usad8" },
   13829 	{ ARM_INS_USADA8, "usada8" },
   13830 	{ ARM_INS_USAT, "usat" },
   13831 	{ ARM_INS_USAT16, "usat16" },
   13832 	{ ARM_INS_USAX, "usax" },
   13833 	{ ARM_INS_USUB16, "usub16" },
   13834 	{ ARM_INS_USUB8, "usub8" },
   13835 	{ ARM_INS_UXTAB, "uxtab" },
   13836 	{ ARM_INS_UXTAB16, "uxtab16" },
   13837 	{ ARM_INS_UXTAH, "uxtah" },
   13838 	{ ARM_INS_UXTB, "uxtb" },
   13839 	{ ARM_INS_UXTB16, "uxtb16" },
   13840 	{ ARM_INS_UXTH, "uxth" },
   13841 	{ ARM_INS_VABAL, "vabal" },
   13842 	{ ARM_INS_VABA, "vaba" },
   13843 	{ ARM_INS_VABDL, "vabdl" },
   13844 	{ ARM_INS_VABD, "vabd" },
   13845 	{ ARM_INS_VABS, "vabs" },
   13846 	{ ARM_INS_VACGE, "vacge" },
   13847 	{ ARM_INS_VACGT, "vacgt" },
   13848 	{ ARM_INS_VADD, "vadd" },
   13849 	{ ARM_INS_VADDHN, "vaddhn" },
   13850 	{ ARM_INS_VADDL, "vaddl" },
   13851 	{ ARM_INS_VADDW, "vaddw" },
   13852 	{ ARM_INS_VAND, "vand" },
   13853 	{ ARM_INS_VBIC, "vbic" },
   13854 	{ ARM_INS_VBIF, "vbif" },
   13855 	{ ARM_INS_VBIT, "vbit" },
   13856 	{ ARM_INS_VBSL, "vbsl" },
   13857 	{ ARM_INS_VCEQ, "vceq" },
   13858 	{ ARM_INS_VCGE, "vcge" },
   13859 	{ ARM_INS_VCGT, "vcgt" },
   13860 	{ ARM_INS_VCLE, "vcle" },
   13861 	{ ARM_INS_VCLS, "vcls" },
   13862 	{ ARM_INS_VCLT, "vclt" },
   13863 	{ ARM_INS_VCLZ, "vclz" },
   13864 	{ ARM_INS_VCMP, "vcmp" },
   13865 	{ ARM_INS_VCMPE, "vcmpe" },
   13866 	{ ARM_INS_VCNT, "vcnt" },
   13867 	{ ARM_INS_VCVTA, "vcvta" },
   13868 	{ ARM_INS_VCVTB, "vcvtb" },
   13869 	{ ARM_INS_VCVT, "vcvt" },
   13870 	{ ARM_INS_VCVTM, "vcvtm" },
   13871 	{ ARM_INS_VCVTN, "vcvtn" },
   13872 	{ ARM_INS_VCVTP, "vcvtp" },
   13873 	{ ARM_INS_VCVTT, "vcvtt" },
   13874 	{ ARM_INS_VDIV, "vdiv" },
   13875 	{ ARM_INS_VDUP, "vdup" },
   13876 	{ ARM_INS_VEOR, "veor" },
   13877 	{ ARM_INS_VEXT, "vext" },
   13878 	{ ARM_INS_VFMA, "vfma" },
   13879 	{ ARM_INS_VFMS, "vfms" },
   13880 	{ ARM_INS_VFNMA, "vfnma" },
   13881 	{ ARM_INS_VFNMS, "vfnms" },
   13882 	{ ARM_INS_VHADD, "vhadd" },
   13883 	{ ARM_INS_VHSUB, "vhsub" },
   13884 	{ ARM_INS_VLD1, "vld1" },
   13885 	{ ARM_INS_VLD2, "vld2" },
   13886 	{ ARM_INS_VLD3, "vld3" },
   13887 	{ ARM_INS_VLD4, "vld4" },
   13888 	{ ARM_INS_VLDMDB, "vldmdb" },
   13889 	{ ARM_INS_VLDMIA, "vldmia" },
   13890 	{ ARM_INS_VLDR, "vldr" },
   13891 	{ ARM_INS_VMAXNM, "vmaxnm" },
   13892 	{ ARM_INS_VMAX, "vmax" },
   13893 	{ ARM_INS_VMINNM, "vminnm" },
   13894 	{ ARM_INS_VMIN, "vmin" },
   13895 	{ ARM_INS_VMLA, "vmla" },
   13896 	{ ARM_INS_VMLAL, "vmlal" },
   13897 	{ ARM_INS_VMLS, "vmls" },
   13898 	{ ARM_INS_VMLSL, "vmlsl" },
   13899 	{ ARM_INS_VMOVL, "vmovl" },
   13900 	{ ARM_INS_VMOVN, "vmovn" },
   13901 	{ ARM_INS_VMSR, "vmsr" },
   13902 	{ ARM_INS_VMUL, "vmul" },
   13903 	{ ARM_INS_VMULL, "vmull" },
   13904 	{ ARM_INS_VMVN, "vmvn" },
   13905 	{ ARM_INS_VNEG, "vneg" },
   13906 	{ ARM_INS_VNMLA, "vnmla" },
   13907 	{ ARM_INS_VNMLS, "vnmls" },
   13908 	{ ARM_INS_VNMUL, "vnmul" },
   13909 	{ ARM_INS_VORN, "vorn" },
   13910 	{ ARM_INS_VORR, "vorr" },
   13911 	{ ARM_INS_VPADAL, "vpadal" },
   13912 	{ ARM_INS_VPADDL, "vpaddl" },
   13913 	{ ARM_INS_VPADD, "vpadd" },
   13914 	{ ARM_INS_VPMAX, "vpmax" },
   13915 	{ ARM_INS_VPMIN, "vpmin" },
   13916 	{ ARM_INS_VQABS, "vqabs" },
   13917 	{ ARM_INS_VQADD, "vqadd" },
   13918 	{ ARM_INS_VQDMLAL, "vqdmlal" },
   13919 	{ ARM_INS_VQDMLSL, "vqdmlsl" },
   13920 	{ ARM_INS_VQDMULH, "vqdmulh" },
   13921 	{ ARM_INS_VQDMULL, "vqdmull" },
   13922 	{ ARM_INS_VQMOVUN, "vqmovun" },
   13923 	{ ARM_INS_VQMOVN, "vqmovn" },
   13924 	{ ARM_INS_VQNEG, "vqneg" },
   13925 	{ ARM_INS_VQRDMULH, "vqrdmulh" },
   13926 	{ ARM_INS_VQRSHL, "vqrshl" },
   13927 	{ ARM_INS_VQRSHRN, "vqrshrn" },
   13928 	{ ARM_INS_VQRSHRUN, "vqrshrun" },
   13929 	{ ARM_INS_VQSHL, "vqshl" },
   13930 	{ ARM_INS_VQSHLU, "vqshlu" },
   13931 	{ ARM_INS_VQSHRN, "vqshrn" },
   13932 	{ ARM_INS_VQSHRUN, "vqshrun" },
   13933 	{ ARM_INS_VQSUB, "vqsub" },
   13934 	{ ARM_INS_VRADDHN, "vraddhn" },
   13935 	{ ARM_INS_VRECPE, "vrecpe" },
   13936 	{ ARM_INS_VRECPS, "vrecps" },
   13937 	{ ARM_INS_VREV16, "vrev16" },
   13938 	{ ARM_INS_VREV32, "vrev32" },
   13939 	{ ARM_INS_VREV64, "vrev64" },
   13940 	{ ARM_INS_VRHADD, "vrhadd" },
   13941 	{ ARM_INS_VRINTA, "vrinta" },
   13942 	{ ARM_INS_VRINTM, "vrintm" },
   13943 	{ ARM_INS_VRINTN, "vrintn" },
   13944 	{ ARM_INS_VRINTP, "vrintp" },
   13945 	{ ARM_INS_VRINTR, "vrintr" },
   13946 	{ ARM_INS_VRINTX, "vrintx" },
   13947 	{ ARM_INS_VRINTZ, "vrintz" },
   13948 	{ ARM_INS_VRSHL, "vrshl" },
   13949 	{ ARM_INS_VRSHRN, "vrshrn" },
   13950 	{ ARM_INS_VRSHR, "vrshr" },
   13951 	{ ARM_INS_VRSQRTE, "vrsqrte" },
   13952 	{ ARM_INS_VRSQRTS, "vrsqrts" },
   13953 	{ ARM_INS_VRSRA, "vrsra" },
   13954 	{ ARM_INS_VRSUBHN, "vrsubhn" },
   13955 	{ ARM_INS_VSELEQ, "vseleq" },
   13956 	{ ARM_INS_VSELGE, "vselge" },
   13957 	{ ARM_INS_VSELGT, "vselgt" },
   13958 	{ ARM_INS_VSELVS, "vselvs" },
   13959 	{ ARM_INS_VSHLL, "vshll" },
   13960 	{ ARM_INS_VSHL, "vshl" },
   13961 	{ ARM_INS_VSHRN, "vshrn" },
   13962 	{ ARM_INS_VSHR, "vshr" },
   13963 	{ ARM_INS_VSLI, "vsli" },
   13964 	{ ARM_INS_VSQRT, "vsqrt" },
   13965 	{ ARM_INS_VSRA, "vsra" },
   13966 	{ ARM_INS_VSRI, "vsri" },
   13967 	{ ARM_INS_VST1, "vst1" },
   13968 	{ ARM_INS_VST2, "vst2" },
   13969 	{ ARM_INS_VST3, "vst3" },
   13970 	{ ARM_INS_VST4, "vst4" },
   13971 	{ ARM_INS_VSTMDB, "vstmdb" },
   13972 	{ ARM_INS_VSTMIA, "vstmia" },
   13973 	{ ARM_INS_VSTR, "vstr" },
   13974 	{ ARM_INS_VSUB, "vsub" },
   13975 	{ ARM_INS_VSUBHN, "vsubhn" },
   13976 	{ ARM_INS_VSUBL, "vsubl" },
   13977 	{ ARM_INS_VSUBW, "vsubw" },
   13978 	{ ARM_INS_VSWP, "vswp" },
   13979 	{ ARM_INS_VTBL, "vtbl" },
   13980 	{ ARM_INS_VTBX, "vtbx" },
   13981 	{ ARM_INS_VCVTR, "vcvtr" },
   13982 	{ ARM_INS_VTRN, "vtrn" },
   13983 	{ ARM_INS_VTST, "vtst" },
   13984 	{ ARM_INS_VUZP, "vuzp" },
   13985 	{ ARM_INS_VZIP, "vzip" },
   13986 	{ ARM_INS_ADDW, "addw" },
   13987 	{ ARM_INS_ASR, "asr" },
   13988 	{ ARM_INS_DCPS1, "dcps1" },
   13989 	{ ARM_INS_DCPS2, "dcps2" },
   13990 	{ ARM_INS_DCPS3, "dcps3" },
   13991 	{ ARM_INS_IT, "it" },
   13992 	{ ARM_INS_LSL, "lsl" },
   13993 	{ ARM_INS_LSR, "lsr" },
   13994 	{ ARM_INS_ASRS, "asrs" },
   13995 	{ ARM_INS_LSRS, "lsrs" },
   13996 	{ ARM_INS_ORN, "orn" },
   13997 	{ ARM_INS_ROR, "ror" },
   13998 	{ ARM_INS_RRX, "rrx" },
   13999 	{ ARM_INS_SUBS, "subs" },
   14000 	{ ARM_INS_SUBW, "subw" },
   14001 	{ ARM_INS_TBB, "tbb" },
   14002 	{ ARM_INS_TBH, "tbh" },
   14003 	{ ARM_INS_CBNZ, "cbnz" },
   14004 	{ ARM_INS_CBZ, "cbz" },
   14005 	{ ARM_INS_MOVS, "movs" },
   14006 	{ ARM_INS_POP, "pop" },
   14007 	{ ARM_INS_PUSH, "push" },
   14008 
   14009 	// special instructions
   14010 	{ ARM_INS_NOP, "nop" },
   14011 	{ ARM_INS_YIELD, "yield" },
   14012 	{ ARM_INS_WFE, "wfe" },
   14013 	{ ARM_INS_WFI, "wfi" },
   14014 	{ ARM_INS_SEV, "sev" },
   14015 	{ ARM_INS_SEVL, "sevl" },
   14016 	{ ARM_INS_VPUSH, "vpush" },
   14017 	{ ARM_INS_VPOP, "vpop" },
   14018 };
   14019 #endif
   14020 
   14021 const char *ARM_insn_name(csh handle, unsigned int id)
   14022 {
   14023 #ifndef CAPSTONE_DIET
   14024 	if (id >= ARM_INS_ENDING)
   14025 		return NULL;
   14026 
   14027 	return insn_name_maps[id].name;
   14028 #else
   14029 	return NULL;
   14030 #endif
   14031 }
   14032 
   14033 #ifndef CAPSTONE_DIET
   14034 static name_map group_name_maps[] = {
   14035 	// generic groups
   14036 	{ ARM_GRP_INVALID, NULL },
   14037 	{ ARM_GRP_JUMP,	"jump" },
   14038 
   14039 	// architecture-specific groups
   14040 	{ ARM_GRP_CRYPTO, "crypto" },
   14041 	{ ARM_GRP_DATABARRIER, "databarrier" },
   14042 	{ ARM_GRP_DIVIDE, "divide" },
   14043 	{ ARM_GRP_FPARMV8, "fparmv8" },
   14044 	{ ARM_GRP_MULTPRO, "multpro" },
   14045 	{ ARM_GRP_NEON, "neon" },
   14046 	{ ARM_GRP_T2EXTRACTPACK, "T2EXTRACTPACK" },
   14047 	{ ARM_GRP_THUMB2DSP, "THUMB2DSP" },
   14048 	{ ARM_GRP_TRUSTZONE, "TRUSTZONE" },
   14049 	{ ARM_GRP_V4T, "v4t" },
   14050 	{ ARM_GRP_V5T, "v5t" },
   14051 	{ ARM_GRP_V5TE, "v5te" },
   14052 	{ ARM_GRP_V6, "v6" },
   14053 	{ ARM_GRP_V6T2, "v6t2" },
   14054 	{ ARM_GRP_V7, "v7" },
   14055 	{ ARM_GRP_V8, "v8" },
   14056 	{ ARM_GRP_VFP2, "vfp2" },
   14057 	{ ARM_GRP_VFP3, "vfp3" },
   14058 	{ ARM_GRP_VFP4, "vfp4" },
   14059 	{ ARM_GRP_ARM, "arm" },
   14060 	{ ARM_GRP_MCLASS, "mclass" },
   14061 	{ ARM_GRP_NOTMCLASS, "notmclass" },
   14062 	{ ARM_GRP_THUMB, "thumb" },
   14063 	{ ARM_GRP_THUMB1ONLY, "thumb1only" },
   14064 	{ ARM_GRP_THUMB2, "thumb2" },
   14065 	{ ARM_GRP_PREV8, "prev8" },
   14066 	{ ARM_GRP_FPVMLX, "fpvmlx" },
   14067 	{ ARM_GRP_MULOPS, "mulops" },
   14068 	{ ARM_GRP_CRC, "crc" },
   14069 	{ ARM_GRP_DPVFP, "dpvfp" },
   14070 	{ ARM_GRP_V6M, "v6m" },
   14071 };
   14072 #endif
   14073 
   14074 const char *ARM_group_name(csh handle, unsigned int id)
   14075 {
   14076 #ifndef CAPSTONE_DIET
   14077 	// verify group id
   14078 	if (id >= ARM_GRP_ENDING || (id > ARM_GRP_JUMP && id < ARM_GRP_CRYPTO))
   14079 		return NULL;
   14080 
   14081 	// NOTE: when new generic groups are added, 2 must be changed accordingly
   14082 	if (id >= 128)
   14083 		return group_name_maps[id - 128 + 2].name;
   14084 	else
   14085 		return group_name_maps[id].name;
   14086 #else
   14087 	return NULL;
   14088 #endif
   14089 }
   14090 
   14091 // list all relative branch instructions
   14092 // ie: insns[i].branch && !insns[i].indirect_branch
   14093 static unsigned int insn_rel[] = {
   14094 	ARM_BL,
   14095 	ARM_BLX_pred,
   14096 	ARM_Bcc,
   14097 	ARM_t2B,
   14098 	ARM_t2Bcc,
   14099 	ARM_tB,
   14100 	ARM_tBcc,
   14101 	ARM_tCBNZ,
   14102 	ARM_tCBZ,
   14103 	ARM_BL_pred,
   14104 	ARM_BLXi,
   14105 	ARM_tBL,
   14106 	ARM_tBLXi,
   14107 	0
   14108 };
   14109 
   14110 static unsigned int insn_blx_rel_to_arm[] = {
   14111 	ARM_tBLXi,
   14112 	0
   14113 };
   14114 
   14115 // check if this insn is relative branch
   14116 bool ARM_rel_branch(cs_struct *h, unsigned int id)
   14117 {
   14118 	int i;
   14119 
   14120 	for (i = 0; insn_rel[i]; i++) {
   14121 		if (id == insn_rel[i]) {
   14122 			return true;
   14123 		}
   14124 	}
   14125 
   14126 	// not found
   14127 	return false;
   14128 }
   14129 
   14130 bool ARM_blx_to_arm_mode(cs_struct *h, unsigned int id) {
   14131 	int i;
   14132 
   14133 	for (i = 0; insn_blx_rel_to_arm[i]; i++)
   14134 		if (id == insn_blx_rel_to_arm[i])
   14135 			return true;
   14136 
   14137 	// not found
   14138 	return false;
   14139 
   14140 }
   14141 
   14142 #endif
   14143