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      1 /* libunwind - a platform-independent unwind library
      2    Copyright (C) 2008 CodeSourcery
      3    Copyright (C) 2012 Tommi Rantala <tt.rantala (at) gmail.com>
      4    Copyright (C) 2013 Linaro Limited
      5 
      6 This file is part of libunwind.
      7 
      8 Permission is hereby granted, free of charge, to any person obtaining
      9 a copy of this software and associated documentation files (the
     10 "Software"), to deal in the Software without restriction, including
     11 without limitation the rights to use, copy, modify, merge, publish,
     12 distribute, sublicense, and/or sell copies of the Software, and to
     13 permit persons to whom the Software is furnished to do so, subject to
     14 the following conditions:
     15 
     16 The above copyright notice and this permission notice shall be
     17 included in all copies or substantial portions of the Software.
     18 
     19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     22 NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
     23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
     24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
     25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
     26 
     27 #include "unwind_i.h"
     28 
     29 HIDDEN int
     30 tdep_access_reg (struct cursor *c, unw_regnum_t reg, unw_word_t *valp,
     31 		 int write)
     32 {
     33   dwarf_loc_t loc = DWARF_NULL_LOC;
     34   unsigned int mask;
     35 
     36   switch (reg)
     37     {
     38     case UNW_AARCH64_X0:
     39     case UNW_AARCH64_X1:
     40     case UNW_AARCH64_X2:
     41     case UNW_AARCH64_X3:
     42       mask = 1 << reg;
     43       if (write)
     44         {
     45           c->dwarf.eh_args[reg] = *valp;
     46           c->dwarf.eh_valid_mask |= mask;
     47           return 0;
     48         }
     49       else if ((c->dwarf.eh_valid_mask & mask) != 0)
     50         {
     51           *valp = c->dwarf.eh_args[reg];
     52           return 0;
     53         }
     54       else
     55         loc = c->dwarf.loc[reg];
     56       break;
     57 
     58     case UNW_AARCH64_X4:
     59     case UNW_AARCH64_X5:
     60     case UNW_AARCH64_X6:
     61     case UNW_AARCH64_X7:
     62     case UNW_AARCH64_X8:
     63     case UNW_AARCH64_X9:
     64     case UNW_AARCH64_X10:
     65     case UNW_AARCH64_X11:
     66     case UNW_AARCH64_X12:
     67     case UNW_AARCH64_X13:
     68     case UNW_AARCH64_X14:
     69     case UNW_AARCH64_X15:
     70     case UNW_AARCH64_X16:
     71     case UNW_AARCH64_X17:
     72     case UNW_AARCH64_X18:
     73     case UNW_AARCH64_X19:
     74     case UNW_AARCH64_X20:
     75     case UNW_AARCH64_X21:
     76     case UNW_AARCH64_X22:
     77     case UNW_AARCH64_X23:
     78     case UNW_AARCH64_X24:
     79     case UNW_AARCH64_X25:
     80     case UNW_AARCH64_X26:
     81     case UNW_AARCH64_X27:
     82     case UNW_AARCH64_X28:
     83     case UNW_AARCH64_X29:
     84     case UNW_AARCH64_X30:
     85     case UNW_AARCH64_PC:
     86     case UNW_AARCH64_PSTATE:
     87       loc = c->dwarf.loc[reg];
     88       break;
     89 
     90     case UNW_AARCH64_SP:
     91       if (write)
     92         return -UNW_EREADONLYREG;
     93       *valp = c->dwarf.cfa;
     94       return 0;
     95 
     96     default:
     97       Debug (1, "bad register number %u\n", reg);
     98       return -UNW_EBADREG;
     99     }
    100 
    101   if (write)
    102     return dwarf_put (&c->dwarf, loc, *valp);
    103   else
    104     return dwarf_get (&c->dwarf, loc, valp);
    105 }
    106 
    107 HIDDEN int
    108 tdep_access_fpreg (struct cursor *c, unw_regnum_t reg, unw_fpreg_t *valp,
    109 		   int write)
    110 {
    111   Debug (1, "bad register number %u\n", reg);
    112   return -UNW_EBADREG;
    113 }
    114