1 //===-- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ---*- C++ -*--===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains support for writing dwarf compile unit. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 15 #define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H 16 17 #include "llvm/IR/DebugInfo.h" 18 #include "llvm/Support/DataTypes.h" 19 20 namespace llvm { 21 22 class AsmPrinter; 23 class ByteStreamer; 24 class TargetRegisterInfo; 25 class DwarfUnit; 26 class DIELoc; 27 28 /// Base class containing the logic for constructing DWARF expressions 29 /// independently of whether they are emitted into a DIE or into a .debug_loc 30 /// entry. 31 class DwarfExpression { 32 protected: 33 // Various convenience accessors that extract things out of AsmPrinter. 34 unsigned DwarfVersion; 35 36 public: 37 DwarfExpression(unsigned DwarfVersion) : DwarfVersion(DwarfVersion) {} 38 virtual ~DwarfExpression() {} 39 40 /// Output a dwarf operand and an optional assembler comment. 41 virtual void EmitOp(uint8_t Op, const char *Comment = nullptr) = 0; 42 /// Emit a raw signed value. 43 virtual void EmitSigned(int64_t Value) = 0; 44 /// Emit a raw unsigned value. 45 virtual void EmitUnsigned(uint64_t Value) = 0; 46 /// Return whether the given machine register is the frame register in the 47 /// current function. 48 virtual bool isFrameRegister(const TargetRegisterInfo &TRI, unsigned MachineReg) = 0; 49 50 /// Emit a dwarf register operation. 51 void AddReg(int DwarfReg, const char *Comment = nullptr); 52 /// Emit an (double-)indirect dwarf register operation. 53 void AddRegIndirect(int DwarfReg, int Offset, bool Deref = false); 54 55 /// Emit a dwarf register operation for describing 56 /// - a small value occupying only part of a register or 57 /// - a register representing only part of a value. 58 void AddOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0); 59 /// Emit a shift-right dwarf expression. 60 void AddShr(unsigned ShiftBy); 61 /// Emit a DW_OP_stack_value, if supported. 62 /// 63 /// The proper way to describe a constant value is 64 /// DW_OP_constu <const>, DW_OP_stack_value. 65 /// Unfortunately, DW_OP_stack_value was not available until DWARF-4, 66 /// so we will continue to generate DW_OP_constu <const> for DWARF-2 67 /// and DWARF-3. Technically, this is incorrect since DW_OP_const <const> 68 /// actually describes a value at a constant addess, not a constant value. 69 /// However, in the past there was no better way to describe a constant 70 /// value, so the producers and consumers started to rely on heuristics 71 /// to disambiguate the value vs. location status of the expression. 72 /// See PR21176 for more details. 73 void AddStackValue(); 74 75 /// Emit an indirect dwarf register operation for the given machine register. 76 /// \return false if no DWARF register exists for MachineReg. 77 bool AddMachineRegIndirect(const TargetRegisterInfo &TRI, unsigned MachineReg, 78 int Offset = 0); 79 80 /// \brief Emit a partial DWARF register operation. 81 /// \param MachineReg the register 82 /// \param PieceSizeInBits size and 83 /// \param PieceOffsetInBits offset of the piece in bits, if this is one 84 /// piece of an aggregate value. 85 /// 86 /// If size and offset is zero an operation for the entire 87 /// register is emitted: Some targets do not provide a DWARF 88 /// register number for every register. If this is the case, this 89 /// function will attempt to emit a DWARF register by emitting a 90 /// piece of a super-register or by piecing together multiple 91 /// subregisters that alias the register. 92 /// 93 /// \return false if no DWARF register exists for MachineReg. 94 bool AddMachineRegPiece(const TargetRegisterInfo &TRI, unsigned MachineReg, 95 unsigned PieceSizeInBits = 0, 96 unsigned PieceOffsetInBits = 0); 97 98 /// Emit a signed constant. 99 void AddSignedConstant(int64_t Value); 100 /// Emit an unsigned constant. 101 void AddUnsignedConstant(uint64_t Value); 102 /// Emit an unsigned constant. 103 void AddUnsignedConstant(const APInt &Value); 104 105 /// \brief Emit an entire expression on top of a machine register location. 106 /// 107 /// \param PieceOffsetInBits If this is one piece out of a fragmented 108 /// location, this is the offset of the piece inside the entire variable. 109 /// \return false if no DWARF register exists for MachineReg. 110 bool AddMachineRegExpression(const TargetRegisterInfo &TRI, 111 const DIExpression *Expr, unsigned MachineReg, 112 unsigned PieceOffsetInBits = 0); 113 /// Emit a the operations remaining the DIExpressionIterator I. 114 /// \param PieceOffsetInBits If this is one piece out of a fragmented 115 /// location, this is the offset of the piece inside the entire variable. 116 void AddExpression(DIExpression::expr_op_iterator I, 117 DIExpression::expr_op_iterator E, 118 unsigned PieceOffsetInBits = 0); 119 }; 120 121 /// DwarfExpression implementation for .debug_loc entries. 122 class DebugLocDwarfExpression : public DwarfExpression { 123 ByteStreamer &BS; 124 125 public: 126 DebugLocDwarfExpression(unsigned DwarfVersion, ByteStreamer &BS) 127 : DwarfExpression(DwarfVersion), BS(BS) {} 128 129 void EmitOp(uint8_t Op, const char *Comment = nullptr) override; 130 void EmitSigned(int64_t Value) override; 131 void EmitUnsigned(uint64_t Value) override; 132 bool isFrameRegister(const TargetRegisterInfo &TRI, 133 unsigned MachineReg) override; 134 }; 135 136 /// DwarfExpression implementation for singular DW_AT_location. 137 class DIEDwarfExpression : public DwarfExpression { 138 const AsmPrinter &AP; 139 DwarfUnit &DU; 140 DIELoc &DIE; 141 142 public: 143 DIEDwarfExpression(const AsmPrinter &AP, DwarfUnit &DU, DIELoc &DIE); 144 void EmitOp(uint8_t Op, const char *Comment = nullptr) override; 145 void EmitSigned(int64_t Value) override; 146 void EmitUnsigned(uint64_t Value) override; 147 bool isFrameRegister(const TargetRegisterInfo &TRI, 148 unsigned MachineReg) override; 149 }; 150 } 151 152 #endif 153
