1 //===-- LiveStackAnalysis.cpp - Live Stack Slot Analysis ------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file implements the live stack slot analysis pass. It is analogous to 11 // live interval analysis except it's analyzing liveness of stack slots rather 12 // than registers. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #include "llvm/CodeGen/LiveStackAnalysis.h" 17 #include "llvm/CodeGen/LiveIntervalAnalysis.h" 18 #include "llvm/CodeGen/Passes.h" 19 #include "llvm/Support/Debug.h" 20 #include "llvm/Support/raw_ostream.h" 21 #include "llvm/Target/TargetRegisterInfo.h" 22 #include "llvm/Target/TargetSubtargetInfo.h" 23 using namespace llvm; 24 25 #define DEBUG_TYPE "livestacks" 26 27 char LiveStacks::ID = 0; 28 INITIALIZE_PASS_BEGIN(LiveStacks, "livestacks", 29 "Live Stack Slot Analysis", false, false) 30 INITIALIZE_PASS_DEPENDENCY(SlotIndexes) 31 INITIALIZE_PASS_END(LiveStacks, "livestacks", 32 "Live Stack Slot Analysis", false, false) 33 34 char &llvm::LiveStacksID = LiveStacks::ID; 35 36 void LiveStacks::getAnalysisUsage(AnalysisUsage &AU) const { 37 AU.setPreservesAll(); 38 AU.addPreserved<SlotIndexes>(); 39 AU.addRequiredTransitive<SlotIndexes>(); 40 MachineFunctionPass::getAnalysisUsage(AU); 41 } 42 43 void LiveStacks::releaseMemory() { 44 // Release VNInfo memory regions, VNInfo objects don't need to be dtor'd. 45 VNInfoAllocator.Reset(); 46 S2IMap.clear(); 47 S2RCMap.clear(); 48 } 49 50 bool LiveStacks::runOnMachineFunction(MachineFunction &MF) { 51 TRI = MF.getSubtarget().getRegisterInfo(); 52 // FIXME: No analysis is being done right now. We are relying on the 53 // register allocators to provide the information. 54 return false; 55 } 56 57 LiveInterval & 58 LiveStacks::getOrCreateInterval(int Slot, const TargetRegisterClass *RC) { 59 assert(Slot >= 0 && "Spill slot indice must be >= 0"); 60 SS2IntervalMap::iterator I = S2IMap.find(Slot); 61 if (I == S2IMap.end()) { 62 I = S2IMap.emplace(std::piecewise_construct, std::forward_as_tuple(Slot), 63 std::forward_as_tuple( 64 TargetRegisterInfo::index2StackSlot(Slot), 0.0F)) 65 .first; 66 S2RCMap.insert(std::make_pair(Slot, RC)); 67 } else { 68 // Use the largest common subclass register class. 69 const TargetRegisterClass *OldRC = S2RCMap[Slot]; 70 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); 71 } 72 return I->second; 73 } 74 75 /// print - Implement the dump method. 76 void LiveStacks::print(raw_ostream &OS, const Module*) const { 77 78 OS << "********** INTERVALS **********\n"; 79 for (const_iterator I = begin(), E = end(); I != E; ++I) { 80 I->second.print(OS); 81 int Slot = I->first; 82 const TargetRegisterClass *RC = getIntervalRegClass(Slot); 83 if (RC) 84 OS << " [" << TRI->getRegClassName(RC) << "]\n"; 85 else 86 OS << " [Unknown]\n"; 87 } 88 } 89
