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      1 //===-- RegUsageInfoCollector.cpp - Register Usage Information Collector --===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 ///
     10 /// This pass is required to take advantage of the interprocedural register
     11 /// allocation infrastructure.
     12 ///
     13 /// This pass is simple MachineFunction pass which collects register usage
     14 /// details by iterating through each physical registers and checking
     15 /// MRI::isPhysRegUsed() then creates a RegMask based on this details.
     16 /// The pass then stores this RegMask in PhysicalRegisterUsageInfo.cpp
     17 ///
     18 //===----------------------------------------------------------------------===//
     19 
     20 #include "llvm/ADT/Statistic.h"
     21 #include "llvm/CodeGen/MachineBasicBlock.h"
     22 #include "llvm/CodeGen/MachineFunctionPass.h"
     23 #include "llvm/CodeGen/MachineInstr.h"
     24 #include "llvm/CodeGen/MachineOperand.h"
     25 #include "llvm/CodeGen/MachineRegisterInfo.h"
     26 #include "llvm/CodeGen/Passes.h"
     27 #include "llvm/CodeGen/RegisterUsageInfo.h"
     28 #include "llvm/Support/Debug.h"
     29 #include "llvm/Support/raw_ostream.h"
     30 #include "llvm/Target/TargetFrameLowering.h"
     31 
     32 using namespace llvm;
     33 
     34 #define DEBUG_TYPE "ip-regalloc"
     35 
     36 STATISTIC(NumCSROpt,
     37           "Number of functions optimized for callee saved registers");
     38 
     39 namespace llvm {
     40 void initializeRegUsageInfoCollectorPass(PassRegistry &);
     41 }
     42 
     43 namespace {
     44 class RegUsageInfoCollector : public MachineFunctionPass {
     45 public:
     46   RegUsageInfoCollector() : MachineFunctionPass(ID) {
     47     PassRegistry &Registry = *PassRegistry::getPassRegistry();
     48     initializeRegUsageInfoCollectorPass(Registry);
     49   }
     50 
     51   const char *getPassName() const override {
     52     return "Register Usage Information Collector Pass";
     53   }
     54 
     55   void getAnalysisUsage(AnalysisUsage &AU) const override;
     56 
     57   bool runOnMachineFunction(MachineFunction &MF) override;
     58 
     59   static char ID;
     60 
     61 private:
     62   void markRegClobbered(const TargetRegisterInfo *TRI, uint32_t *RegMask,
     63                         unsigned PReg);
     64 };
     65 } // end of anonymous namespace
     66 
     67 char RegUsageInfoCollector::ID = 0;
     68 
     69 INITIALIZE_PASS_BEGIN(RegUsageInfoCollector, "RegUsageInfoCollector",
     70                       "Register Usage Information Collector", false, false)
     71 INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfo)
     72 INITIALIZE_PASS_END(RegUsageInfoCollector, "RegUsageInfoCollector",
     73                     "Register Usage Information Collector", false, false)
     74 
     75 FunctionPass *llvm::createRegUsageInfoCollector() {
     76   return new RegUsageInfoCollector();
     77 }
     78 
     79 void RegUsageInfoCollector::markRegClobbered(const TargetRegisterInfo *TRI,
     80                                              uint32_t *RegMask, unsigned PReg) {
     81   // If PReg is clobbered then all of its alias are also clobbered.
     82   for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI)
     83     RegMask[*AI / 32] &= ~(1u << *AI % 32);
     84 }
     85 
     86 void RegUsageInfoCollector::getAnalysisUsage(AnalysisUsage &AU) const {
     87   AU.addRequired<PhysicalRegisterUsageInfo>();
     88   AU.setPreservesAll();
     89   MachineFunctionPass::getAnalysisUsage(AU);
     90 }
     91 
     92 bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
     93   MachineRegisterInfo *MRI = &MF.getRegInfo();
     94   const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
     95   const TargetMachine &TM = MF.getTarget();
     96 
     97   DEBUG(dbgs() << " -------------------- " << getPassName()
     98                << " -------------------- \n");
     99   DEBUG(dbgs() << "Function Name : " << MF.getName() << "\n");
    100 
    101   std::vector<uint32_t> RegMask;
    102 
    103   // Compute the size of the bit vector to represent all the registers.
    104   // The bit vector is broken into 32-bit chunks, thus takes the ceil of
    105   // the number of registers divided by 32 for the size.
    106   unsigned RegMaskSize = (TRI->getNumRegs() + 31) / 32;
    107   RegMask.resize(RegMaskSize, 0xFFFFFFFF);
    108 
    109   const Function *F = MF.getFunction();
    110 
    111   PhysicalRegisterUsageInfo *PRUI = &getAnalysis<PhysicalRegisterUsageInfo>();
    112 
    113   PRUI->setTargetMachine(&TM);
    114 
    115   DEBUG(dbgs() << "Clobbered Registers: ");
    116 
    117   for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg)
    118     if (MRI->isPhysRegModified(PReg, true))
    119       markRegClobbered(TRI, &RegMask[0], PReg);
    120 
    121   if (!TargetFrameLowering::isSafeForNoCSROpt(F)) {
    122     const uint32_t *CallPreservedMask =
    123         TRI->getCallPreservedMask(MF, F->getCallingConv());
    124     // Set callee saved register as preserved.
    125     for (unsigned i = 0; i < RegMaskSize; ++i)
    126       RegMask[i] = RegMask[i] | CallPreservedMask[i];
    127   } else {
    128     ++NumCSROpt;
    129     DEBUG(dbgs() << MF.getName()
    130                  << " function optimized for not having CSR.\n");
    131   }
    132 
    133   for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg)
    134     if (MachineOperand::clobbersPhysReg(&(RegMask[0]), PReg))
    135       DEBUG(dbgs() << TRI->getName(PReg) << " ");
    136 
    137   DEBUG(dbgs() << " \n----------------------------------------\n");
    138 
    139   PRUI->storeUpdateRegUsageInfo(F, std::move(RegMask));
    140 
    141   return false;
    142 }
    143