1 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl --*- C++ -*-==// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the AArch64 implementation of the MRegisterInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H 15 #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H 16 17 #define GET_REGINFO_HEADER 18 #include "AArch64GenRegisterInfo.inc" 19 20 namespace llvm { 21 22 class MachineFunction; 23 class RegScavenger; 24 class TargetRegisterClass; 25 class Triple; 26 27 struct AArch64RegisterInfo : public AArch64GenRegisterInfo { 28 private: 29 const Triple &TT; 30 31 public: 32 AArch64RegisterInfo(const Triple &TT); 33 34 bool isReservedReg(const MachineFunction &MF, unsigned Reg) const; 35 36 /// Code Generation virtual methods... 37 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; 38 const MCPhysReg * 39 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const override; 40 const uint32_t *getCallPreservedMask(const MachineFunction &MF, 41 CallingConv::ID) const override; 42 43 unsigned getCSRFirstUseCost() const override { 44 // The cost will be compared against BlockFrequency where entry has the 45 // value of 1 << 14. A value of 5 will choose to spill or split really 46 // cold path instead of using a callee-saved register. 47 return 5; 48 } 49 50 // Calls involved in thread-local variable lookup save more registers than 51 // normal calls, so they need a different mask to represent this. 52 const uint32_t *getTLSCallPreservedMask() const; 53 54 /// getThisReturnPreservedMask - Returns a call preserved mask specific to the 55 /// case that 'returned' is on an i64 first argument if the calling convention 56 /// is one that can (partially) model this attribute with a preserved mask 57 /// (i.e. it is a calling convention that uses the same register for the first 58 /// i64 argument and an i64 return value) 59 /// 60 /// Should return NULL in the case that the calling convention does not have 61 /// this property 62 const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF, 63 CallingConv::ID) const; 64 65 BitVector getReservedRegs(const MachineFunction &MF) const override; 66 const TargetRegisterClass * 67 getPointerRegClass(const MachineFunction &MF, 68 unsigned Kind = 0) const override; 69 const TargetRegisterClass * 70 getCrossCopyRegClass(const TargetRegisterClass *RC) const override; 71 72 bool requiresRegisterScavenging(const MachineFunction &MF) const override; 73 bool useFPForScavengingIndex(const MachineFunction &MF) const override; 74 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override; 75 76 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override; 77 bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg, 78 int64_t Offset) const override; 79 void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg, 80 int FrameIdx, 81 int64_t Offset) const override; 82 void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg, 83 int64_t Offset) const override; 84 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, 85 unsigned FIOperandNum, 86 RegScavenger *RS = nullptr) const override; 87 bool cannotEliminateFrame(const MachineFunction &MF) const; 88 89 bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override; 90 bool hasBasePointer(const MachineFunction &MF) const; 91 unsigned getBaseRegister() const; 92 93 // Debug information queries. 94 unsigned getFrameRegister(const MachineFunction &MF) const override; 95 96 unsigned getRegPressureLimit(const TargetRegisterClass *RC, 97 MachineFunction &MF) const override; 98 }; 99 100 } // end namespace llvm 101 102 #endif 103
