1 //===-- Processors.td - R600 Processor definitions ------------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 class Proc<string Name, ProcessorItineraries itin, list<SubtargetFeature> Features> 11 : Processor<Name, itin, Features>; 12 13 //===----------------------------------------------------------------------===// 14 // R600 15 //===----------------------------------------------------------------------===// 16 def : Proc<"r600", R600_VLIW5_Itin, 17 [FeatureR600, FeatureVertexCache, FeatureWavefrontSize64]>; 18 19 def : Proc<"r630", R600_VLIW5_Itin, 20 [FeatureR600, FeatureVertexCache, FeatureWavefrontSize32]>; 21 22 def : Proc<"rs880", R600_VLIW5_Itin, 23 [FeatureR600, FeatureWavefrontSize16]>; 24 25 def : Proc<"rv670", R600_VLIW5_Itin, 26 [FeatureR600, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>; 27 28 //===----------------------------------------------------------------------===// 29 // R700 30 //===----------------------------------------------------------------------===// 31 32 def : Proc<"rv710", R600_VLIW5_Itin, 33 [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>; 34 35 def : Proc<"rv730", R600_VLIW5_Itin, 36 [FeatureR700, FeatureVertexCache, FeatureWavefrontSize32]>; 37 38 def : Proc<"rv770", R600_VLIW5_Itin, 39 [FeatureR700, FeatureFP64, FeatureVertexCache, FeatureWavefrontSize64]>; 40 41 //===----------------------------------------------------------------------===// 42 // Evergreen 43 //===----------------------------------------------------------------------===// 44 45 def : Proc<"cedar", R600_VLIW5_Itin, 46 [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize32, 47 FeatureCFALUBug]>; 48 49 def : Proc<"redwood", R600_VLIW5_Itin, 50 [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64, 51 FeatureCFALUBug]>; 52 53 def : Proc<"sumo", R600_VLIW5_Itin, 54 [FeatureEvergreen, FeatureWavefrontSize64, FeatureCFALUBug]>; 55 56 def : Proc<"juniper", R600_VLIW5_Itin, 57 [FeatureEvergreen, FeatureVertexCache, FeatureWavefrontSize64]>; 58 59 def : Proc<"cypress", R600_VLIW5_Itin, 60 [FeatureEvergreen, FeatureFP64, FeatureVertexCache, 61 FeatureWavefrontSize64]>; 62 63 //===----------------------------------------------------------------------===// 64 // Northern Islands 65 //===----------------------------------------------------------------------===// 66 67 def : Proc<"barts", R600_VLIW5_Itin, 68 [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>; 69 70 def : Proc<"turks", R600_VLIW5_Itin, 71 [FeatureNorthernIslands, FeatureVertexCache, FeatureCFALUBug]>; 72 73 def : Proc<"caicos", R600_VLIW5_Itin, 74 [FeatureNorthernIslands, FeatureCFALUBug]>; 75 76 def : Proc<"cayman", R600_VLIW4_Itin, 77 [FeatureNorthernIslands, FeatureFP64, FeatureCaymanISA]>; 78 79 //===----------------------------------------------------------------------===// 80 // Southern Islands 81 //===----------------------------------------------------------------------===// 82 83 def : ProcessorModel<"SI", SIFullSpeedModel, 84 [FeatureSouthernIslands, FeatureFastFMAF32, HalfRate64Ops] 85 >; 86 87 def : ProcessorModel<"tahiti", SIFullSpeedModel, 88 [FeatureSouthernIslands, FeatureFastFMAF32, HalfRate64Ops] 89 >; 90 91 def : ProcessorModel<"pitcairn", SIQuarterSpeedModel, [FeatureSouthernIslands]>; 92 93 def : ProcessorModel<"verde", SIQuarterSpeedModel, [FeatureSouthernIslands]>; 94 95 def : ProcessorModel<"oland", SIQuarterSpeedModel, [FeatureSouthernIslands]>; 96 97 def : ProcessorModel<"hainan", SIQuarterSpeedModel, [FeatureSouthernIslands]>; 98 99 //===----------------------------------------------------------------------===// 100 // Sea Islands 101 //===----------------------------------------------------------------------===// 102 103 def : ProcessorModel<"bonaire", SIQuarterSpeedModel, 104 [FeatureSeaIslands, FeatureLDSBankCount32, FeatureISAVersion7_0_0] 105 >; 106 107 def : ProcessorModel<"kabini", SIQuarterSpeedModel, 108 [FeatureSeaIslands, FeatureLDSBankCount16] 109 >; 110 111 def : ProcessorModel<"kaveri", SIQuarterSpeedModel, 112 [FeatureSeaIslands, FeatureLDSBankCount32, FeatureISAVersion7_0_0] 113 >; 114 115 def : ProcessorModel<"hawaii", SIFullSpeedModel, 116 [FeatureSeaIslands, FeatureFastFMAF32, HalfRate64Ops, 117 FeatureLDSBankCount32, FeatureISAVersion7_0_1] 118 >; 119 120 def : ProcessorModel<"mullins", SIQuarterSpeedModel, 121 [FeatureSeaIslands, FeatureLDSBankCount16]>; 122 123 //===----------------------------------------------------------------------===// 124 // Volcanic Islands 125 //===----------------------------------------------------------------------===// 126 127 def : ProcessorModel<"tonga", SIQuarterSpeedModel, 128 [FeatureVolcanicIslands, FeatureSGPRInitBug, FeatureISAVersion8_0_0, 129 FeatureLDSBankCount32] 130 >; 131 132 def : ProcessorModel<"iceland", SIQuarterSpeedModel, 133 [FeatureVolcanicIslands, FeatureSGPRInitBug, FeatureISAVersion8_0_0, 134 FeatureLDSBankCount32] 135 >; 136 137 def : ProcessorModel<"carrizo", SIQuarterSpeedModel, 138 [FeatureVolcanicIslands, FeatureISAVersion8_0_1, FeatureLDSBankCount32] 139 >; 140 141 def : ProcessorModel<"fiji", SIQuarterSpeedModel, 142 [FeatureVolcanicIslands, FeatureISAVersion8_0_3, FeatureLDSBankCount32] 143 >; 144 145 def : ProcessorModel<"stoney", SIQuarterSpeedModel, 146 [FeatureVolcanicIslands, FeatureISAVersion8_0_1, FeatureLDSBankCount16] 147 >; 148 149 def : ProcessorModel<"polaris10", SIQuarterSpeedModel, 150 [FeatureVolcanicIslands, FeatureISAVersion8_0_1, FeatureLDSBankCount32] 151 >; 152 153 def : ProcessorModel<"polaris11", SIQuarterSpeedModel, 154 [FeatureVolcanicIslands, FeatureISAVersion8_0_1, FeatureLDSBankCount32] 155 >; 156
