1 //===---- MipsISelDAGToDAG.h - A Dag to Dag Inst Selector for Mips --------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines an instruction selector for the MIPS target. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H 15 #define LLVM_LIB_TARGET_MIPS_MIPSISELDAGTODAG_H 16 17 #include "Mips.h" 18 #include "MipsSubtarget.h" 19 #include "MipsTargetMachine.h" 20 #include "llvm/CodeGen/SelectionDAGISel.h" 21 22 //===----------------------------------------------------------------------===// 23 // Instruction Selector Implementation 24 //===----------------------------------------------------------------------===// 25 26 //===----------------------------------------------------------------------===// 27 // MipsDAGToDAGISel - MIPS specific code to select MIPS machine 28 // instructions for SelectionDAG operations. 29 //===----------------------------------------------------------------------===// 30 namespace llvm { 31 32 class MipsDAGToDAGISel : public SelectionDAGISel { 33 public: 34 explicit MipsDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL) 35 : SelectionDAGISel(TM, OL), Subtarget(nullptr) {} 36 37 // Pass Name 38 const char *getPassName() const override { 39 return "MIPS DAG->DAG Pattern Instruction Selection"; 40 } 41 42 bool runOnMachineFunction(MachineFunction &MF) override; 43 44 protected: 45 SDNode *getGlobalBaseReg(); 46 47 /// Keep a pointer to the MipsSubtarget around so that we can make the right 48 /// decision when generating code for different targets. 49 const MipsSubtarget *Subtarget; 50 51 private: 52 // Include the pieces autogenerated from the target description. 53 #include "MipsGenDAGISel.inc" 54 55 // Complex Pattern. 56 /// (reg + imm). 57 virtual bool selectAddrRegImm(SDValue Addr, SDValue &Base, 58 SDValue &Offset) const; 59 60 /// Fall back on this function if all else fails. 61 virtual bool selectAddrDefault(SDValue Addr, SDValue &Base, 62 SDValue &Offset) const; 63 64 /// Match integer address pattern. 65 virtual bool selectIntAddr(SDValue Addr, SDValue &Base, 66 SDValue &Offset) const; 67 68 virtual bool selectIntAddr11MM(SDValue Addr, SDValue &Base, 69 SDValue &Offset) const; 70 71 virtual bool selectIntAddr12MM(SDValue Addr, SDValue &Base, 72 SDValue &Offset) const; 73 74 virtual bool selectIntAddr16MM(SDValue Addr, SDValue &Base, 75 SDValue &Offset) const; 76 77 virtual bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, 78 SDValue &Offset) const; 79 80 /// Match addr+simm10 and addr 81 virtual bool selectIntAddrMSA(SDValue Addr, SDValue &Base, 82 SDValue &Offset) const; 83 84 virtual bool selectAddr16(SDValue Addr, SDValue &Base, SDValue &Offset); 85 virtual bool selectAddr16SP(SDValue Addr, SDValue &Base, SDValue &Offset); 86 87 /// \brief Select constant vector splats. 88 virtual bool selectVSplat(SDNode *N, APInt &Imm, 89 unsigned MinSizeInBits) const; 90 /// \brief Select constant vector splats whose value fits in a uimm1. 91 virtual bool selectVSplatUimm1(SDValue N, SDValue &Imm) const; 92 /// \brief Select constant vector splats whose value fits in a uimm2. 93 virtual bool selectVSplatUimm2(SDValue N, SDValue &Imm) const; 94 /// \brief Select constant vector splats whose value fits in a uimm3. 95 virtual bool selectVSplatUimm3(SDValue N, SDValue &Imm) const; 96 /// \brief Select constant vector splats whose value fits in a uimm4. 97 virtual bool selectVSplatUimm4(SDValue N, SDValue &Imm) const; 98 /// \brief Select constant vector splats whose value fits in a uimm5. 99 virtual bool selectVSplatUimm5(SDValue N, SDValue &Imm) const; 100 /// \brief Select constant vector splats whose value fits in a uimm6. 101 virtual bool selectVSplatUimm6(SDValue N, SDValue &Imm) const; 102 /// \brief Select constant vector splats whose value fits in a uimm8. 103 virtual bool selectVSplatUimm8(SDValue N, SDValue &Imm) const; 104 /// \brief Select constant vector splats whose value fits in a simm5. 105 virtual bool selectVSplatSimm5(SDValue N, SDValue &Imm) const; 106 /// \brief Select constant vector splats whose value is a power of 2. 107 virtual bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const; 108 /// \brief Select constant vector splats whose value is the inverse of a 109 /// power of 2. 110 virtual bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const; 111 /// \brief Select constant vector splats whose value is a run of set bits 112 /// ending at the most significant bit 113 virtual bool selectVSplatMaskL(SDValue N, SDValue &Imm) const; 114 /// \brief Select constant vector splats whose value is a run of set bits 115 /// starting at bit zero. 116 virtual bool selectVSplatMaskR(SDValue N, SDValue &Imm) const; 117 118 void Select(SDNode *N) override; 119 120 virtual bool trySelect(SDNode *Node) = 0; 121 122 // getImm - Return a target constant with the specified value. 123 inline SDValue getImm(const SDNode *Node, uint64_t Imm) { 124 return CurDAG->getTargetConstant(Imm, SDLoc(Node), Node->getValueType(0)); 125 } 126 127 virtual void processFunctionAfterISel(MachineFunction &MF) = 0; 128 129 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 130 unsigned ConstraintID, 131 std::vector<SDValue> &OutOps) override; 132 }; 133 } 134 135 #endif 136
