1 //===-- MipsSEISelDAGToDAG.h - A Dag to Dag Inst Selector for MipsSE -----===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Subclass of MipsDAGToDAGISel specialized for mips32/64. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H 15 #define LLVM_LIB_TARGET_MIPS_MIPSSEISELDAGTODAG_H 16 17 #include "MipsISelDAGToDAG.h" 18 19 namespace llvm { 20 21 class MipsSEDAGToDAGISel : public MipsDAGToDAGISel { 22 23 public: 24 explicit MipsSEDAGToDAGISel(MipsTargetMachine &TM, CodeGenOpt::Level OL) 25 : MipsDAGToDAGISel(TM, OL) {} 26 27 private: 28 29 bool runOnMachineFunction(MachineFunction &MF) override; 30 31 void addDSPCtrlRegOperands(bool IsDef, MachineInstr &MI, 32 MachineFunction &MF); 33 34 unsigned getMSACtrlReg(const SDValue RegIdx) const; 35 36 bool replaceUsesWithZeroReg(MachineRegisterInfo *MRI, const MachineInstr&); 37 38 std::pair<SDNode *, SDNode *> selectMULT(SDNode *N, unsigned Opc, 39 const SDLoc &dl, EVT Ty, bool HasLo, 40 bool HasHi); 41 42 void selectAddESubE(unsigned MOp, SDValue InFlag, SDValue CmpLHS, 43 const SDLoc &DL, SDNode *Node) const; 44 45 bool selectAddrFrameIndex(SDValue Addr, SDValue &Base, SDValue &Offset) const; 46 bool selectAddrFrameIndexOffset(SDValue Addr, SDValue &Base, SDValue &Offset, 47 unsigned OffsetBits) const; 48 49 bool selectAddrRegImm(SDValue Addr, SDValue &Base, 50 SDValue &Offset) const override; 51 52 bool selectAddrDefault(SDValue Addr, SDValue &Base, 53 SDValue &Offset) const override; 54 55 bool selectIntAddr(SDValue Addr, SDValue &Base, 56 SDValue &Offset) const override; 57 58 bool selectAddrRegImm9(SDValue Addr, SDValue &Base, 59 SDValue &Offset) const; 60 61 bool selectAddrRegImm10(SDValue Addr, SDValue &Base, 62 SDValue &Offset) const; 63 64 bool selectAddrRegImm11(SDValue Addr, SDValue &Base, 65 SDValue &Offset) const; 66 67 bool selectAddrRegImm12(SDValue Addr, SDValue &Base, 68 SDValue &Offset) const; 69 70 bool selectAddrRegImm16(SDValue Addr, SDValue &Base, 71 SDValue &Offset) const; 72 73 bool selectIntAddr11MM(SDValue Addr, SDValue &Base, 74 SDValue &Offset) const override; 75 76 bool selectIntAddr12MM(SDValue Addr, SDValue &Base, 77 SDValue &Offset) const override; 78 79 bool selectIntAddr16MM(SDValue Addr, SDValue &Base, 80 SDValue &Offset) const override; 81 82 bool selectIntAddrLSL2MM(SDValue Addr, SDValue &Base, 83 SDValue &Offset) const override; 84 85 bool selectIntAddrMSA(SDValue Addr, SDValue &Base, 86 SDValue &Offset) const override; 87 88 /// \brief Select constant vector splats. 89 bool selectVSplat(SDNode *N, APInt &Imm, 90 unsigned MinSizeInBits) const override; 91 /// \brief Select constant vector splats whose value fits in a given integer. 92 bool selectVSplatCommon(SDValue N, SDValue &Imm, bool Signed, 93 unsigned ImmBitSize) const; 94 /// \brief Select constant vector splats whose value fits in a uimm1. 95 bool selectVSplatUimm1(SDValue N, SDValue &Imm) const override; 96 /// \brief Select constant vector splats whose value fits in a uimm2. 97 bool selectVSplatUimm2(SDValue N, SDValue &Imm) const override; 98 /// \brief Select constant vector splats whose value fits in a uimm3. 99 bool selectVSplatUimm3(SDValue N, SDValue &Imm) const override; 100 /// \brief Select constant vector splats whose value fits in a uimm4. 101 bool selectVSplatUimm4(SDValue N, SDValue &Imm) const override; 102 /// \brief Select constant vector splats whose value fits in a uimm5. 103 bool selectVSplatUimm5(SDValue N, SDValue &Imm) const override; 104 /// \brief Select constant vector splats whose value fits in a uimm6. 105 bool selectVSplatUimm6(SDValue N, SDValue &Imm) const override; 106 /// \brief Select constant vector splats whose value fits in a uimm8. 107 bool selectVSplatUimm8(SDValue N, SDValue &Imm) const override; 108 /// \brief Select constant vector splats whose value fits in a simm5. 109 bool selectVSplatSimm5(SDValue N, SDValue &Imm) const override; 110 /// \brief Select constant vector splats whose value is a power of 2. 111 bool selectVSplatUimmPow2(SDValue N, SDValue &Imm) const override; 112 /// \brief Select constant vector splats whose value is the inverse of a 113 /// power of 2. 114 bool selectVSplatUimmInvPow2(SDValue N, SDValue &Imm) const override; 115 /// \brief Select constant vector splats whose value is a run of set bits 116 /// ending at the most significant bit 117 bool selectVSplatMaskL(SDValue N, SDValue &Imm) const override; 118 /// \brief Select constant vector splats whose value is a run of set bits 119 /// starting at bit zero. 120 bool selectVSplatMaskR(SDValue N, SDValue &Imm) const override; 121 122 bool trySelect(SDNode *Node) override; 123 124 void processFunctionAfterISel(MachineFunction &MF) override; 125 126 // Insert instructions to initialize the global base register in the 127 // first MBB of the function. 128 void initGlobalBaseReg(MachineFunction &MF); 129 130 bool SelectInlineAsmMemoryOperand(const SDValue &Op, 131 unsigned ConstraintID, 132 std::vector<SDValue> &OutOps) override; 133 }; 134 135 FunctionPass *createMipsSEISelDag(MipsTargetMachine &TM, 136 CodeGenOpt::Level OptLevel); 137 } 138 139 #endif 140
