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      1 /*
      2  * Copyright  2014 Intel Corporation
      3  *
      4  * Permission is hereby granted, free of charge, to any person obtaining a
      5  * copy of this software and associated documentation files (the "Software"),
      6  * to deal in the Software without restriction, including without limitation
      7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8  * and/or sell copies of the Software, and to permit persons to whom the
      9  * Software is furnished to do so, subject to the following conditions:
     10  *
     11  * The above copyright notice and this permission notice (including the next
     12  * paragraph) shall be included in all copies or substantial portions of the
     13  * Software.
     14  *
     15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
     20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
     21  * IN THE SOFTWARE.
     22  *
     23  * Authors:
     24  *    Jason Ekstrand (jason (at) jlekstrand.net)
     25  *
     26  */
     27 
     28 #include "nir.h"
     29 #include "nir_control_flow.h"
     30 
     31 /*
     32  * Implements a small peephole optimization that looks for
     33  *
     34  * if (cond) {
     35  *    <then SSA defs>
     36  * } else {
     37  *    <else SSA defs>
     38  * }
     39  * phi
     40  * ...
     41  * phi
     42  *
     43  * and replaces it with:
     44  *
     45  * <then SSA defs>
     46  * <else SSA defs>
     47  * bcsel
     48  * ...
     49  * bcsel
     50  *
     51  * where the SSA defs are ALU operations or other cheap instructions (not
     52  * texturing, for example).
     53  *
     54  * If the number of ALU operations in the branches is greater than the limit
     55  * parameter, then the optimization is skipped.  In limit=0 mode, the SSA defs
     56  * must only be MOVs which we expect to get copy-propagated away once they're
     57  * out of the inner blocks.
     58  */
     59 
     60 static bool
     61 block_check_for_allowed_instrs(nir_block *block, unsigned *count, bool alu_ok)
     62 {
     63    nir_foreach_instr(instr, block) {
     64       switch (instr->type) {
     65       case nir_instr_type_intrinsic: {
     66          nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
     67 
     68          switch (intrin->intrinsic) {
     69          case nir_intrinsic_load_var:
     70             switch (intrin->variables[0]->var->data.mode) {
     71             case nir_var_shader_in:
     72             case nir_var_uniform:
     73                break;
     74 
     75             default:
     76                return false;
     77             }
     78             break;
     79 
     80          case nir_intrinsic_load_uniform:
     81             if (!alu_ok)
     82                return false;
     83             break;
     84 
     85          default:
     86             return false;
     87          }
     88 
     89          break;
     90       }
     91 
     92       case nir_instr_type_load_const:
     93          break;
     94 
     95       case nir_instr_type_alu: {
     96          nir_alu_instr *mov = nir_instr_as_alu(instr);
     97          switch (mov->op) {
     98          case nir_op_fmov:
     99          case nir_op_imov:
    100          case nir_op_fneg:
    101          case nir_op_ineg:
    102          case nir_op_fabs:
    103          case nir_op_iabs:
    104          case nir_op_vec2:
    105          case nir_op_vec3:
    106          case nir_op_vec4:
    107             break;
    108          default:
    109             if (!alu_ok) {
    110                /* It must be a move-like operation. */
    111                return false;
    112             }
    113             break;
    114          }
    115 
    116          /* It must be SSA */
    117          if (!mov->dest.dest.is_ssa)
    118             return false;
    119 
    120          if (alu_ok) {
    121             (*count)++;
    122          } else {
    123             /* Can't handle saturate */
    124             if (mov->dest.saturate)
    125                return false;
    126 
    127             /* It cannot have any if-uses */
    128             if (!list_empty(&mov->dest.dest.ssa.if_uses))
    129                return false;
    130 
    131             /* The only uses of this definition must be phi's in the successor */
    132             nir_foreach_use(use, &mov->dest.dest.ssa) {
    133                if (use->parent_instr->type != nir_instr_type_phi ||
    134                    use->parent_instr->block != block->successors[0])
    135                   return false;
    136             }
    137          }
    138          break;
    139       }
    140 
    141       default:
    142          return false;
    143       }
    144    }
    145 
    146    return true;
    147 }
    148 
    149 static bool
    150 nir_opt_peephole_select_block(nir_block *block, nir_shader *shader,
    151                               unsigned limit)
    152 {
    153    if (nir_cf_node_is_first(&block->cf_node))
    154       return false;
    155 
    156    nir_cf_node *prev_node = nir_cf_node_prev(&block->cf_node);
    157    if (prev_node->type != nir_cf_node_if)
    158       return false;
    159 
    160    nir_if *if_stmt = nir_cf_node_as_if(prev_node);
    161    nir_block *then_block = nir_if_first_then_block(if_stmt);
    162    nir_block *else_block = nir_if_first_else_block(if_stmt);
    163 
    164    /* We can only have one block in each side ... */
    165    if (nir_if_last_then_block(if_stmt) != then_block ||
    166        nir_if_last_else_block(if_stmt) != else_block)
    167       return false;
    168 
    169    /* ... and those blocks must only contain "allowed" instructions. */
    170    unsigned count = 0;
    171    if (!block_check_for_allowed_instrs(then_block, &count, limit != 0) ||
    172        !block_check_for_allowed_instrs(else_block, &count, limit != 0))
    173       return false;
    174 
    175    if (count > limit)
    176       return false;
    177 
    178    /* At this point, we know that the previous CFG node is an if-then
    179     * statement containing only moves to phi nodes in this block.  We can
    180     * just remove that entire CF node and replace all of the phi nodes with
    181     * selects.
    182     */
    183 
    184    nir_block *prev_block = nir_cf_node_as_block(nir_cf_node_prev(prev_node));
    185 
    186    /* First, we move the remaining instructions from the blocks to the
    187     * block before.  We have already guaranteed that this is safe by
    188     * calling block_check_for_allowed_instrs()
    189     */
    190    nir_foreach_instr_safe(instr, then_block) {
    191       exec_node_remove(&instr->node);
    192       instr->block = prev_block;
    193       exec_list_push_tail(&prev_block->instr_list, &instr->node);
    194    }
    195 
    196    nir_foreach_instr_safe(instr, else_block) {
    197       exec_node_remove(&instr->node);
    198       instr->block = prev_block;
    199       exec_list_push_tail(&prev_block->instr_list, &instr->node);
    200    }
    201 
    202    nir_foreach_instr_safe(instr, block) {
    203       if (instr->type != nir_instr_type_phi)
    204          break;
    205 
    206       nir_phi_instr *phi = nir_instr_as_phi(instr);
    207       nir_alu_instr *sel = nir_alu_instr_create(shader, nir_op_bcsel);
    208       nir_src_copy(&sel->src[0].src, &if_stmt->condition, sel);
    209       /* Splat the condition to all channels */
    210       memset(sel->src[0].swizzle, 0, sizeof sel->src[0].swizzle);
    211 
    212       assert(exec_list_length(&phi->srcs) == 2);
    213       nir_foreach_phi_src(src, phi) {
    214          assert(src->pred == then_block || src->pred == else_block);
    215          assert(src->src.is_ssa);
    216 
    217          unsigned idx = src->pred == then_block ? 1 : 2;
    218          nir_src_copy(&sel->src[idx].src, &src->src, sel);
    219       }
    220 
    221       nir_ssa_dest_init(&sel->instr, &sel->dest.dest,
    222                         phi->dest.ssa.num_components,
    223                         phi->dest.ssa.bit_size, phi->dest.ssa.name);
    224       sel->dest.write_mask = (1 << phi->dest.ssa.num_components) - 1;
    225 
    226       nir_ssa_def_rewrite_uses(&phi->dest.ssa,
    227                                nir_src_for_ssa(&sel->dest.dest.ssa));
    228 
    229       nir_instr_insert_before(&phi->instr, &sel->instr);
    230       nir_instr_remove(&phi->instr);
    231    }
    232 
    233    nir_cf_node_remove(&if_stmt->cf_node);
    234    return true;
    235 }
    236 
    237 static bool
    238 nir_opt_peephole_select_impl(nir_function_impl *impl, unsigned limit)
    239 {
    240    nir_shader *shader = impl->function->shader;
    241    bool progress = false;
    242 
    243    nir_foreach_block_safe(block, impl) {
    244       progress |= nir_opt_peephole_select_block(block, shader, limit);
    245    }
    246 
    247    if (progress)
    248       nir_metadata_preserve(impl, nir_metadata_none);
    249 
    250    return progress;
    251 }
    252 
    253 bool
    254 nir_opt_peephole_select(nir_shader *shader, unsigned limit)
    255 {
    256    bool progress = false;
    257 
    258    nir_foreach_function(function, shader) {
    259       if (function->impl)
    260          progress |= nir_opt_peephole_select_impl(function->impl, limit);
    261    }
    262 
    263    return progress;
    264 }
    265