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      1 /**************************************************************************
      2  *
      3  * Copyright 2007 VMware, Inc.
      4  * All Rights Reserved.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the
      8  * "Software"), to deal in the Software without restriction, including
      9  * without limitation the rights to use, copy, modify, merge, publish,
     10  * distribute, sub license, and/or sell copies of the Software, and to
     11  * permit persons to whom the Software is furnished to do so, subject to
     12  * the following conditions:
     13  *
     14  * The above copyright notice and this permission notice (including the
     15  * next paragraph) shall be included in all copies or substantial portions
     16  * of the Software.
     17  *
     18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
     19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
     21  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
     22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
     23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
     24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     25  *
     26  **************************************************************************/
     27 
     28 #ifndef SP_TILE_CACHE_H
     29 #define SP_TILE_CACHE_H
     30 
     31 
     32 #include "pipe/p_compiler.h"
     33 #include "sp_texture.h"
     34 
     35 
     36 struct softpipe_tile_cache;
     37 
     38 
     39 /**
     40  * Cache tile size (width and height). This needs to be a power of two.
     41  */
     42 #define TILE_SIZE_LOG2 6
     43 #define TILE_SIZE (1 << TILE_SIZE_LOG2)
     44 
     45 
     46 #define TILE_ADDR_BITS (SP_MAX_TEXTURE_2D_LEVELS - 1 - TILE_SIZE_LOG2)
     47 
     48 
     49 /**
     50  * Surface tile address as a union for fast compares.
     51  */
     52 union tile_address {
     53    struct {
     54       unsigned x:TILE_ADDR_BITS;     /* 16K / TILE_SIZE */
     55       unsigned y:TILE_ADDR_BITS;     /* 16K / TILE_SIZE */
     56       unsigned invalid:1;
     57       unsigned layer:8;
     58       unsigned pad:7;
     59    } bits;
     60    unsigned value;
     61 };
     62 
     63 
     64 struct softpipe_cached_tile
     65 {
     66    union {
     67       float color[TILE_SIZE][TILE_SIZE][4];
     68       uint color32[TILE_SIZE][TILE_SIZE];
     69       uint depth32[TILE_SIZE][TILE_SIZE];
     70       ushort depth16[TILE_SIZE][TILE_SIZE];
     71       ubyte stencil8[TILE_SIZE][TILE_SIZE];
     72       uint colorui128[TILE_SIZE][TILE_SIZE][4];
     73       int colori128[TILE_SIZE][TILE_SIZE][4];
     74       uint64_t depth64[TILE_SIZE][TILE_SIZE];
     75       ubyte any[1];
     76    } data;
     77 };
     78 
     79 #define NUM_ENTRIES 50
     80 
     81 
     82 struct softpipe_tile_cache
     83 {
     84    struct pipe_context *pipe;
     85    struct pipe_surface *surface;  /**< the surface we're caching */
     86    struct pipe_transfer **transfer;
     87    void **transfer_map;
     88    int num_maps;
     89 
     90    union tile_address tile_addrs[NUM_ENTRIES];
     91    struct softpipe_cached_tile *entries[NUM_ENTRIES];
     92    uint *clear_flags;
     93    uint clear_flags_size;
     94    union pipe_color_union clear_color; /**< for color bufs */
     95    uint64_t clear_val;        /**< for z+stencil */
     96    boolean depth_stencil; /**< Is the surface a depth/stencil format? */
     97 
     98    struct softpipe_cached_tile *tile;  /**< scratch tile for clears */
     99 
    100    union tile_address last_tile_addr;
    101    struct softpipe_cached_tile *last_tile;  /**< most recently retrieved tile */
    102 };
    103 
    104 
    105 extern struct softpipe_tile_cache *
    106 sp_create_tile_cache( struct pipe_context *pipe );
    107 
    108 extern void
    109 sp_destroy_tile_cache(struct softpipe_tile_cache *tc);
    110 
    111 extern void
    112 sp_tile_cache_set_surface(struct softpipe_tile_cache *tc,
    113                           struct pipe_surface *sps);
    114 
    115 extern struct pipe_surface *
    116 sp_tile_cache_get_surface(struct softpipe_tile_cache *tc);
    117 
    118 extern void
    119 sp_flush_tile_cache(struct softpipe_tile_cache *tc);
    120 
    121 extern void
    122 sp_tile_cache_clear(struct softpipe_tile_cache *tc,
    123                     const union pipe_color_union *color,
    124                     uint64_t clearValue);
    125 
    126 extern struct softpipe_cached_tile *
    127 sp_find_cached_tile(struct softpipe_tile_cache *tc,
    128                     union tile_address addr );
    129 
    130 
    131 static inline union tile_address
    132 tile_address( unsigned x,
    133               unsigned y, unsigned layer )
    134 {
    135    union tile_address addr;
    136 
    137    addr.value = 0;
    138    addr.bits.x = x / TILE_SIZE;
    139    addr.bits.y = y / TILE_SIZE;
    140    addr.bits.layer = layer;
    141    return addr;
    142 }
    143 
    144 /* Quickly retrieve tile if it matches last lookup.
    145  */
    146 static inline struct softpipe_cached_tile *
    147 sp_get_cached_tile(struct softpipe_tile_cache *tc,
    148                    int x, int y, int layer )
    149 {
    150    union tile_address addr = tile_address( x, y, layer );
    151 
    152    if (tc->last_tile_addr.value == addr.value)
    153       return tc->last_tile;
    154 
    155    return sp_find_cached_tile( tc, addr );
    156 }
    157 
    158 
    159 
    160 
    161 #endif /* SP_TILE_CACHE_H */
    162 
    163