1 /* 2 * Copyright 2014, 2015 Red Hat. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 */ 23 #ifndef VIRGL_HW_H 24 #define VIRGL_HW_H 25 26 struct virgl_box { 27 uint32_t x, y, z; 28 uint32_t w, h, d; 29 }; 30 31 /* formats known by the HW device - based on gallium subset */ 32 enum virgl_formats { 33 VIRGL_FORMAT_B8G8R8A8_UNORM = 1, 34 VIRGL_FORMAT_B8G8R8X8_UNORM = 2, 35 VIRGL_FORMAT_A8R8G8B8_UNORM = 3, 36 VIRGL_FORMAT_X8R8G8B8_UNORM = 4, 37 VIRGL_FORMAT_B5G5R5A1_UNORM = 5, 38 VIRGL_FORMAT_B4G4R4A4_UNORM = 6, 39 VIRGL_FORMAT_B5G6R5_UNORM = 7, 40 VIRGL_FORMAT_L8_UNORM = 9, /**< ubyte luminance */ 41 VIRGL_FORMAT_A8_UNORM = 10, /**< ubyte alpha */ 42 VIRGL_FORMAT_L8A8_UNORM = 12, /**< ubyte alpha, luminance */ 43 VIRGL_FORMAT_L16_UNORM = 13, /**< ushort luminance */ 44 45 VIRGL_FORMAT_Z16_UNORM = 16, 46 VIRGL_FORMAT_Z32_UNORM = 17, 47 VIRGL_FORMAT_Z32_FLOAT = 18, 48 VIRGL_FORMAT_Z24_UNORM_S8_UINT = 19, 49 VIRGL_FORMAT_S8_UINT_Z24_UNORM = 20, 50 VIRGL_FORMAT_Z24X8_UNORM = 21, 51 VIRGL_FORMAT_S8_UINT = 23, /**< ubyte stencil */ 52 53 VIRGL_FORMAT_R32_FLOAT = 28, 54 VIRGL_FORMAT_R32G32_FLOAT = 29, 55 VIRGL_FORMAT_R32G32B32_FLOAT = 30, 56 VIRGL_FORMAT_R32G32B32A32_FLOAT = 31, 57 58 VIRGL_FORMAT_R16_UNORM = 48, 59 VIRGL_FORMAT_R16G16_UNORM = 49, 60 61 VIRGL_FORMAT_R16G16B16A16_UNORM = 51, 62 63 VIRGL_FORMAT_R16_SNORM = 56, 64 VIRGL_FORMAT_R16G16_SNORM = 57, 65 VIRGL_FORMAT_R16G16B16A16_SNORM = 59, 66 67 VIRGL_FORMAT_R8_UNORM = 64, 68 VIRGL_FORMAT_R8G8_UNORM = 65, 69 70 VIRGL_FORMAT_R8G8B8A8_UNORM = 67, 71 72 VIRGL_FORMAT_R8_SNORM = 74, 73 VIRGL_FORMAT_R8G8_SNORM = 75, 74 VIRGL_FORMAT_R8G8B8_SNORM = 76, 75 VIRGL_FORMAT_R8G8B8A8_SNORM = 77, 76 77 VIRGL_FORMAT_R16_FLOAT = 91, 78 VIRGL_FORMAT_R16G16_FLOAT = 92, 79 VIRGL_FORMAT_R16G16B16_FLOAT = 93, 80 VIRGL_FORMAT_R16G16B16A16_FLOAT = 94, 81 82 VIRGL_FORMAT_L8_SRGB = 95, 83 VIRGL_FORMAT_L8A8_SRGB = 96, 84 VIRGL_FORMAT_B8G8R8A8_SRGB = 100, 85 VIRGL_FORMAT_B8G8R8X8_SRGB = 101, 86 87 /* compressed formats */ 88 VIRGL_FORMAT_DXT1_RGB = 105, 89 VIRGL_FORMAT_DXT1_RGBA = 106, 90 VIRGL_FORMAT_DXT3_RGBA = 107, 91 VIRGL_FORMAT_DXT5_RGBA = 108, 92 93 /* sRGB, compressed */ 94 VIRGL_FORMAT_DXT1_SRGB = 109, 95 VIRGL_FORMAT_DXT1_SRGBA = 110, 96 VIRGL_FORMAT_DXT3_SRGBA = 111, 97 VIRGL_FORMAT_DXT5_SRGBA = 112, 98 99 /* rgtc compressed */ 100 VIRGL_FORMAT_RGTC1_UNORM = 113, 101 VIRGL_FORMAT_RGTC1_SNORM = 114, 102 VIRGL_FORMAT_RGTC2_UNORM = 115, 103 VIRGL_FORMAT_RGTC2_SNORM = 116, 104 105 VIRGL_FORMAT_A8B8G8R8_UNORM = 121, 106 VIRGL_FORMAT_B5G5R5X1_UNORM = 122, 107 VIRGL_FORMAT_R11G11B10_FLOAT = 124, 108 VIRGL_FORMAT_R9G9B9E5_FLOAT = 125, 109 VIRGL_FORMAT_Z32_FLOAT_S8X24_UINT = 126, 110 111 VIRGL_FORMAT_B10G10R10A2_UNORM = 131, 112 VIRGL_FORMAT_R8G8B8X8_UNORM = 134, 113 VIRGL_FORMAT_B4G4R4X4_UNORM = 135, 114 VIRGL_FORMAT_B2G3R3_UNORM = 139, 115 116 VIRGL_FORMAT_L16A16_UNORM = 140, 117 VIRGL_FORMAT_A16_UNORM = 141, 118 119 VIRGL_FORMAT_A8_SNORM = 147, 120 VIRGL_FORMAT_L8_SNORM = 148, 121 VIRGL_FORMAT_L8A8_SNORM = 149, 122 123 VIRGL_FORMAT_A16_SNORM = 151, 124 VIRGL_FORMAT_L16_SNORM = 152, 125 VIRGL_FORMAT_L16A16_SNORM = 153, 126 127 VIRGL_FORMAT_A16_FLOAT = 155, 128 VIRGL_FORMAT_L16_FLOAT = 156, 129 VIRGL_FORMAT_L16A16_FLOAT = 157, 130 131 VIRGL_FORMAT_A32_FLOAT = 159, 132 VIRGL_FORMAT_L32_FLOAT = 160, 133 VIRGL_FORMAT_L32A32_FLOAT = 161, 134 135 VIRGL_FORMAT_R8_UINT = 177, 136 VIRGL_FORMAT_R8G8_UINT = 178, 137 VIRGL_FORMAT_R8G8B8_UINT = 179, 138 VIRGL_FORMAT_R8G8B8A8_UINT = 180, 139 140 VIRGL_FORMAT_R8_SINT = 181, 141 VIRGL_FORMAT_R8G8_SINT = 182, 142 VIRGL_FORMAT_R8G8B8_SINT = 183, 143 VIRGL_FORMAT_R8G8B8A8_SINT = 184, 144 145 VIRGL_FORMAT_R16_UINT = 185, 146 VIRGL_FORMAT_R16G16_UINT = 186, 147 VIRGL_FORMAT_R16G16B16_UINT = 187, 148 VIRGL_FORMAT_R16G16B16A16_UINT = 188, 149 150 VIRGL_FORMAT_R16_SINT = 189, 151 VIRGL_FORMAT_R16G16_SINT = 190, 152 VIRGL_FORMAT_R16G16B16_SINT = 191, 153 VIRGL_FORMAT_R16G16B16A16_SINT = 192, 154 VIRGL_FORMAT_R32_UINT = 193, 155 VIRGL_FORMAT_R32G32_UINT = 194, 156 VIRGL_FORMAT_R32G32B32_UINT = 195, 157 VIRGL_FORMAT_R32G32B32A32_UINT = 196, 158 159 VIRGL_FORMAT_R32_SINT = 197, 160 VIRGL_FORMAT_R32G32_SINT = 198, 161 VIRGL_FORMAT_R32G32B32_SINT = 199, 162 VIRGL_FORMAT_R32G32B32A32_SINT = 200, 163 164 VIRGL_FORMAT_A8_UINT = 201, 165 VIRGL_FORMAT_L8_UINT = 203, 166 VIRGL_FORMAT_L8A8_UINT = 204, 167 168 VIRGL_FORMAT_A8_SINT = 205, 169 VIRGL_FORMAT_L8_SINT = 207, 170 VIRGL_FORMAT_L8A8_SINT = 208, 171 172 VIRGL_FORMAT_A16_UINT = 209, 173 VIRGL_FORMAT_L16_UINT = 211, 174 VIRGL_FORMAT_L16A16_UINT = 212, 175 176 VIRGL_FORMAT_A16_SINT = 213, 177 VIRGL_FORMAT_L16_SINT = 215, 178 VIRGL_FORMAT_L16A16_SINT = 216, 179 180 VIRGL_FORMAT_A32_UINT = 217, 181 VIRGL_FORMAT_L32_UINT = 219, 182 VIRGL_FORMAT_L32A32_UINT = 220, 183 184 VIRGL_FORMAT_A32_SINT = 221, 185 VIRGL_FORMAT_L32_SINT = 223, 186 VIRGL_FORMAT_L32A32_SINT = 224, 187 188 VIRGL_FORMAT_B10G10R10A2_UINT = 225, 189 VIRGL_FORMAT_R8G8B8X8_SNORM = 229, 190 191 VIRGL_FORMAT_R8G8B8X8_SRGB = 230, 192 193 VIRGL_FORMAT_B10G10R10X2_UNORM = 233, 194 VIRGL_FORMAT_R16G16B16X16_UNORM = 234, 195 VIRGL_FORMAT_R16G16B16X16_SNORM = 235, 196 VIRGL_FORMAT_MAX, 197 }; 198 199 #define VIRGL_BIND_DEPTH_STENCIL (1 << 0) 200 #define VIRGL_BIND_RENDER_TARGET (1 << 1) 201 #define VIRGL_BIND_SAMPLER_VIEW (1 << 3) 202 #define VIRGL_BIND_VERTEX_BUFFER (1 << 4) 203 #define VIRGL_BIND_INDEX_BUFFER (1 << 5) 204 #define VIRGL_BIND_CONSTANT_BUFFER (1 << 6) 205 #define VIRGL_BIND_DISPLAY_TARGET (1 << 7) 206 #define VIRGL_BIND_STREAM_OUTPUT (1 << 11) 207 #define VIRGL_BIND_CURSOR (1 << 16) 208 #define VIRGL_BIND_CUSTOM (1 << 17) 209 #define VIRGL_BIND_SCANOUT (1 << 18) 210 211 struct virgl_caps_bool_set1 { 212 unsigned indep_blend_enable:1; 213 unsigned indep_blend_func:1; 214 unsigned cube_map_array:1; 215 unsigned shader_stencil_export:1; 216 unsigned conditional_render:1; 217 unsigned start_instance:1; 218 unsigned primitive_restart:1; 219 unsigned blend_eq_sep:1; 220 unsigned instanceid:1; 221 unsigned vertex_element_instance_divisor:1; 222 unsigned seamless_cube_map:1; 223 unsigned occlusion_query:1; 224 unsigned timer_query:1; 225 unsigned streamout_pause_resume:1; 226 unsigned texture_multisample:1; 227 unsigned fragment_coord_conventions:1; 228 unsigned depth_clip_disable:1; 229 unsigned seamless_cube_map_per_texture:1; 230 unsigned ubo:1; 231 unsigned color_clamping:1; /* not in GL 3.1 core profile */ 232 unsigned poly_stipple:1; /* not in GL 3.1 core profile */ 233 unsigned mirror_clamp:1; 234 unsigned texture_query_lod:1; 235 }; 236 237 /* endless expansion capabilites - current gallium has 252 formats */ 238 struct virgl_supported_format_mask { 239 uint32_t bitmask[16]; 240 }; 241 /* capabilities set 2 - version 1 - 32-bit and float values */ 242 struct virgl_caps_v1 { 243 uint32_t max_version; 244 struct virgl_supported_format_mask sampler; 245 struct virgl_supported_format_mask render; 246 struct virgl_supported_format_mask depthstencil; 247 struct virgl_supported_format_mask vertexbuffer; 248 struct virgl_caps_bool_set1 bset; 249 uint32_t glsl_level; 250 uint32_t max_texture_array_layers; 251 uint32_t max_streamout_buffers; 252 uint32_t max_dual_source_render_targets; 253 uint32_t max_render_targets; 254 uint32_t max_samples; 255 uint32_t prim_mask; 256 uint32_t max_tbo_size; 257 uint32_t max_uniform_blocks; 258 uint32_t max_viewports; 259 uint32_t max_texture_gather_components; 260 }; 261 262 union virgl_caps { 263 uint32_t max_version; 264 struct virgl_caps_v1 v1; 265 }; 266 267 enum virgl_errors { 268 VIRGL_ERROR_NONE, 269 VIRGL_ERROR_UNKNOWN, 270 VIRGL_ERROR_UNKNOWN_RESOURCE_FORMAT, 271 }; 272 273 enum virgl_ctx_errors { 274 VIRGL_ERROR_CTX_NONE, 275 VIRGL_ERROR_CTX_UNKNOWN, 276 VIRGL_ERROR_CTX_ILLEGAL_SHADER, 277 VIRGL_ERROR_CTX_ILLEGAL_HANDLE, 278 VIRGL_ERROR_CTX_ILLEGAL_RESOURCE, 279 VIRGL_ERROR_CTX_ILLEGAL_SURFACE, 280 VIRGL_ERROR_CTX_ILLEGAL_VERTEX_FORMAT, 281 VIRGL_ERROR_CTX_ILLEGAL_CMD_BUFFER, 282 }; 283 284 285 #define VIRGL_RESOURCE_Y_0_TOP (1 << 0) 286 #endif 287
