1 .text 2 .inst 0xfe011a10 @ mcr2 10, 0, r1, cr1, cr0, {0} <UNPREDICTABLE> 3 .inst 0xfe011b10 @ mcr2 11, 0, r1, cr1, cr0, {0} <UNPREDICTABLE> 4 .inst 0xfe811a10 @ mcr2 10, 4, r1, cr1, cr0, {0} <UNPREDICTABLE> 5 .inst 0xfe811b10 @ mcr2 11, 4, r1, cr1, cr0, {0} <UNPREDICTABLE> 6 .inst 0xfe811a50 @ mcr2 10, 4, r1, cr1, cr0, {2} <UNPREDICTABLE> 7 .inst 0xfe811b50 @ mcr2 11, 4, r1, cr1, cr0, {2} <UNPREDICTABLE> 8 .inst 0xfefb0ae0 @ <UNDEFINED> instruction: 0xfefb0ae0 9 .inst 0xfefb0be0 @ <UNDEFINED> instruction: 0xfefb0be0 10 .inst 0xfefb0ae0 @ <UNDEFINED> instruction: 0xfefb0ae0 11 .inst 0xfefb0be0 @ <UNDEFINED> instruction: 0xfefb0be0 12 .inst 0xfef80ae0 @ <UNDEFINED> instruction: 0xfef80ae0 13 .inst 0xfef80be0 @ <UNDEFINED> instruction: 0xfef80be0 14 .inst 0xfef90ae0 @ <UNDEFINED> instruction: 0xfef90ae0 15 .inst 0xfef90be0 @ <UNDEFINED> instruction: 0xfef90be0 16 .inst 0xfefa0ae0 @ <UNDEFINED> instruction: 0xfefa0ae0 17 .inst 0xfefa0be0 @ <UNDEFINED> instruction: 0xfefa0be0 18
