1 #objdump: -dr --prefix-addresses --show-raw-insn -M reg-names=numeric 2 #name: MIPS MIPS32r2 non-fp instructions 3 #source: mips32r2.s 4 #as: -32 5 6 # Check MIPS32 Release 2 (mips32r2) *non-fp* instruction assembly (microMIPS). 7 8 .*: +file format .*mips.* 9 10 Disassembly of section \.text: 11 [0-9a-f]+ <[^>]*> 0000 1800 ehb 12 [0-9a-f]+ <[^>]*> 0085 39ac ext \$4,\$5,0x6,0x8 13 [0-9a-f]+ <[^>]*> 0085 698c ins \$4,\$5,0x6,0x8 14 [0-9a-f]+ <[^>]*> 03e8 1f3c jalr\.hb \$8 15 [0-9a-f]+ <[^>]*> 0289 1f3c jalr\.hb \$20,\$9 16 [0-9a-f]+ <[^>]*> 0008 1f3c jr\.hb \$8 17 [0-9a-f]+ <[^>]*> 0140 6b3c rdhwr \$10,\$0 18 [0-9a-f]+ <[^>]*> 0161 6b3c rdhwr \$11,\$1 19 [0-9a-f]+ <[^>]*> 0182 6b3c rdhwr \$12,\$2 20 [0-9a-f]+ <[^>]*> 01a3 6b3c rdhwr \$13,\$3 21 [0-9a-f]+ <[^>]*> 01c4 6b3c rdhwr \$14,\$4 22 [0-9a-f]+ <[^>]*> 01e5 6b3c rdhwr \$15,\$5 23 [0-9a-f]+ <[^>]*> 032a e0c0 ror \$25,\$10,0x1c 24 [0-9a-f]+ <[^>]*> 032a 20c0 ror \$25,\$10,0x4 25 [0-9a-f]+ <[^>]*> 0080 c9d0 negu \$25,\$4 26 [0-9a-f]+ <[^>]*> 0159 c8d0 rorv \$25,\$10,\$25 27 [0-9a-f]+ <[^>]*> 0144 c8d0 rorv \$25,\$10,\$4 28 [0-9a-f]+ <[^>]*> 0144 c8d0 rorv \$25,\$10,\$4 29 [0-9a-f]+ <[^>]*> 00e7 2b3c seb \$7,\$7 30 [0-9a-f]+ <[^>]*> 010a 2b3c seb \$8,\$10 31 [0-9a-f]+ <[^>]*> 00e7 3b3c seh \$7,\$7 32 [0-9a-f]+ <[^>]*> 010a 3b3c seh \$8,\$10 33 [0-9a-f]+ <[^>]*> 420a 5555 synci 21845\(\$10\) 34 [0-9a-f]+ <[^>]*> 00e7 7b3c wsbh \$7,\$7 35 [0-9a-f]+ <[^>]*> 010a 7b3c wsbh \$8,\$10 36 [0-9a-f]+ <[^>]*> 0000 477c di 37 [0-9a-f]+ <[^>]*> 0000 477c di 38 [0-9a-f]+ <[^>]*> 000a 477c di \$10 39 [0-9a-f]+ <[^>]*> 0000 577c ei 40 [0-9a-f]+ <[^>]*> 0000 577c ei 41 [0-9a-f]+ <[^>]*> 000a 577c ei \$10 42 [0-9a-f]+ <[^>]*> 0159 e17c rdpgpr \$10,\$25 43 [0-9a-f]+ <[^>]*> 0159 f17c wrpgpr \$10,\$25 44 [0-9a-f]+ <[^>]*> 0000 2800 pause 45 \.\.\. 46
