/external/llvm/lib/CodeGen/ |
MachineSSAUpdater.cpp | 118 unsigned NewVR = MRI->createVirtualRegister(RC); 119 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); 223 unsigned NewVR = 0; 226 NewVR = GetValueAtEndOfBlockInternal(SourceBB); 228 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); 231 U.setReg(NewVR);
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PeepholeOptimizer.cpp | 539 unsigned NewVR = MRI->createVirtualRegister(RC); 541 TII->get(TargetOpcode::COPY), NewVR) 548 UseMO->setReg(NewVR); 720 unsigned NewVR = MRI->createVirtualRegister(NewRC); 723 TII->get(TargetOpcode::PHI), NewVR); [all...] |
TargetInstrInfo.cpp | 721 unsigned NewVR = MRI.createVirtualRegister(RC); 722 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); 731 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) 737 .addReg(NewVR, getKillRegState(true)); [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
MachineSSAUpdater.cpp | 117 unsigned NewVR = MRI->createVirtualRegister(RC); 118 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); 224 unsigned NewVR = 0; 227 NewVR = GetValueAtEndOfBlockInternal(SourceBB); 229 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); 232 U.setReg(NewVR);
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PeepholeOptimizer.cpp | 243 unsigned NewVR = MRI->createVirtualRegister(RC); 245 TII->get(TargetOpcode::COPY), NewVR) 248 UseMO->setReg(NewVR);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
MachineSSAUpdater.cpp | 122 unsigned NewVR = MRI->createVirtualRegister(RC); 123 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR); 226 unsigned NewVR = 0; 229 NewVR = GetValueAtEndOfBlockInternal(SourceBB); 231 NewVR = GetValueInMiddleOfBlock(UseMI->getParent()); 234 U.setReg(NewVR);
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PeepholeOptimizer.cpp | 585 unsigned NewVR = MRI->createVirtualRegister(RC); 587 TII->get(TargetOpcode::COPY), NewVR) 594 UseMO->setReg(NewVR); 765 unsigned NewVR = MRI.createVirtualRegister(NewRC); 768 TII.get(TargetOpcode::PHI), NewVR); [all...] |
TargetInstrInfo.cpp | 831 unsigned NewVR = MRI.createVirtualRegister(RC); 832 InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); 841 BuildMI(*MF, Prev.getDebugLoc(), TII->get(Opcode), NewVR) 847 .addReg(NewVR, getKillRegState(true)); [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.cpp | [all...] |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
SIISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |