1 /************************************************************************** 2 * 3 * Copyright 2007-2008 VMware, Inc. 4 * All Rights Reserved. 5 * Copyright 2009-2010 VMware, Inc. All rights Reserved. 6 * 7 * Permission is hereby granted, free of charge, to any person obtaining a 8 * copy of this software and associated documentation files (the 9 * "Software"), to deal in the Software without restriction, including 10 * without limitation the rights to use, copy, modify, merge, publish, 11 * distribute, sub license, and/or sell copies of the Software, and to 12 * permit persons to whom the Software is furnished to do so, subject to 13 * the following conditions: 14 * 15 * The above copyright notice and this permission notice (including the 16 * next paragraph) shall be included in all copies or substantial portions 17 * of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR 23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26 * 27 **************************************************************************/ 28 29 #ifndef TGSI_EXEC_H 30 #define TGSI_EXEC_H 31 32 #include "pipe/p_compiler.h" 33 #include "pipe/p_state.h" 34 #include "pipe/p_shader_tokens.h" 35 36 #if defined __cplusplus 37 extern "C" { 38 #endif 39 40 #define TGSI_CHAN_X 0 41 #define TGSI_CHAN_Y 1 42 #define TGSI_CHAN_Z 2 43 #define TGSI_CHAN_W 3 44 45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */ 46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */ 47 48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\ 49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++) 50 51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ 52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN))) 53 54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\ 55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )) 56 57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\ 58 TGSI_FOR_EACH_CHANNEL( CHAN )\ 59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN ) 60 61 #define TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\ 62 ((INST)->Dst[1].Register.WriteMask & (1 << (CHAN))) 63 64 #define TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\ 65 if (TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN )) 66 67 #define TGSI_FOR_EACH_DST1_ENABLED_CHANNEL( INST, CHAN )\ 68 TGSI_FOR_EACH_CHANNEL( CHAN )\ 69 TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN ) 70 71 /** 72 * Registers may be treated as float, signed int or unsigned int. 73 */ 74 union tgsi_exec_channel 75 { 76 float f[TGSI_QUAD_SIZE]; 77 int i[TGSI_QUAD_SIZE]; 78 unsigned u[TGSI_QUAD_SIZE]; 79 }; 80 81 /** 82 * A vector[RGBA] of channels[4 pixels] 83 */ 84 struct tgsi_exec_vector 85 { 86 union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS]; 87 }; 88 89 /** 90 * For fragment programs, information for computing fragment input 91 * values from plane equation of the triangle/line. 92 */ 93 struct tgsi_interp_coef 94 { 95 float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */ 96 float dadx[TGSI_NUM_CHANNELS]; 97 float dady[TGSI_NUM_CHANNELS]; 98 }; 99 100 enum tgsi_sampler_control 101 { 102 TGSI_SAMPLER_LOD_NONE, 103 TGSI_SAMPLER_LOD_BIAS, 104 TGSI_SAMPLER_LOD_EXPLICIT, 105 TGSI_SAMPLER_LOD_ZERO, 106 TGSI_SAMPLER_DERIVS_EXPLICIT, 107 TGSI_SAMPLER_GATHER, 108 }; 109 110 struct tgsi_image_params { 111 unsigned unit; 112 unsigned tgsi_tex_instr; 113 enum pipe_format format; 114 unsigned execmask; 115 }; 116 117 struct tgsi_image { 118 /* image interfaces */ 119 void (*load)(const struct tgsi_image *image, 120 const struct tgsi_image_params *params, 121 const int s[TGSI_QUAD_SIZE], 122 const int t[TGSI_QUAD_SIZE], 123 const int r[TGSI_QUAD_SIZE], 124 const int sample[TGSI_QUAD_SIZE], 125 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 126 127 void (*store)(const struct tgsi_image *image, 128 const struct tgsi_image_params *params, 129 const int s[TGSI_QUAD_SIZE], 130 const int t[TGSI_QUAD_SIZE], 131 const int r[TGSI_QUAD_SIZE], 132 const int sample[TGSI_QUAD_SIZE], 133 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 134 135 void (*op)(const struct tgsi_image *image, 136 const struct tgsi_image_params *params, 137 unsigned opcode, 138 const int s[TGSI_QUAD_SIZE], 139 const int t[TGSI_QUAD_SIZE], 140 const int r[TGSI_QUAD_SIZE], 141 const int sample[TGSI_QUAD_SIZE], 142 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE], 143 float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 144 145 void (*get_dims)(const struct tgsi_image *image, 146 const struct tgsi_image_params *params, 147 int dims[4]); 148 }; 149 150 struct tgsi_buffer_params { 151 unsigned unit; 152 unsigned execmask; 153 unsigned writemask; 154 }; 155 156 struct tgsi_buffer { 157 /* buffer interfaces */ 158 void (*load)(const struct tgsi_buffer *buffer, 159 const struct tgsi_buffer_params *params, 160 const int s[TGSI_QUAD_SIZE], 161 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 162 163 void (*store)(const struct tgsi_buffer *buffer, 164 const struct tgsi_buffer_params *params, 165 const int s[TGSI_QUAD_SIZE], 166 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 167 168 void (*op)(const struct tgsi_buffer *buffer, 169 const struct tgsi_buffer_params *params, 170 unsigned opcode, 171 const int s[TGSI_QUAD_SIZE], 172 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE], 173 float rgba2[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 174 175 void (*get_dims)(const struct tgsi_buffer *buffer, 176 const struct tgsi_buffer_params *params, 177 int *dim); 178 }; 179 180 /** 181 * Information for sampling textures, which must be implemented 182 * by code outside the TGSI executor. 183 */ 184 struct tgsi_sampler 185 { 186 /** Get samples for four fragments in a quad */ 187 /* this interface contains 5 sets of channels that vary 188 * depending on the sampler. 189 * s - the first texture coordinate for sampling. 190 * t - the second texture coordinate for sampling - unused for 1D, 191 layer for 1D arrays. 192 * r - the third coordinate for sampling for 3D, cube, cube arrays, 193 * layer for 2D arrays. Compare value for 1D/2D shadows. 194 * c0 - Compare value for shadow cube and shadow 2d arrays, 195 * layer for cube arrays. 196 * derivs - explicit derivatives. 197 * offset - texel offsets 198 * lod - lod value, except for shadow cube arrays (compare value there). 199 */ 200 void (*get_samples)(struct tgsi_sampler *sampler, 201 const unsigned sview_index, 202 const unsigned sampler_index, 203 const float s[TGSI_QUAD_SIZE], 204 const float t[TGSI_QUAD_SIZE], 205 const float r[TGSI_QUAD_SIZE], 206 const float c0[TGSI_QUAD_SIZE], 207 const float c1[TGSI_QUAD_SIZE], 208 float derivs[3][2][TGSI_QUAD_SIZE], 209 const int8_t offset[3], 210 enum tgsi_sampler_control control, 211 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 212 void (*get_dims)(struct tgsi_sampler *sampler, 213 const unsigned sview_index, 214 int level, int dims[4]); 215 void (*get_texel)(struct tgsi_sampler *sampler, 216 const unsigned sview_index, 217 const int i[TGSI_QUAD_SIZE], 218 const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE], 219 const int lod[TGSI_QUAD_SIZE], const int8_t offset[3], 220 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]); 221 void (*query_lod)(const struct tgsi_sampler *tgsi_sampler, 222 const unsigned sview_index, 223 const unsigned sampler_index, 224 const float s[TGSI_QUAD_SIZE], 225 const float t[TGSI_QUAD_SIZE], 226 const float p[TGSI_QUAD_SIZE], 227 const float c0[TGSI_QUAD_SIZE], 228 const enum tgsi_sampler_control control, 229 float mipmap[TGSI_QUAD_SIZE], 230 float lod[TGSI_QUAD_SIZE]); 231 }; 232 233 #define TGSI_EXEC_NUM_TEMPS 4096 234 #define TGSI_EXEC_NUM_IMMEDIATES 256 235 236 /* 237 * Locations of various utility registers (_I = Index, _C = Channel) 238 */ 239 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0) 240 #define TGSI_EXEC_TEMP_00000000_C 0 241 242 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) 243 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1 244 245 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0) 246 #define TGSI_EXEC_TEMP_80000000_C 2 247 248 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0) 249 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3 250 251 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1) 252 #define TGSI_EXEC_TEMP_ONE_C 0 253 254 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1) 255 #define TGSI_EXEC_TEMP_TWO_C 1 256 257 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1) 258 #define TGSI_EXEC_TEMP_128_C 2 259 260 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1) 261 #define TGSI_EXEC_TEMP_MINUS_128_C 3 262 263 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2) 264 #define TGSI_EXEC_TEMP_KILMASK_C 0 265 266 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2) 267 #define TGSI_EXEC_TEMP_OUTPUT_C 1 268 269 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2) 270 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2 271 272 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2) 273 #define TGSI_EXEC_TEMP_THREE_C 3 274 275 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3) 276 #define TGSI_EXEC_TEMP_HALF_C 0 277 278 /* 4 register buffer for various purposes */ 279 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4) 280 #define TGSI_EXEC_NUM_TEMP_R 4 281 282 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8) 283 #define TGSI_EXEC_NUM_ADDRS 3 284 285 #define TGSI_EXEC_NUM_TEMP_EXTRAS 12 286 287 288 289 #define TGSI_EXEC_MAX_NESTING 32 290 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING 291 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING 292 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING 293 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING 294 295 /* The maximum number of input attributes per vertex. For 2D 296 * input register files, this is the stride between two 1D 297 * arrays. 298 */ 299 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 32 300 301 /* The maximum number of bytes per constant buffer. 302 */ 303 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE (4096 * sizeof(float[4])) 304 305 /* The maximum number of vertices per primitive */ 306 #define TGSI_MAX_PRIM_VERTICES 6 307 308 /* The maximum number of primitives to be generated */ 309 #define TGSI_MAX_PRIMITIVES 64 310 311 /* The maximum total number of vertices */ 312 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS) 313 314 #define TGSI_MAX_MISC_INPUTS 8 315 316 /** function call/activation record */ 317 struct tgsi_call_record 318 { 319 uint CondStackTop; 320 uint LoopStackTop; 321 uint ContStackTop; 322 int SwitchStackTop; 323 int BreakStackTop; 324 uint ReturnAddr; 325 }; 326 327 328 /* Switch-case block state. */ 329 struct tgsi_switch_record { 330 uint mask; /**< execution mask */ 331 union tgsi_exec_channel selector; /**< a value case statements are compared to */ 332 uint defaultMask; /**< non-execute mask for default case */ 333 }; 334 335 336 enum tgsi_break_type { 337 TGSI_EXEC_BREAK_INSIDE_LOOP, 338 TGSI_EXEC_BREAK_INSIDE_SWITCH 339 }; 340 341 342 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING) 343 344 345 /** 346 * Run-time virtual machine state for executing TGSI shader. 347 */ 348 struct tgsi_exec_machine 349 { 350 /* Total = program temporaries + internal temporaries 351 */ 352 struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS + 353 TGSI_EXEC_NUM_TEMP_EXTRAS]; 354 355 float Imms[TGSI_EXEC_NUM_IMMEDIATES][4]; 356 357 float ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4]; 358 359 struct tgsi_exec_vector *Inputs; 360 struct tgsi_exec_vector *Outputs; 361 362 /* System values */ 363 unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT]; 364 struct tgsi_exec_vector SystemValue[TGSI_MAX_MISC_INPUTS]; 365 366 struct tgsi_exec_vector *Addrs; 367 368 struct tgsi_sampler *Sampler; 369 370 struct tgsi_image *Image; 371 struct tgsi_buffer *Buffer; 372 unsigned ImmLimit; 373 374 const void *Consts[PIPE_MAX_CONSTANT_BUFFERS]; 375 unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS]; 376 377 const struct tgsi_token *Tokens; /**< Declarations, instructions */ 378 enum pipe_shader_type ShaderType; /**< PIPE_SHADER_x */ 379 380 /* GEOMETRY processor only. */ 381 unsigned *Primitives; 382 unsigned NumOutputs; 383 unsigned MaxGeometryShaderOutputs; 384 unsigned MaxOutputVertices; 385 386 /* FRAGMENT processor only. */ 387 const struct tgsi_interp_coef *InterpCoefs; 388 struct tgsi_exec_vector QuadPos; 389 float Face; /**< +1 if front facing, -1 if back facing */ 390 bool flatshade_color; 391 392 /* Compute Only */ 393 void *LocalMem; 394 unsigned LocalMemSize; 395 396 /* See GLSL 4.50 specification for definition of helper invocations */ 397 uint NonHelperMask; /**< non-helpers */ 398 /* Conditional execution masks */ 399 uint CondMask; /**< For IF/ELSE/ENDIF */ 400 uint LoopMask; /**< For BGNLOOP/ENDLOOP */ 401 uint ContMask; /**< For loop CONT statements */ 402 uint FuncMask; /**< For function calls */ 403 uint ExecMask; /**< = CondMask & LoopMask */ 404 405 /* Current switch-case state. */ 406 struct tgsi_switch_record Switch; 407 408 /* Current break type. */ 409 enum tgsi_break_type BreakType; 410 411 /** Condition mask stack (for nested conditionals) */ 412 uint CondStack[TGSI_EXEC_MAX_COND_NESTING]; 413 int CondStackTop; 414 415 /** Loop mask stack (for nested loops) */ 416 uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING]; 417 int LoopStackTop; 418 419 /** Loop label stack */ 420 uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING]; 421 int LoopLabelStackTop; 422 423 /** Loop continue mask stack (see comments in tgsi_exec.c) */ 424 uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING]; 425 int ContStackTop; 426 427 /** Switch case stack */ 428 struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING]; 429 int SwitchStackTop; 430 431 enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK]; 432 int BreakStackTop; 433 434 /** Function execution mask stack (for executing subroutine code) */ 435 uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING]; 436 int FuncStackTop; 437 438 /** Function call stack for saving/restoring the program counter */ 439 struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING]; 440 int CallStackTop; 441 442 struct tgsi_full_instruction *Instructions; 443 uint NumInstructions; 444 445 struct tgsi_full_declaration *Declarations; 446 uint NumDeclarations; 447 448 struct tgsi_declaration_sampler_view 449 SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS]; 450 451 boolean UsedGeometryShader; 452 453 int pc; 454 }; 455 456 struct tgsi_exec_machine * 457 tgsi_exec_machine_create(enum pipe_shader_type shader_type); 458 459 void 460 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach); 461 462 463 void 464 tgsi_exec_machine_bind_shader( 465 struct tgsi_exec_machine *mach, 466 const struct tgsi_token *tokens, 467 struct tgsi_sampler *sampler, 468 struct tgsi_image *image, 469 struct tgsi_buffer *buffer); 470 471 uint 472 tgsi_exec_machine_run( 473 struct tgsi_exec_machine *mach, int start_pc ); 474 475 476 void 477 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach); 478 479 480 boolean 481 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst); 482 483 484 extern void 485 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach, 486 unsigned num_bufs, 487 const void **bufs, 488 const unsigned *buf_sizes); 489 490 491 static inline int 492 tgsi_exec_get_shader_param(enum pipe_shader_cap param) 493 { 494 switch(param) { 495 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 496 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 497 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 498 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 499 return INT_MAX; 500 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 501 return TGSI_EXEC_MAX_NESTING; 502 case PIPE_SHADER_CAP_MAX_INPUTS: 503 return TGSI_EXEC_MAX_INPUT_ATTRIBS; 504 case PIPE_SHADER_CAP_MAX_OUTPUTS: 505 return 32; 506 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: 507 return TGSI_EXEC_MAX_CONST_BUFFER_SIZE; 508 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 509 return PIPE_MAX_CONSTANT_BUFFERS; 510 case PIPE_SHADER_CAP_MAX_TEMPS: 511 return TGSI_EXEC_NUM_TEMPS; 512 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 513 return 1; 514 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 515 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 516 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 517 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 518 return 1; 519 case PIPE_SHADER_CAP_SUBROUTINES: 520 return 1; 521 case PIPE_SHADER_CAP_INTEGERS: 522 return 1; 523 case PIPE_SHADER_CAP_INT64_ATOMICS: 524 case PIPE_SHADER_CAP_FP16: 525 return 0; 526 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 527 return PIPE_MAX_SAMPLERS; 528 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: 529 return PIPE_MAX_SHADER_SAMPLER_VIEWS; 530 case PIPE_SHADER_CAP_PREFERRED_IR: 531 return PIPE_SHADER_IR_TGSI; 532 case PIPE_SHADER_CAP_SUPPORTED_IRS: 533 return 1 << PIPE_SHADER_IR_TGSI; 534 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: 535 return 1; 536 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: 537 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED: 538 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: 539 return 1; 540 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: 541 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: 542 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: 543 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: 544 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: 545 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: 546 return 0; 547 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: 548 return PIPE_MAX_SHADER_BUFFERS; 549 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: 550 return PIPE_MAX_SHADER_IMAGES; 551 552 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: 553 return 32; 554 } 555 /* if we get here, we missed a shader cap above (and should have seen 556 * a compiler warning.) 557 */ 558 return 0; 559 } 560 561 #if defined __cplusplus 562 } /* extern "C" */ 563 #endif 564 565 #endif /* TGSI_EXEC_H */ 566
