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    Searched refs:PAD_CTL_PUE (Results 1 - 25 of 35) sorted by null

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  /external/u-boot/board/liebherr/display5/
common.h 10 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
14 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
18 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
26 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/arch/arm/include/asm/mach-imx/
iomux-v3.h 105 #define PAD_CTL_PUE (0x1 << 6)
127 #define PAD_CTL_PUE (0x1 << 4)
129 #define PAD_CTL_PUS_PD100KOHM ((0x0 << 5) | PAD_CTL_PUE)
130 #define PAD_CTL_PUS_PU5KOHM ((0x1 << 5) | PAD_CTL_PUE)
131 #define PAD_CTL_PUS_PU47KOHM ((0x2 << 5) | PAD_CTL_PUE)
132 #define PAD_CTL_PUS_PU100KOHM ((0x3 << 5) | PAD_CTL_PUE)
140 #define PAD_CTL_PUS_100K_DOWN (0 << 14 | PAD_CTL_PUE)
141 #define PAD_CTL_PUS_47K_UP (1 << 14 | PAD_CTL_PUE)
142 #define PAD_CTL_PUS_100K_UP (2 << 14 | PAD_CTL_PUE)
143 #define PAD_CTL_PUS_22K_UP (3 << 14 | PAD_CTL_PUE)
    [all...]
  /external/u-boot/board/gateworks/gw_ventana/
common.h 18 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
22 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
26 #define ENET_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
38 #define IRQ_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/arch/arm/include/asm/arch-mx7ulp/
iomux.h 86 #define PAD_CTL_PUE (1 << 1)
87 #define PAD_CTL_PUS_UP ((1 << 0) | PAD_CTL_PUE)
88 #define PAD_CTL_PUS_DOWN ((0 << 0) | PAD_CTL_PUE)
  /external/u-boot/board/ccv/xpress/
xpress.c 29 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
33 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
37 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
42 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
46 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
51 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
54 #define OTGID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/technexion/pico-imx6ul/
pico-imx6ul.c 31 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
35 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
39 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
44 #define OTG_ID_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
48 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
51 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
  /external/u-boot/board/compulab/cl-som-imx7/
mux.c 23 PAD_CTL_HYS | PAD_CTL_PUE | \
56 #define GPIO_PAD_CTRL (PAD_CTL_PUS_PU5KOHM | PAD_CTL_PUE | \
spl.c 34 PAD_CTL_PUE | PAD_CTL_SRE_SLOW)
  /external/u-boot/board/freescale/mx6ullevk/
mx6ullevk.c 23 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/grinn/liteboard/
board.c 32 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
36 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
40 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
44 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
  /external/u-boot/board/tqc/tqma6/
tqma6_wru4.c 39 PAD_CTL_PUE | \
141 PAD_CTL_PUE | \
192 PAD_CTL_PUE | \
201 PAD_CTL_PUE | \
  /external/u-boot/board/freescale/mx6sxsabresd/
mx6sxsabresd.c 31 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
35 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
39 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
46 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
49 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
52 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
210 PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_40ohm)
  /external/u-boot/board/kosagi/novena/
novena_spl.c 30 (PAD_CTL_PKE | PAD_CTL_PUE | \
35 (PAD_CTL_PKE | PAD_CTL_PUE | \
40 (PAD_CTL_PKE | PAD_CTL_PUE | \
45 (PAD_CTL_PKE | PAD_CTL_PUE | \
49 (PAD_CTL_PKE | PAD_CTL_PUE | \
58 (PAD_CTL_PKE | PAD_CTL_PUE | \
64 (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/udoo/neo/
neo.c 43 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
47 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
51 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
56 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
63 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
66 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | \
69 #define BOARD_DETECT_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/freescale/mx6sxsabreauto/
mx6sxsabreauto.c 32 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
36 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
43 #define ENET_RX_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
46 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
224 PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_40ohm)
  /external/u-boot/board/freescale/mx6ul_14x14_evk/
mx6ul_14x14_evk.c 33 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
37 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
41 #define USDHC_DAT3_CD_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
45 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
50 #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
54 #define LCD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
57 #define MDIO_PAD_CTRL (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
300 PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_47K_UP | PAD_CTL_DSE_120ohm)
  /external/u-boot/board/logicpd/imx6/
imx6logic.c 30 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
34 #define NAND_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/warp7/
warp7.c 34 PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
37 PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
  /external/u-boot/board/armadeus/opos6uldev/
board.c 16 PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | \
  /external/u-boot/board/engicam/imx6ul/
imx6ul.c 26 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)
  /external/u-boot/board/freescale/mx6sllevk/
mx6sllevk.c 25 #define UART_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/warp/
warp.c 41 #define I2C_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/technexion/pico-imx7d/
pico-imx7d.c 32 PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU47KOHM)
40 PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PUS_PU100KOHM)
  /external/u-boot/arch/arm/mach-imx/mx6/
litesom.c 25 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
  /external/u-boot/board/engicam/imx6q/
imx6q.c 25 #define GPMI_PAD_CTRL0 (PAD_CTL_PKE | PAD_CTL_PUE | PAD_CTL_PUS_100K_UP)

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