| /external/pcre/dist2/src/sljit/ |
| sljitNativeMIPS_64.c | 127 FAIL_IF(push_inst(compiler, op_imm | S(src1) | TA(EQUAL_FLAG) | IMM(src2), EQUAL_FLAG)); \
129 FAIL_IF(push_inst(compiler, op_imm | S(src1) | T(dst) | IMM(src2), DR(dst))); \
133 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | DA(EQUAL_FLAG), EQUAL_FLAG)); \
135 FAIL_IF(push_inst(compiler, op_norm | S(src1) | T(src2) | D(dst), DR(dst))); \
140 if (src2 >= 32) { \
143 src2 -= 32; \
148 FAIL_IF(push_inst(compiler, ins | T(src1) | DA(EQUAL_FLAG) | SH_IMM(src2), EQUAL_FLAG)); \
150 FAIL_IF(push_inst(compiler, ins | T(src1) | D(dst) | SH_IMM(src2), DR(dst))); \
155 FAIL_IF(push_inst(compiler, ins | S(src2) | T(src1) | DA(EQUAL_FLAG), EQUAL_FLAG)); \
157 FAIL_IF(push_inst(compiler, ins | S(src2) | T(src1) | D(dst), DR(dst)));
[all...] |
| sljitNativeSPARC_32.c | 36 #define ARG2(flags, src2) ((flags & SRC2_IMM) ? IMM(src2) : S2(src2))
39 sljit_s32 dst, sljit_s32 src1, sljit_sw src2)
49 if (dst != src2)
50 return push_inst(compiler, OR | D(dst) | S1(0) | S2(src2), DR(dst));
58 return push_inst(compiler, AND | D(dst) | S1(src2) | IMM(0xff), DR(dst));
59 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(24), DR(dst)));
62 else if (dst != src2)
70 FAIL_IF(push_inst(compiler, SLL | D(dst) | S1(src2) | IMM(16), DR(dst)))
[all...] |
| /external/v8/src/ia32/ |
| assembler-ia32.h | [all...] |
| /bionic/libc/arch-arm64/generic/bionic/ |
| strcmp.S | 43 #define src2 x1 define
63 eor tmp1, src1, src2
74 ldr data2, [src2], #8
140 bic src2, src2, #7
144 ldr data2, [src2], #8
160 SRC2. */
165 ldrb data2w, [src2], #1
175 and tmp1, src2, #0xff8
179 ldr data2, [src2], #
[all...] |
| strncmp.S | 41 #define src2 x1 define
70 eor tmp1, src1, src2
86 ldr data2, [src2], #8
178 bic src2, src2, #7
181 ldr data2, [src2], #8
210 ldrb data2w, [src2], #1
231 ldrb data2w, [src2], #1
241 SRC2. */
246 and tmp2, src2, #0xff
[all...] |
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| vpx_convolve_msa.h | 50 #define HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \
57 VSHF_B2_SB(src0, src1, src2, src3, mask0, mask0, vec0_m, vec1_m); \
59 VSHF_B2_SB(src0, src1, src2, src3, mask1, mask1, vec2_m, vec3_m); \
61 VSHF_B2_SB(src0, src1, src2, src3, mask2, mask2, vec4_m, vec5_m); \
63 VSHF_B2_SB(src0, src1, src2, src3, mask3, mask3, vec6_m, vec7_m); \
68 #define HORIZ_8TAP_8WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \
76 VSHF_B2_SB(src2, src2, src3, src3, mask0, mask0, vec2_m, vec3_m); \
80 VSHF_B2_SB(src2, src2, src3, src3, mask2, mask2, vec2_m, vec3_m);
[all...] |
| vpx_convolve8_vert_msa.c | 19 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
31 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
34 ILVR_B4_SB(src1, src0, src3, src2, src5, src4, src2, src1, src10_r, src32_r,
70 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
81 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
82 XORI_B7_128_SB(src0, src1, src2, src3, src4, src5, src6);
84 ILVR_B4_SB(src1, src0, src3, src2, src5, src4, src2, src1, src10_r, src32_r,
124 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10 local
205 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
303 v16i8 src0, src1, src2, src3, src4; local
327 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
370 v16u8 src0, src1, src2, src3, src4, vec0, vec1, vec2, vec3, filt0; local
393 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
446 v16u8 src0, src1, src2, src3, src4; local
494 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; local
562 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
[all...] |
| vpx_convolve8_avg_horiz_msa.c | 20 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local
36 LD_SB4(src, src_stride, src0, src1, src2, src3);
37 XORI_B4_128_SB(src0, src1, src2, src3);
38 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3,
54 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local
70 LD_SB4(src, src_stride, src0, src1, src2, src3);
71 XORI_B4_128_SB(src0, src1, src2, src3);
77 HORIZ_8TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, mask2, mask3,
79 LD_SB4(src, src_stride, src0, src1, src2, src3);
80 XORI_B4_128_SB(src0, src1, src2, src3)
110 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local
148 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local
202 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local
257 v16i8 src0, src1, src2, src3, filt0, filt1, filt2, filt3; local
317 v16i8 src0, src1, src2, src3, mask; local
343 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
387 v16i8 src0, src1, src2, src3, mask; local
413 v16i8 src0, src1, src2, src3, mask; local
494 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
561 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
610 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
[all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.h | 104 void Push(Register src1, Register src2, Condition cond = al) {
105 if (src1.code() > src2.code()) {
106 stm(db_w, sp, src1.bit() | src2.bit(), cond);
109 str(src2, MemOperand(sp, 4, NegPreIndex), cond);
114 void Push(Register src1, Register src2, Register src3, Condition cond = al) {
115 if (src1.code() > src2.code()) {
116 if (src2.code() > src3.code()) {
117 stm(db_w, sp, src1.bit() | src2.bit() | src3.bit(), cond);
119 stm(db_w, sp, src1.bit() | src2.bit(), cond);
124 Push(src2, src3, cond)
[all...] |
| assembler-arm.h | 731 void and_(Register dst, Register src1, const Operand& src2,
733 void and_(Register dst, Register src1, Register src2, SBit s = LeaveCC,
736 void eor(Register dst, Register src1, const Operand& src2,
739 void sub(Register dst, Register src1, const Operand& src2,
741 void sub(Register dst, Register src1, Register src2,
744 void rsb(Register dst, Register src1, const Operand& src2,
747 void add(Register dst, Register src1, const Operand& src2,
749 void add(Register dst, Register src1, Register src2,
752 void adc(Register dst, Register src1, const Operand& src2,
755 void sbc(Register dst, Register src1, const Operand& src2,
[all...] |
| assembler-arm.cc | [all...] |
| /external/clang/test/CodeGenCXX/ |
| debug-info-line.cpp | 85 int src2();
88 src1())[src2()];
94 int src2();
97 src1)[src2()];
103 int src2();
106 src1)[src2()];
|
| /external/libpng/mips/ |
| filter_msa_intrinsics.c | 373 v16u8 src0, src1, src2, src3, src4, src5, src6, src7; local
377 LD_UB4(rp, 16, src0, src1, src2, src3);
381 ADD4(src0, src4, src1, src5, src2, src6, src3, src7,
382 src0, src1, src2, src3);
384 ST_UB4(src0, src1, src2, src3, rp, 16);
398 LD_UB4(rp, 16, src0, src1, src2, src3);
401 ADD4(src0, src4, src1, src5, src2, src6, src3, src7,
402 src0, src1, src2, src3);
404 ST_UB4(src0, src1, src2, src3, rp, 16);
412 src2 = LD_UB(rp + 32)
465 v16u8 src0, src1, src2, src3, src4; local
505 v16u8 src0, src1, src2, src3, src4, dst0, dst1; local
550 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; local
603 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; local
661 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; local
734 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, dst0, dst1; local
[all...] |
| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| sixtap_filter_msa.c | 52 #define HORIZ_6TAP_4WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \
57 VSHF_B2_SB(src0, src1, src2, src3, mask0, mask0, vec0_m, vec1_m); \
59 VSHF_B2_SB(src0, src1, src2, src3, mask1, mask1, vec2_m, vec3_m); \
61 VSHF_B2_SB(src0, src1, src2, src3, mask2, mask2, vec4_m, vec5_m); \
65 #define HORIZ_6TAP_8WID_4VECS_FILT(src0, src1, src2, src3, mask0, mask1, \
72 VSHF_B2_SB(src2, src2, src3, src3, mask0, mask0, vec2_m, vec3_m); \
76 VSHF_B2_SB(src2, src2, src3, src3, mask1, mask1, vec2_m, vec3_m); \
78 VSHF_B2_SB(src2, src2, src3, src3, mask2, mask2, vec6_m, vec7_m);
138 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; local
164 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; local
209 v16i8 src0, src1, src2, src3, filt0, filt1, filt2; local
253 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, filt0, filt1, filt2; local
299 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
344 v16i8 src0, src1, src2, src3, src4, src7, src8, src9, src10; local
392 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
458 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
530 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
625 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; local
650 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; local
695 v16i8 src0, src1, src2, src3, filt0, filt1, mask0, mask1; local
727 v16i8 src0, src1, src2, src3, src4, src5, src6, src7; local
773 v16i8 src0, src1, src2, src3, src4, src5; local
818 v16i8 src0, src1, src2, src7, src8, src9, src10; local
862 v16i8 src0, src1, src2, src3, src4, src5, src6; local
921 v16i8 src0, src1, src2, src3, src4, src5, src6, filt_hz0, filt_hz1; local
978 v16i8 src0, src1, src2, src3, src4, src5, src6, filt_hz0, filt_hz1; local
1057 v16i8 src0, src1, src2, src3, src4, src5, src6; local
1120 v16i8 src0, src1, src2, src3, src4, src5, src6; local
1205 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
1267 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
[all...] |
| bilinear_filter_msa.c | 33 v16i8 src0, src1, src2, src3, mask; local
42 LD_SB4(src, src_stride, src0, src1, src2, src3);
43 VSHF_B2_UB(src0, src1, src2, src3, mask, mask, vec0, vec1);
54 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
63 LD_SB8(src, src_stride, src0, src1, src2, src3, src4, src5, src6, src7);
64 VSHF_B2_UB(src0, src1, src2, src3, mask, mask, vec0, vec1);
90 v16i8 src0, src1, src2, src3, mask; local
98 LD_SB4(src, src_stride, src0, src1, src2, src3);
100 VSHF_B2_UH(src2, src2, src3, src3, mask, mask, vec2, vec3)
112 v16i8 src0, src1, src2, src3, mask, out0, out1; local
184 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
247 v16i8 src0, src1, src2, src3, src4; local
271 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
314 v16u8 src0, src1, src2, src3, src4, vec0, vec1, vec2, vec3, filt0; local
336 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
388 v16u8 src0, src1, src2, src3, src4; local
435 v16i8 src0, src1, src2, src3, src4, mask; local
464 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, mask; local
520 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; local
561 v16i8 src0, src1, src2, src3, src4, mask, out0, out1; local
650 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, mask; local
[all...] |
| /external/vixl/src/aarch64/ |
| logic-aarch64.cc | 481 const LogicVRegister& src2,
486 int64_t sb = src2.Int(vform, i);
488 uint64_t ub = src2.Uint(vform, i);
536 const LogicVRegister& src2) {
540 uint64_t ub = src2.Uint(vform, i);
550 const LogicVRegister& src2) {
556 uint64_t ub = src2.UintLeftJustified(vform, i);
581 const LogicVRegister& src2) {
583 uzp1(vform, temp1, src1, src2);
584 uzp2(vform, temp2, src1, src2);
3480 add(VectorFormatDoubleWidth(vform), temp, src1, src2); local
3502 add(VectorFormatDoubleWidth(vform), temp, src1, src2); local
3524 sub(VectorFormatDoubleWidth(vform), temp, src1, src2); local
3546 sub(VectorFormatDoubleWidth(vform), temp, src1, src2); local
[all...] |
| /external/u-boot/arch/arm/mach-s5pc1xx/include/mach/ |
| clock.h | 25 unsigned int src2; member in struct:s5pc100_clock
61 unsigned int src2; member in struct:s5pc110_clock
|
| /external/u-boot/cmd/ |
| binop.c | 91 u8 *result, *src1, *src2; local
115 src2 = malloc(len);
123 read_from_mem(simple_strtoul(src2arg + 1, NULL, 16), src2, len);
125 read_from_env_var(src2arg, src2);
132 result[i] = src1[i] ^ src2[i];
136 result[i] = src1[i] | src2[i];
140 result[i] = src1[i] & src2[i];
163 free(src2);
172 "op count [*]src1 [*]src2 [[*]dest]\n"
173 " - compute binary operation of data at/in src1 and\n src2 (either *memaddr, env var name or hex string)\n and store result in/at dest, where op is one (…)
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_tile.c | 54 uint8_t *src2 = (uint8_t *)src + src_pitch * row + col; local
62 memcpy(dst2, src2, columns * sizeof(uint8_t));
64 src2 += src_pitch;
85 uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; local
93 memcpy(dst2, src2, columns * sizeof(uint16_t));
95 src2 += src_pitch;
116 uint16_t *src2 = (uint16_t *)src + src_pitch * row + col; local
124 memcpy(dst2, src2, columns * sizeof(uint16_t));
126 src2 += src_pitch;
147 uint32_t *src2 = (uint32_t *)src + src_pitch * row + col local
178 uint64_t *src2 = (uint64_t *)src + src_pitch * row + col; local
270 uint8_t *src2 = (uint8_t *)src + row * src_pitch + local
303 uint16_t *src2 = (uint16_t *)src + row * src_pitch + local
336 uint16_t *src2 = (uint16_t *)src + row * src_pitch + local
369 uint32_t *src2 = (uint32_t *)src + row * src_pitch + local
402 uint64_t *src2 = (uint64_t *)src + row * src_pitch + local
[all...] |
| /external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
| ir3.c | 200 struct ir3_register *src2 = instr->regs[2]; local
229 if (src2) {
230 iassert((src2->flags & IR3_REG_IMMED) ||
231 !((src1->flags ^ src2->flags) & IR3_REG_HALF));
233 if (src2->flags & IR3_REG_RELATIV) {
234 iassert(src2->array.offset < (1 << 10));
235 cat2->rel2.src2 = reg(src2, info, instr->repeat,
238 cat2->rel2.src2_c = !!(src2->flags & IR3_REG_CONST);
240 } else if (src2->flags & IR3_REG_CONST)
280 struct ir3_register *src2 = instr->regs[2]; local
421 struct ir3_register *src2 = instr->regs[2]; local
475 struct ir3_register *dst, *src1, *src2; local
[all...] |
| /external/libaom/libaom/aom_dsp/mips/ |
| aom_convolve8_vert_msa.c | 22 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
34 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
37 ILVR_B4_SB(src1, src0, src3, src2, src5, src4, src2, src1, src10_r, src32_r,
73 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
84 LD_SB7(src, src_stride, src0, src1, src2, src3, src4, src5, src6);
85 XORI_B7_128_SB(src0, src1, src2, src3, src4, src5, src6);
87 ILVR_B4_SB(src1, src0, src3, src2, src5, src4, src2, src1, src10_r, src32_r,
127 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10 local
208 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
306 v16i8 src0, src1, src2, src3, src4; local
330 v16i8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
373 v16u8 src0, src1, src2, src3, src4, vec0, vec1, vec2, vec3, filt0; local
396 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8; local
449 v16u8 src0, src1, src2, src3, src4; local
497 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9; local
565 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10; local
[all...] |
| /external/libmpeg2/common/x86/ |
| impeg2_inter_pred_sse42_intr.c | 225 UWORD8 *src1, *src2; local
234 src2 = buf_src2->pu1_y;
242 src2_r0 = _mm_loadu_si128((__m128i *) (src2));
243 src2_r1 = _mm_loadu_si128((__m128i *) (src2 + 16));
244 src2_r2 = _mm_loadu_si128((__m128i *) (src2 + 2 * 16));
245 src2_r3 = _mm_loadu_si128((__m128i *) (src2 + 3 * 16));
259 src2 += 4 * 16;
266 src2_r0 = _mm_loadu_si128((__m128i *) (src2));
267 src2_r1 = _mm_loadu_si128((__m128i *) (src2 + 16));
268 src2_r2 = _mm_loadu_si128((__m128i *) (src2 + 2 * 16))
[all...] |
| /external/v8/src/arm64/ |
| simulator-logic-arm64.cc | 587 const LogicVRegister& src2, Condition cond) {
591 int64_t sb = src2.Int(vform, i);
593 uint64_t ub = src2.Uint(vform, i);
635 const LogicVRegister& src2) {
639 uint64_t ub = src2.Uint(vform, i);
647 const LogicVRegister& src2) {
653 uint64_t ub = src2.UintLeftJustified(vform, i);
676 const LogicVRegister& src2) {
678 uzp1(vform, temp1, src1, src2);
679 uzp2(vform, temp2, src1, src2);
2759 add(VectorFormatDoubleWidth(vform), temp, src1, src2); local
2777 add(VectorFormatDoubleWidth(vform), temp, src1, src2); local
2795 sub(VectorFormatDoubleWidth(vform), temp, src1, src2); local
2813 sub(VectorFormatDoubleWidth(vform), temp, src1, src2); local
[all...] |
| /external/libyuv/files/source/ |
| scale_msa.cc | 69 v16u8 src0, src1, src2, src3, vec0, vec1, vec2, vec3, dst0; local
76 src2 = (v16u8)__msa_ld_b((v16i8*)t, 0);
80 vec2 = (v16u8)__msa_vshf_b(shuffler, (v16i8)src2, (v16i8)src2);
131 v16u8 src0 = {0}, src1 = {0}, src2 = {0}, src3 = {0}; local
149 src2 = (v16u8)__msa_insert_d((v2i64)src2, 0, data0);
150 src2 = (v16u8)__msa_insert_d((v2i64)src2, 1, data1);
153 vec0 = (v16u8)__msa_ilvr_b((v16i8)src2, (v16i8)src0)
182 v16u8 src0, src1, src2, src3, dst0, dst1; local
203 v16u8 src0, src1, src2, src3, vec0, vec1, vec2, vec3, dst0, dst1; local
230 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, dst0, dst1; local
268 v16u8 src0, src1, src2, src3, vec0, vec1, dst0; local
294 v16u8 src0, src1, src2, src3, src4, src5, src6, src7, dst0; local
387 v16u8 src0, src1, src2, src3, out; local
457 v16u8 src0, src1, src2, src3, src4, src5, out; local
[all...] |
| /external/v8/src/s390/ |
| macro-assembler-s390.h | 281 void Add32(Register dst, Register src1, Register src2);
282 void AddP(Register dst, Register src1, Register src2);
283 void AddP_ExtendSrc(Register dst, Register src1, Register src2);
295 void AddLogical32(Register dst, Register src1, Register src2);
298 void AddLogicalWithCarry32(Register dst, Register src1, Register src2);
322 void Sub32(Register dst, Register src1, Register src2);
323 void SubP(Register dst, Register src1, Register src2);
324 void SubP_ExtendSrc(Register dst, Register src1, Register src2);
337 void SubLogical32(Register dst, Register src1, Register src2);
339 void SubLogicalWithBorrow32(Register dst, Register src1, Register src2);
[all...] |
