1 /* 2 * Copyright 2010 Christoph Bumiller 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 23 #include "pipe/p_defines.h" 24 #include "util/u_framebuffer.h" 25 #include "util/u_helpers.h" 26 #include "util/u_inlines.h" 27 #include "util/u_transfer.h" 28 #include "util/format_srgb.h" 29 30 #include "tgsi/tgsi_parse.h" 31 32 #include "nv50/nv50_stateobj.h" 33 #include "nv50/nv50_context.h" 34 #include "nv50/nv50_query_hw.h" 35 36 #include "nv50/nv50_3d.xml.h" 37 #include "nv50/g80_texture.xml.h" 38 39 #include "nouveau_gldefs.h" 40 41 /* Caveats: 42 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will 43 * use non-normalized coordinates, everything else won't 44 * (The relevant bit is in the TIC entry and not the TSC entry.) 45 * 46 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is 47 * always activated on NVA0 + 48 * (Give me the global bit, otherwise it's not worth the CPU work.) 49 * 50 * ! pipe_sampler_state.border_color is not swizzled according to the texture 51 * swizzle in pipe_sampler_view 52 * (This will be ugly with indirect independent texture/sampler access, 53 * we'd have to emulate the logic in the shader. GL doesn't have that, 54 * D3D doesn't have swizzle, if we knew what we were implementing we'd be 55 * good.) 56 * 57 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn 58 * 59 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS 60 * (There's a GL query for that, forcing an exception is just ridiculous.) 61 * 62 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0 63 * (The hardware only has 8 slots meant for TexCoord and we have to assign 64 * in advance to maintain elegant separate shader objects.) 65 */ 66 67 static inline uint32_t 68 nv50_colormask(unsigned mask) 69 { 70 uint32_t ret = 0; 71 72 if (mask & PIPE_MASK_R) 73 ret |= 0x0001; 74 if (mask & PIPE_MASK_G) 75 ret |= 0x0010; 76 if (mask & PIPE_MASK_B) 77 ret |= 0x0100; 78 if (mask & PIPE_MASK_A) 79 ret |= 0x1000; 80 81 return ret; 82 } 83 84 #define NV50_BLEND_FACTOR_CASE(a, b) \ 85 case PIPE_BLENDFACTOR_##a: return NV50_BLEND_FACTOR_##b 86 87 static inline uint32_t 88 nv50_blend_fac(unsigned factor) 89 { 90 switch (factor) { 91 NV50_BLEND_FACTOR_CASE(ONE, ONE); 92 NV50_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR); 93 NV50_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA); 94 NV50_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA); 95 NV50_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR); 96 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE); 97 NV50_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR); 98 NV50_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA); 99 NV50_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR); 100 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA); 101 NV50_BLEND_FACTOR_CASE(ZERO, ZERO); 102 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR); 103 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA); 104 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA); 105 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR); 106 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR); 107 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA); 108 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR); 109 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA); 110 default: 111 return NV50_BLEND_FACTOR_ZERO; 112 } 113 } 114 115 static void * 116 nv50_blend_state_create(struct pipe_context *pipe, 117 const struct pipe_blend_state *cso) 118 { 119 struct nv50_blend_stateobj *so = CALLOC_STRUCT(nv50_blend_stateobj); 120 int i; 121 bool emit_common_func = cso->rt[0].blend_enable; 122 uint32_t ms; 123 124 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) { 125 SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1); 126 SB_DATA (so, cso->independent_blend_enable); 127 } 128 129 so->pipe = *cso; 130 131 SB_BEGIN_3D(so, COLOR_MASK_COMMON, 1); 132 SB_DATA (so, !cso->independent_blend_enable); 133 134 SB_BEGIN_3D(so, BLEND_ENABLE_COMMON, 1); 135 SB_DATA (so, !cso->independent_blend_enable); 136 137 if (cso->independent_blend_enable) { 138 SB_BEGIN_3D(so, BLEND_ENABLE(0), 8); 139 for (i = 0; i < 8; ++i) { 140 SB_DATA(so, cso->rt[i].blend_enable); 141 if (cso->rt[i].blend_enable) 142 emit_common_func = true; 143 } 144 145 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) { 146 emit_common_func = false; 147 148 for (i = 0; i < 8; ++i) { 149 if (!cso->rt[i].blend_enable) 150 continue; 151 SB_BEGIN_3D_(so, NVA3_3D_IBLEND_EQUATION_RGB(i), 6); 152 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func)); 153 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_src_factor)); 154 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_dst_factor)); 155 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func)); 156 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_src_factor)); 157 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_dst_factor)); 158 } 159 } 160 } else { 161 SB_BEGIN_3D(so, BLEND_ENABLE(0), 1); 162 SB_DATA (so, cso->rt[0].blend_enable); 163 } 164 165 if (emit_common_func) { 166 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5); 167 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func)); 168 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_src_factor)); 169 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_dst_factor)); 170 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func)); 171 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_src_factor)); 172 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1); 173 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_dst_factor)); 174 } 175 176 if (cso->logicop_enable) { 177 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2); 178 SB_DATA (so, 1); 179 SB_DATA (so, nvgl_logicop_func(cso->logicop_func)); 180 } else { 181 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 1); 182 SB_DATA (so, 0); 183 } 184 185 if (cso->independent_blend_enable) { 186 SB_BEGIN_3D(so, COLOR_MASK(0), 8); 187 for (i = 0; i < 8; ++i) 188 SB_DATA(so, nv50_colormask(cso->rt[i].colormask)); 189 } else { 190 SB_BEGIN_3D(so, COLOR_MASK(0), 1); 191 SB_DATA (so, nv50_colormask(cso->rt[0].colormask)); 192 } 193 194 ms = 0; 195 if (cso->alpha_to_coverage) 196 ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE; 197 if (cso->alpha_to_one) 198 ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE; 199 200 SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1); 201 SB_DATA (so, ms); 202 203 assert(so->size <= ARRAY_SIZE(so->state)); 204 return so; 205 } 206 207 static void 208 nv50_blend_state_bind(struct pipe_context *pipe, void *hwcso) 209 { 210 struct nv50_context *nv50 = nv50_context(pipe); 211 212 nv50->blend = hwcso; 213 nv50->dirty_3d |= NV50_NEW_3D_BLEND; 214 } 215 216 static void 217 nv50_blend_state_delete(struct pipe_context *pipe, void *hwcso) 218 { 219 FREE(hwcso); 220 } 221 222 /* NOTE: ignoring line_last_pixel */ 223 static void * 224 nv50_rasterizer_state_create(struct pipe_context *pipe, 225 const struct pipe_rasterizer_state *cso) 226 { 227 struct nv50_rasterizer_stateobj *so; 228 uint32_t reg; 229 230 so = CALLOC_STRUCT(nv50_rasterizer_stateobj); 231 if (!so) 232 return NULL; 233 so->pipe = *cso; 234 235 #ifndef NV50_SCISSORS_CLIPPING 236 for (int i = 0; i < NV50_MAX_VIEWPORTS; i++) { 237 SB_BEGIN_3D(so, SCISSOR_ENABLE(i), 1); 238 SB_DATA (so, cso->scissor); 239 } 240 #endif 241 242 SB_BEGIN_3D(so, SHADE_MODEL, 1); 243 SB_DATA (so, cso->flatshade ? NV50_3D_SHADE_MODEL_FLAT : 244 NV50_3D_SHADE_MODEL_SMOOTH); 245 SB_BEGIN_3D(so, PROVOKING_VERTEX_LAST, 1); 246 SB_DATA (so, !cso->flatshade_first); 247 SB_BEGIN_3D(so, VERTEX_TWO_SIDE_ENABLE, 1); 248 SB_DATA (so, cso->light_twoside); 249 250 SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1); 251 SB_DATA (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000); 252 253 SB_BEGIN_3D(so, MULTISAMPLE_ENABLE, 1); 254 SB_DATA (so, cso->multisample); 255 256 SB_BEGIN_3D(so, LINE_WIDTH, 1); 257 SB_DATA (so, fui(cso->line_width)); 258 SB_BEGIN_3D(so, LINE_SMOOTH_ENABLE, 1); 259 SB_DATA (so, cso->line_smooth); 260 261 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1); 262 if (cso->line_stipple_enable) { 263 SB_DATA (so, 1); 264 SB_BEGIN_3D(so, LINE_STIPPLE, 1); 265 SB_DATA (so, (cso->line_stipple_pattern << 8) | 266 cso->line_stipple_factor); 267 } else { 268 SB_DATA (so, 0); 269 } 270 271 if (!cso->point_size_per_vertex) { 272 SB_BEGIN_3D(so, POINT_SIZE, 1); 273 SB_DATA (so, fui(cso->point_size)); 274 } 275 SB_BEGIN_3D(so, POINT_SPRITE_ENABLE, 1); 276 SB_DATA (so, cso->point_quad_rasterization); 277 SB_BEGIN_3D(so, POINT_SMOOTH_ENABLE, 1); 278 SB_DATA (so, cso->point_smooth); 279 280 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 3); 281 SB_DATA (so, nvgl_polygon_mode(cso->fill_front)); 282 SB_DATA (so, nvgl_polygon_mode(cso->fill_back)); 283 SB_DATA (so, cso->poly_smooth); 284 285 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3); 286 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE); 287 SB_DATA (so, cso->front_ccw ? NV50_3D_FRONT_FACE_CCW : 288 NV50_3D_FRONT_FACE_CW); 289 switch (cso->cull_face) { 290 case PIPE_FACE_FRONT_AND_BACK: 291 SB_DATA(so, NV50_3D_CULL_FACE_FRONT_AND_BACK); 292 break; 293 case PIPE_FACE_FRONT: 294 SB_DATA(so, NV50_3D_CULL_FACE_FRONT); 295 break; 296 case PIPE_FACE_BACK: 297 default: 298 SB_DATA(so, NV50_3D_CULL_FACE_BACK); 299 break; 300 } 301 302 SB_BEGIN_3D(so, POLYGON_STIPPLE_ENABLE, 1); 303 SB_DATA (so, cso->poly_stipple_enable); 304 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3); 305 SB_DATA (so, cso->offset_point); 306 SB_DATA (so, cso->offset_line); 307 SB_DATA (so, cso->offset_tri); 308 309 if (cso->offset_point || cso->offset_line || cso->offset_tri) { 310 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1); 311 SB_DATA (so, fui(cso->offset_scale)); 312 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1); 313 SB_DATA (so, fui(cso->offset_units * 2.0f)); 314 SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1); 315 SB_DATA (so, fui(cso->offset_clamp)); 316 } 317 318 if (cso->depth_clip) { 319 reg = 0; 320 } else { 321 reg = 322 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR | 323 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR | 324 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1; 325 } 326 #ifndef NV50_SCISSORS_CLIPPING 327 reg |= 328 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7 | 329 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1; 330 #endif 331 SB_BEGIN_3D(so, VIEW_VOLUME_CLIP_CTRL, 1); 332 SB_DATA (so, reg); 333 334 SB_BEGIN_3D(so, DEPTH_CLIP_NEGATIVE_Z, 1); 335 SB_DATA (so, cso->clip_halfz); 336 337 SB_BEGIN_3D(so, PIXEL_CENTER_INTEGER, 1); 338 SB_DATA (so, !cso->half_pixel_center); 339 340 assert(so->size <= ARRAY_SIZE(so->state)); 341 return (void *)so; 342 } 343 344 static void 345 nv50_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso) 346 { 347 struct nv50_context *nv50 = nv50_context(pipe); 348 349 nv50->rast = hwcso; 350 nv50->dirty_3d |= NV50_NEW_3D_RASTERIZER; 351 } 352 353 static void 354 nv50_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso) 355 { 356 FREE(hwcso); 357 } 358 359 static void * 360 nv50_zsa_state_create(struct pipe_context *pipe, 361 const struct pipe_depth_stencil_alpha_state *cso) 362 { 363 struct nv50_zsa_stateobj *so = CALLOC_STRUCT(nv50_zsa_stateobj); 364 365 so->pipe = *cso; 366 367 SB_BEGIN_3D(so, DEPTH_WRITE_ENABLE, 1); 368 SB_DATA (so, cso->depth.writemask); 369 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1); 370 if (cso->depth.enabled) { 371 SB_DATA (so, 1); 372 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1); 373 SB_DATA (so, nvgl_comparison_op(cso->depth.func)); 374 } else { 375 SB_DATA (so, 0); 376 } 377 378 SB_BEGIN_3D(so, DEPTH_BOUNDS_EN, 1); 379 if (cso->depth.bounds_test) { 380 SB_DATA (so, 1); 381 SB_BEGIN_3D(so, DEPTH_BOUNDS(0), 2); 382 SB_DATA (so, fui(cso->depth.bounds_min)); 383 SB_DATA (so, fui(cso->depth.bounds_max)); 384 } else { 385 SB_DATA (so, 0); 386 } 387 388 if (cso->stencil[0].enabled) { 389 SB_BEGIN_3D(so, STENCIL_ENABLE, 5); 390 SB_DATA (so, 1); 391 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op)); 392 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op)); 393 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op)); 394 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func)); 395 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2); 396 SB_DATA (so, cso->stencil[0].writemask); 397 SB_DATA (so, cso->stencil[0].valuemask); 398 } else { 399 SB_BEGIN_3D(so, STENCIL_ENABLE, 1); 400 SB_DATA (so, 0); 401 } 402 403 if (cso->stencil[1].enabled) { 404 assert(cso->stencil[0].enabled); 405 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5); 406 SB_DATA (so, 1); 407 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op)); 408 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op)); 409 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op)); 410 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func)); 411 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2); 412 SB_DATA (so, cso->stencil[1].writemask); 413 SB_DATA (so, cso->stencil[1].valuemask); 414 } else { 415 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 1); 416 SB_DATA (so, 0); 417 } 418 419 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1); 420 if (cso->alpha.enabled) { 421 SB_DATA (so, 1); 422 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2); 423 SB_DATA (so, fui(cso->alpha.ref_value)); 424 SB_DATA (so, nvgl_comparison_op(cso->alpha.func)); 425 } else { 426 SB_DATA (so, 0); 427 } 428 429 SB_BEGIN_3D(so, CB_ADDR, 1); 430 SB_DATA (so, NV50_CB_AUX_ALPHATEST_OFFSET << (8 - 2) | NV50_CB_AUX); 431 SB_BEGIN_3D(so, CB_DATA(0), 1); 432 SB_DATA (so, fui(cso->alpha.ref_value)); 433 434 assert(so->size <= ARRAY_SIZE(so->state)); 435 return (void *)so; 436 } 437 438 static void 439 nv50_zsa_state_bind(struct pipe_context *pipe, void *hwcso) 440 { 441 struct nv50_context *nv50 = nv50_context(pipe); 442 443 nv50->zsa = hwcso; 444 nv50->dirty_3d |= NV50_NEW_3D_ZSA; 445 } 446 447 static void 448 nv50_zsa_state_delete(struct pipe_context *pipe, void *hwcso) 449 { 450 FREE(hwcso); 451 } 452 453 /* ====================== SAMPLERS AND TEXTURES ================================ 454 */ 455 456 static inline unsigned 457 nv50_tsc_wrap_mode(unsigned wrap) 458 { 459 switch (wrap) { 460 case PIPE_TEX_WRAP_REPEAT: 461 return G80_TSC_WRAP_WRAP; 462 case PIPE_TEX_WRAP_MIRROR_REPEAT: 463 return G80_TSC_WRAP_MIRROR; 464 case PIPE_TEX_WRAP_CLAMP_TO_EDGE: 465 return G80_TSC_WRAP_CLAMP_TO_EDGE; 466 case PIPE_TEX_WRAP_CLAMP_TO_BORDER: 467 return G80_TSC_WRAP_BORDER; 468 case PIPE_TEX_WRAP_CLAMP: 469 return G80_TSC_WRAP_CLAMP_OGL; 470 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE: 471 return G80_TSC_WRAP_MIRROR_ONCE_CLAMP_TO_EDGE; 472 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER: 473 return G80_TSC_WRAP_MIRROR_ONCE_BORDER; 474 case PIPE_TEX_WRAP_MIRROR_CLAMP: 475 return G80_TSC_WRAP_MIRROR_ONCE_CLAMP_OGL; 476 default: 477 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap); 478 return G80_TSC_WRAP_WRAP; 479 } 480 } 481 482 void * 483 nv50_sampler_state_create(struct pipe_context *pipe, 484 const struct pipe_sampler_state *cso) 485 { 486 struct nv50_tsc_entry *so = MALLOC_STRUCT(nv50_tsc_entry); 487 float f[2]; 488 489 so->id = -1; 490 491 so->tsc[0] = (0x00026000 | 492 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) | 493 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) | 494 (nv50_tsc_wrap_mode(cso->wrap_r) << 6)); 495 496 switch (cso->mag_img_filter) { 497 case PIPE_TEX_FILTER_LINEAR: 498 so->tsc[1] = G80_TSC_1_MAG_FILTER_LINEAR; 499 break; 500 case PIPE_TEX_FILTER_NEAREST: 501 default: 502 so->tsc[1] = G80_TSC_1_MAG_FILTER_NEAREST; 503 break; 504 } 505 506 switch (cso->min_img_filter) { 507 case PIPE_TEX_FILTER_LINEAR: 508 so->tsc[1] |= G80_TSC_1_MIN_FILTER_LINEAR; 509 break; 510 case PIPE_TEX_FILTER_NEAREST: 511 default: 512 so->tsc[1] |= G80_TSC_1_MIN_FILTER_NEAREST; 513 break; 514 } 515 516 switch (cso->min_mip_filter) { 517 case PIPE_TEX_MIPFILTER_LINEAR: 518 so->tsc[1] |= G80_TSC_1_MIP_FILTER_LINEAR; 519 break; 520 case PIPE_TEX_MIPFILTER_NEAREST: 521 so->tsc[1] |= G80_TSC_1_MIP_FILTER_NEAREST; 522 break; 523 case PIPE_TEX_MIPFILTER_NONE: 524 default: 525 so->tsc[1] |= G80_TSC_1_MIP_FILTER_NONE; 526 break; 527 } 528 529 if (nouveau_screen(pipe->screen)->class_3d >= NVE4_3D_CLASS) { 530 if (cso->seamless_cube_map) 531 so->tsc[1] |= GK104_TSC_1_CUBEMAP_INTERFACE_FILTERING; 532 if (!cso->normalized_coords) 533 so->tsc[1] |= GK104_TSC_1_FLOAT_COORD_NORMALIZATION_FORCE_UNNORMALIZED_COORDS; 534 } else { 535 so->seamless_cube_map = cso->seamless_cube_map; 536 } 537 538 if (cso->max_anisotropy >= 16) 539 so->tsc[0] |= (7 << 20); 540 else 541 if (cso->max_anisotropy >= 12) 542 so->tsc[0] |= (6 << 20); 543 else { 544 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20; 545 546 if (cso->max_anisotropy >= 4) 547 so->tsc[1] |= 6 << G80_TSC_1_TRILIN_OPT__SHIFT; 548 else 549 if (cso->max_anisotropy >= 2) 550 so->tsc[1] |= 4 << G80_TSC_1_TRILIN_OPT__SHIFT; 551 } 552 553 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) { 554 /* NOTE: must be deactivated for non-shadow textures */ 555 so->tsc[0] |= (1 << 9); 556 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10; 557 } 558 559 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f); 560 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12; 561 562 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f); 563 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f); 564 so->tsc[2] = 565 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff); 566 567 so->tsc[2] |= 568 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[0]) << 24; 569 so->tsc[3] = 570 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[1]) << 12; 571 so->tsc[3] |= 572 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[2]) << 20; 573 574 so->tsc[4] = fui(cso->border_color.f[0]); 575 so->tsc[5] = fui(cso->border_color.f[1]); 576 so->tsc[6] = fui(cso->border_color.f[2]); 577 so->tsc[7] = fui(cso->border_color.f[3]); 578 579 return (void *)so; 580 } 581 582 static void 583 nv50_sampler_state_delete(struct pipe_context *pipe, void *hwcso) 584 { 585 unsigned s, i; 586 587 for (s = 0; s < 3; ++s) { 588 assert(nv50_context(pipe)->num_samplers[s] <= PIPE_MAX_SAMPLERS); 589 for (i = 0; i < nv50_context(pipe)->num_samplers[s]; ++i) 590 if (nv50_context(pipe)->samplers[s][i] == hwcso) 591 nv50_context(pipe)->samplers[s][i] = NULL; 592 } 593 594 nv50_screen_tsc_free(nv50_context(pipe)->screen, nv50_tsc_entry(hwcso)); 595 596 FREE(hwcso); 597 } 598 599 static inline void 600 nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s, 601 unsigned nr, void **hwcso) 602 { 603 unsigned i; 604 605 assert(nr <= PIPE_MAX_SAMPLERS); 606 for (i = 0; i < nr; ++i) { 607 struct nv50_tsc_entry *old = nv50->samplers[s][i]; 608 609 nv50->samplers[s][i] = nv50_tsc_entry(hwcso[i]); 610 if (old) 611 nv50_screen_tsc_unlock(nv50->screen, old); 612 } 613 assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS); 614 for (; i < nv50->num_samplers[s]; ++i) { 615 if (nv50->samplers[s][i]) { 616 nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]); 617 nv50->samplers[s][i] = NULL; 618 } 619 } 620 621 nv50->num_samplers[s] = nr; 622 623 nv50->dirty_3d |= NV50_NEW_3D_SAMPLERS; 624 } 625 626 static void 627 nv50_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s) 628 { 629 nv50_stage_sampler_states_bind(nv50_context(pipe), 0, nr, s); 630 } 631 632 static void 633 nv50_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s) 634 { 635 nv50_stage_sampler_states_bind(nv50_context(pipe), 2, nr, s); 636 } 637 638 static void 639 nv50_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s) 640 { 641 nv50_stage_sampler_states_bind(nv50_context(pipe), 1, nr, s); 642 } 643 644 static void 645 nv50_bind_sampler_states(struct pipe_context *pipe, 646 enum pipe_shader_type shader, unsigned start, 647 unsigned num_samplers, void **samplers) 648 { 649 assert(start == 0); 650 switch (shader) { 651 case PIPE_SHADER_VERTEX: 652 nv50_vp_sampler_states_bind(pipe, num_samplers, samplers); 653 break; 654 case PIPE_SHADER_GEOMETRY: 655 nv50_gp_sampler_states_bind(pipe, num_samplers, samplers); 656 break; 657 case PIPE_SHADER_FRAGMENT: 658 nv50_fp_sampler_states_bind(pipe, num_samplers, samplers); 659 break; 660 default: 661 assert(!"unexpected shader type"); 662 break; 663 } 664 } 665 666 667 668 /* NOTE: only called when not referenced anywhere, won't be bound */ 669 static void 670 nv50_sampler_view_destroy(struct pipe_context *pipe, 671 struct pipe_sampler_view *view) 672 { 673 pipe_resource_reference(&view->texture, NULL); 674 675 nv50_screen_tic_free(nv50_context(pipe)->screen, nv50_tic_entry(view)); 676 677 FREE(nv50_tic_entry(view)); 678 } 679 680 static inline void 681 nv50_stage_set_sampler_views(struct nv50_context *nv50, int s, 682 unsigned nr, 683 struct pipe_sampler_view **views) 684 { 685 unsigned i; 686 687 assert(nr <= PIPE_MAX_SAMPLERS); 688 for (i = 0; i < nr; ++i) { 689 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]); 690 if (old) 691 nv50_screen_tic_unlock(nv50->screen, old); 692 693 if (views[i] && views[i]->texture) { 694 struct pipe_resource *res = views[i]->texture; 695 if (res->target == PIPE_BUFFER && 696 (res->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)) 697 nv50->textures_coherent[s] |= 1 << i; 698 else 699 nv50->textures_coherent[s] &= ~(1 << i); 700 } else { 701 nv50->textures_coherent[s] &= ~(1 << i); 702 } 703 704 pipe_sampler_view_reference(&nv50->textures[s][i], views[i]); 705 } 706 707 assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS); 708 for (i = nr; i < nv50->num_textures[s]; ++i) { 709 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]); 710 if (!old) 711 continue; 712 nv50_screen_tic_unlock(nv50->screen, old); 713 714 pipe_sampler_view_reference(&nv50->textures[s][i], NULL); 715 } 716 717 nv50->num_textures[s] = nr; 718 719 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_TEXTURES); 720 721 nv50->dirty_3d |= NV50_NEW_3D_TEXTURES; 722 } 723 724 static void 725 nv50_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader, 726 unsigned start, unsigned nr, 727 struct pipe_sampler_view **views) 728 { 729 assert(start == 0); 730 switch (shader) { 731 case PIPE_SHADER_VERTEX: 732 nv50_stage_set_sampler_views(nv50_context(pipe), 0, nr, views); 733 break; 734 case PIPE_SHADER_GEOMETRY: 735 nv50_stage_set_sampler_views(nv50_context(pipe), 1, nr, views); 736 break; 737 case PIPE_SHADER_FRAGMENT: 738 nv50_stage_set_sampler_views(nv50_context(pipe), 2, nr, views); 739 break; 740 default: 741 ; 742 } 743 } 744 745 746 747 /* ============================= SHADERS ======================================= 748 */ 749 750 static void * 751 nv50_sp_state_create(struct pipe_context *pipe, 752 const struct pipe_shader_state *cso, unsigned type) 753 { 754 struct nv50_program *prog; 755 756 prog = CALLOC_STRUCT(nv50_program); 757 if (!prog) 758 return NULL; 759 760 prog->type = type; 761 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens); 762 763 if (cso->stream_output.num_outputs) 764 prog->pipe.stream_output = cso->stream_output; 765 766 prog->translated = nv50_program_translate( 767 prog, nv50_context(pipe)->screen->base.device->chipset, 768 &nouveau_context(pipe)->debug); 769 770 return (void *)prog; 771 } 772 773 static void 774 nv50_sp_state_delete(struct pipe_context *pipe, void *hwcso) 775 { 776 struct nv50_program *prog = (struct nv50_program *)hwcso; 777 778 nv50_program_destroy(nv50_context(pipe), prog); 779 780 FREE((void *)prog->pipe.tokens); 781 FREE(prog); 782 } 783 784 static void * 785 nv50_vp_state_create(struct pipe_context *pipe, 786 const struct pipe_shader_state *cso) 787 { 788 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX); 789 } 790 791 static void 792 nv50_vp_state_bind(struct pipe_context *pipe, void *hwcso) 793 { 794 struct nv50_context *nv50 = nv50_context(pipe); 795 796 nv50->vertprog = hwcso; 797 nv50->dirty_3d |= NV50_NEW_3D_VERTPROG; 798 } 799 800 static void * 801 nv50_fp_state_create(struct pipe_context *pipe, 802 const struct pipe_shader_state *cso) 803 { 804 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT); 805 } 806 807 static void 808 nv50_fp_state_bind(struct pipe_context *pipe, void *hwcso) 809 { 810 struct nv50_context *nv50 = nv50_context(pipe); 811 812 nv50->fragprog = hwcso; 813 nv50->dirty_3d |= NV50_NEW_3D_FRAGPROG; 814 } 815 816 static void * 817 nv50_gp_state_create(struct pipe_context *pipe, 818 const struct pipe_shader_state *cso) 819 { 820 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY); 821 } 822 823 static void 824 nv50_gp_state_bind(struct pipe_context *pipe, void *hwcso) 825 { 826 struct nv50_context *nv50 = nv50_context(pipe); 827 828 nv50->gmtyprog = hwcso; 829 nv50->dirty_3d |= NV50_NEW_3D_GMTYPROG; 830 } 831 832 static void * 833 nv50_cp_state_create(struct pipe_context *pipe, 834 const struct pipe_compute_state *cso) 835 { 836 struct nv50_program *prog; 837 838 prog = CALLOC_STRUCT(nv50_program); 839 if (!prog) 840 return NULL; 841 prog->type = PIPE_SHADER_COMPUTE; 842 843 prog->cp.smem_size = cso->req_local_mem; 844 prog->cp.lmem_size = cso->req_private_mem; 845 prog->parm_size = cso->req_input_mem; 846 847 prog->pipe.tokens = tgsi_dup_tokens((const struct tgsi_token *)cso->prog); 848 849 return (void *)prog; 850 } 851 852 static void 853 nv50_cp_state_bind(struct pipe_context *pipe, void *hwcso) 854 { 855 struct nv50_context *nv50 = nv50_context(pipe); 856 857 nv50->compprog = hwcso; 858 nv50->dirty_cp |= NV50_NEW_CP_PROGRAM; 859 } 860 861 static void 862 nv50_set_constant_buffer(struct pipe_context *pipe, 863 enum pipe_shader_type shader, uint index, 864 const struct pipe_constant_buffer *cb) 865 { 866 struct nv50_context *nv50 = nv50_context(pipe); 867 struct pipe_resource *res = cb ? cb->buffer : NULL; 868 const unsigned s = nv50_context_shader_stage(shader); 869 const unsigned i = index; 870 871 if (shader == PIPE_SHADER_COMPUTE) 872 return; 873 874 assert(i < NV50_MAX_PIPE_CONSTBUFS); 875 if (nv50->constbuf[s][i].user) 876 nv50->constbuf[s][i].u.buf = NULL; 877 else 878 if (nv50->constbuf[s][i].u.buf) { 879 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_CB(s, i)); 880 nv04_resource(nv50->constbuf[s][i].u.buf)->cb_bindings[s] &= ~(1 << i); 881 } 882 pipe_resource_reference(&nv50->constbuf[s][i].u.buf, res); 883 884 nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? true : false; 885 if (nv50->constbuf[s][i].user) { 886 nv50->constbuf[s][i].u.data = cb->user_buffer; 887 nv50->constbuf[s][i].size = MIN2(cb->buffer_size, 0x10000); 888 nv50->constbuf_valid[s] |= 1 << i; 889 nv50->constbuf_coherent[s] &= ~(1 << i); 890 } else 891 if (res) { 892 nv50->constbuf[s][i].offset = cb->buffer_offset; 893 nv50->constbuf[s][i].size = MIN2(align(cb->buffer_size, 0x100), 0x10000); 894 nv50->constbuf_valid[s] |= 1 << i; 895 if (res->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) 896 nv50->constbuf_coherent[s] |= 1 << i; 897 else 898 nv50->constbuf_coherent[s] &= ~(1 << i); 899 } else { 900 nv50->constbuf_valid[s] &= ~(1 << i); 901 nv50->constbuf_coherent[s] &= ~(1 << i); 902 } 903 nv50->constbuf_dirty[s] |= 1 << i; 904 905 nv50->dirty_3d |= NV50_NEW_3D_CONSTBUF; 906 } 907 908 /* ============================================================================= 909 */ 910 911 static void 912 nv50_set_blend_color(struct pipe_context *pipe, 913 const struct pipe_blend_color *bcol) 914 { 915 struct nv50_context *nv50 = nv50_context(pipe); 916 917 nv50->blend_colour = *bcol; 918 nv50->dirty_3d |= NV50_NEW_3D_BLEND_COLOUR; 919 } 920 921 static void 922 nv50_set_stencil_ref(struct pipe_context *pipe, 923 const struct pipe_stencil_ref *sr) 924 { 925 struct nv50_context *nv50 = nv50_context(pipe); 926 927 nv50->stencil_ref = *sr; 928 nv50->dirty_3d |= NV50_NEW_3D_STENCIL_REF; 929 } 930 931 static void 932 nv50_set_clip_state(struct pipe_context *pipe, 933 const struct pipe_clip_state *clip) 934 { 935 struct nv50_context *nv50 = nv50_context(pipe); 936 937 memcpy(nv50->clip.ucp, clip->ucp, sizeof(clip->ucp)); 938 939 nv50->dirty_3d |= NV50_NEW_3D_CLIP; 940 } 941 942 static void 943 nv50_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask) 944 { 945 struct nv50_context *nv50 = nv50_context(pipe); 946 947 nv50->sample_mask = sample_mask; 948 nv50->dirty_3d |= NV50_NEW_3D_SAMPLE_MASK; 949 } 950 951 static void 952 nv50_set_min_samples(struct pipe_context *pipe, unsigned min_samples) 953 { 954 struct nv50_context *nv50 = nv50_context(pipe); 955 956 if (nv50->min_samples != min_samples) { 957 nv50->min_samples = min_samples; 958 nv50->dirty_3d |= NV50_NEW_3D_MIN_SAMPLES; 959 } 960 } 961 962 static void 963 nv50_set_framebuffer_state(struct pipe_context *pipe, 964 const struct pipe_framebuffer_state *fb) 965 { 966 struct nv50_context *nv50 = nv50_context(pipe); 967 968 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_FB); 969 970 util_copy_framebuffer_state(&nv50->framebuffer, fb); 971 972 nv50->dirty_3d |= NV50_NEW_3D_FRAMEBUFFER; 973 } 974 975 static void 976 nv50_set_polygon_stipple(struct pipe_context *pipe, 977 const struct pipe_poly_stipple *stipple) 978 { 979 struct nv50_context *nv50 = nv50_context(pipe); 980 981 nv50->stipple = *stipple; 982 nv50->dirty_3d |= NV50_NEW_3D_STIPPLE; 983 } 984 985 static void 986 nv50_set_scissor_states(struct pipe_context *pipe, 987 unsigned start_slot, 988 unsigned num_scissors, 989 const struct pipe_scissor_state *scissor) 990 { 991 struct nv50_context *nv50 = nv50_context(pipe); 992 int i; 993 994 assert(start_slot + num_scissors <= NV50_MAX_VIEWPORTS); 995 for (i = 0; i < num_scissors; i++) { 996 if (!memcmp(&nv50->scissors[start_slot + i], &scissor[i], sizeof(*scissor))) 997 continue; 998 nv50->scissors[start_slot + i] = scissor[i]; 999 nv50->scissors_dirty |= 1 << (start_slot + i); 1000 nv50->dirty_3d |= NV50_NEW_3D_SCISSOR; 1001 } 1002 } 1003 1004 static void 1005 nv50_set_viewport_states(struct pipe_context *pipe, 1006 unsigned start_slot, 1007 unsigned num_viewports, 1008 const struct pipe_viewport_state *vpt) 1009 { 1010 struct nv50_context *nv50 = nv50_context(pipe); 1011 int i; 1012 1013 assert(start_slot + num_viewports <= NV50_MAX_VIEWPORTS); 1014 for (i = 0; i < num_viewports; i++) { 1015 if (!memcmp(&nv50->viewports[start_slot + i], &vpt[i], sizeof(*vpt))) 1016 continue; 1017 nv50->viewports[start_slot + i] = vpt[i]; 1018 nv50->viewports_dirty |= 1 << (start_slot + i); 1019 nv50->dirty_3d |= NV50_NEW_3D_VIEWPORT; 1020 } 1021 } 1022 1023 static void 1024 nv50_set_window_rectangles(struct pipe_context *pipe, 1025 boolean include, 1026 unsigned num_rectangles, 1027 const struct pipe_scissor_state *rectangles) 1028 { 1029 struct nv50_context *nv50 = nv50_context(pipe); 1030 1031 nv50->window_rect.inclusive = include; 1032 nv50->window_rect.rects = MIN2(num_rectangles, NV50_MAX_WINDOW_RECTANGLES); 1033 memcpy(nv50->window_rect.rect, rectangles, 1034 sizeof(struct pipe_scissor_state) * nv50->window_rect.rects); 1035 1036 nv50->dirty_3d |= NV50_NEW_3D_WINDOW_RECTS; 1037 } 1038 1039 static void 1040 nv50_set_vertex_buffers(struct pipe_context *pipe, 1041 unsigned start_slot, unsigned count, 1042 const struct pipe_vertex_buffer *vb) 1043 { 1044 struct nv50_context *nv50 = nv50_context(pipe); 1045 unsigned i; 1046 1047 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_VERTEX); 1048 nv50->dirty_3d |= NV50_NEW_3D_ARRAYS; 1049 1050 util_set_vertex_buffers_count(nv50->vtxbuf, &nv50->num_vtxbufs, vb, 1051 start_slot, count); 1052 1053 if (!vb) { 1054 nv50->vbo_user &= ~(((1ull << count) - 1) << start_slot); 1055 nv50->vbo_constant &= ~(((1ull << count) - 1) << start_slot); 1056 nv50->vtxbufs_coherent &= ~(((1ull << count) - 1) << start_slot); 1057 return; 1058 } 1059 1060 for (i = 0; i < count; ++i) { 1061 unsigned dst_index = start_slot + i; 1062 1063 if (vb[i].is_user_buffer) { 1064 nv50->vbo_user |= 1 << dst_index; 1065 if (!vb[i].stride) 1066 nv50->vbo_constant |= 1 << dst_index; 1067 else 1068 nv50->vbo_constant &= ~(1 << dst_index); 1069 nv50->vtxbufs_coherent &= ~(1 << dst_index); 1070 } else { 1071 nv50->vbo_user &= ~(1 << dst_index); 1072 nv50->vbo_constant &= ~(1 << dst_index); 1073 1074 if (vb[i].buffer.resource && 1075 vb[i].buffer.resource->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT) 1076 nv50->vtxbufs_coherent |= (1 << dst_index); 1077 else 1078 nv50->vtxbufs_coherent &= ~(1 << dst_index); 1079 } 1080 } 1081 } 1082 1083 static void 1084 nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso) 1085 { 1086 struct nv50_context *nv50 = nv50_context(pipe); 1087 1088 nv50->vertex = hwcso; 1089 nv50->dirty_3d |= NV50_NEW_3D_VERTEX; 1090 } 1091 1092 static struct pipe_stream_output_target * 1093 nv50_so_target_create(struct pipe_context *pipe, 1094 struct pipe_resource *res, 1095 unsigned offset, unsigned size) 1096 { 1097 struct nv04_resource *buf = (struct nv04_resource *)res; 1098 struct nv50_so_target *targ = MALLOC_STRUCT(nv50_so_target); 1099 if (!targ) 1100 return NULL; 1101 1102 if (nouveau_context(pipe)->screen->class_3d >= NVA0_3D_CLASS) { 1103 targ->pq = pipe->create_query(pipe, 1104 NVA0_HW_QUERY_STREAM_OUTPUT_BUFFER_OFFSET, 0); 1105 if (!targ->pq) { 1106 FREE(targ); 1107 return NULL; 1108 } 1109 } else { 1110 targ->pq = NULL; 1111 } 1112 targ->clean = true; 1113 1114 targ->pipe.buffer_size = size; 1115 targ->pipe.buffer_offset = offset; 1116 targ->pipe.context = pipe; 1117 targ->pipe.buffer = NULL; 1118 pipe_resource_reference(&targ->pipe.buffer, res); 1119 pipe_reference_init(&targ->pipe.reference, 1); 1120 1121 assert(buf->base.target == PIPE_BUFFER); 1122 util_range_add(&buf->valid_buffer_range, offset, offset + size); 1123 1124 return &targ->pipe; 1125 } 1126 1127 static void 1128 nva0_so_target_save_offset(struct pipe_context *pipe, 1129 struct pipe_stream_output_target *ptarg, 1130 unsigned index, bool serialize) 1131 { 1132 struct nv50_so_target *targ = nv50_so_target(ptarg); 1133 1134 if (serialize) { 1135 struct nouveau_pushbuf *push = nv50_context(pipe)->base.pushbuf; 1136 PUSH_SPACE(push, 2); 1137 BEGIN_NV04(push, SUBC_3D(NV50_GRAPH_SERIALIZE), 1); 1138 PUSH_DATA (push, 0); 1139 } 1140 1141 nv50_query(targ->pq)->index = index; 1142 pipe->end_query(pipe, targ->pq); 1143 } 1144 1145 static void 1146 nv50_so_target_destroy(struct pipe_context *pipe, 1147 struct pipe_stream_output_target *ptarg) 1148 { 1149 struct nv50_so_target *targ = nv50_so_target(ptarg); 1150 if (targ->pq) 1151 pipe->destroy_query(pipe, targ->pq); 1152 pipe_resource_reference(&targ->pipe.buffer, NULL); 1153 FREE(targ); 1154 } 1155 1156 static void 1157 nv50_set_stream_output_targets(struct pipe_context *pipe, 1158 unsigned num_targets, 1159 struct pipe_stream_output_target **targets, 1160 const unsigned *offsets) 1161 { 1162 struct nv50_context *nv50 = nv50_context(pipe); 1163 unsigned i; 1164 bool serialize = true; 1165 const bool can_resume = nv50->screen->base.class_3d >= NVA0_3D_CLASS; 1166 1167 assert(num_targets <= 4); 1168 1169 for (i = 0; i < num_targets; ++i) { 1170 const bool changed = nv50->so_target[i] != targets[i]; 1171 const bool append = (offsets[i] == (unsigned)-1); 1172 if (!changed && append) 1173 continue; 1174 nv50->so_targets_dirty |= 1 << i; 1175 1176 if (can_resume && changed && nv50->so_target[i]) { 1177 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize); 1178 serialize = false; 1179 } 1180 1181 if (targets[i] && !append) 1182 nv50_so_target(targets[i])->clean = true; 1183 1184 pipe_so_target_reference(&nv50->so_target[i], targets[i]); 1185 } 1186 for (; i < nv50->num_so_targets; ++i) { 1187 if (can_resume && nv50->so_target[i]) { 1188 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize); 1189 serialize = false; 1190 } 1191 pipe_so_target_reference(&nv50->so_target[i], NULL); 1192 nv50->so_targets_dirty |= 1 << i; 1193 } 1194 nv50->num_so_targets = num_targets; 1195 1196 if (nv50->so_targets_dirty) { 1197 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_SO); 1198 nv50->dirty_3d |= NV50_NEW_3D_STRMOUT; 1199 } 1200 } 1201 1202 static void 1203 nv50_set_compute_resources(struct pipe_context *pipe, 1204 unsigned start, unsigned nr, 1205 struct pipe_surface **resources) 1206 { 1207 /* TODO: bind surfaces */ 1208 } 1209 1210 static inline void 1211 nv50_set_global_handle(uint32_t *phandle, struct pipe_resource *res) 1212 { 1213 struct nv04_resource *buf = nv04_resource(res); 1214 if (buf) { 1215 uint64_t limit = (buf->address + buf->base.width0) - 1; 1216 if (limit < (1ULL << 32)) { 1217 *phandle = (uint32_t)buf->address; 1218 } else { 1219 NOUVEAU_ERR("Cannot map into TGSI_RESOURCE_GLOBAL: " 1220 "resource not contained within 32-bit address space !\n"); 1221 *phandle = 0; 1222 } 1223 } else { 1224 *phandle = 0; 1225 } 1226 } 1227 1228 static void 1229 nv50_set_global_bindings(struct pipe_context *pipe, 1230 unsigned start, unsigned nr, 1231 struct pipe_resource **resources, 1232 uint32_t **handles) 1233 { 1234 struct nv50_context *nv50 = nv50_context(pipe); 1235 struct pipe_resource **ptr; 1236 unsigned i; 1237 const unsigned end = start + nr; 1238 1239 if (nv50->global_residents.size <= (end * sizeof(struct pipe_resource *))) { 1240 const unsigned old_size = nv50->global_residents.size; 1241 const unsigned req_size = end * sizeof(struct pipe_resource *); 1242 util_dynarray_resize(&nv50->global_residents, req_size); 1243 memset((uint8_t *)nv50->global_residents.data + old_size, 0, 1244 req_size - old_size); 1245 } 1246 1247 if (resources) { 1248 ptr = util_dynarray_element( 1249 &nv50->global_residents, struct pipe_resource *, start); 1250 for (i = 0; i < nr; ++i) { 1251 pipe_resource_reference(&ptr[i], resources[i]); 1252 nv50_set_global_handle(handles[i], resources[i]); 1253 } 1254 } else { 1255 ptr = util_dynarray_element( 1256 &nv50->global_residents, struct pipe_resource *, start); 1257 for (i = 0; i < nr; ++i) 1258 pipe_resource_reference(&ptr[i], NULL); 1259 } 1260 1261 nouveau_bufctx_reset(nv50->bufctx_cp, NV50_BIND_CP_GLOBAL); 1262 1263 nv50->dirty_cp |= NV50_NEW_CP_GLOBALS; 1264 } 1265 1266 void 1267 nv50_init_state_functions(struct nv50_context *nv50) 1268 { 1269 struct pipe_context *pipe = &nv50->base.pipe; 1270 1271 pipe->create_blend_state = nv50_blend_state_create; 1272 pipe->bind_blend_state = nv50_blend_state_bind; 1273 pipe->delete_blend_state = nv50_blend_state_delete; 1274 1275 pipe->create_rasterizer_state = nv50_rasterizer_state_create; 1276 pipe->bind_rasterizer_state = nv50_rasterizer_state_bind; 1277 pipe->delete_rasterizer_state = nv50_rasterizer_state_delete; 1278 1279 pipe->create_depth_stencil_alpha_state = nv50_zsa_state_create; 1280 pipe->bind_depth_stencil_alpha_state = nv50_zsa_state_bind; 1281 pipe->delete_depth_stencil_alpha_state = nv50_zsa_state_delete; 1282 1283 pipe->create_sampler_state = nv50_sampler_state_create; 1284 pipe->delete_sampler_state = nv50_sampler_state_delete; 1285 pipe->bind_sampler_states = nv50_bind_sampler_states; 1286 1287 pipe->create_sampler_view = nv50_create_sampler_view; 1288 pipe->sampler_view_destroy = nv50_sampler_view_destroy; 1289 pipe->set_sampler_views = nv50_set_sampler_views; 1290 1291 pipe->create_vs_state = nv50_vp_state_create; 1292 pipe->create_fs_state = nv50_fp_state_create; 1293 pipe->create_gs_state = nv50_gp_state_create; 1294 pipe->create_compute_state = nv50_cp_state_create; 1295 pipe->bind_vs_state = nv50_vp_state_bind; 1296 pipe->bind_fs_state = nv50_fp_state_bind; 1297 pipe->bind_gs_state = nv50_gp_state_bind; 1298 pipe->bind_compute_state = nv50_cp_state_bind; 1299 pipe->delete_vs_state = nv50_sp_state_delete; 1300 pipe->delete_fs_state = nv50_sp_state_delete; 1301 pipe->delete_gs_state = nv50_sp_state_delete; 1302 pipe->delete_compute_state = nv50_sp_state_delete; 1303 1304 pipe->set_blend_color = nv50_set_blend_color; 1305 pipe->set_stencil_ref = nv50_set_stencil_ref; 1306 pipe->set_clip_state = nv50_set_clip_state; 1307 pipe->set_sample_mask = nv50_set_sample_mask; 1308 pipe->set_min_samples = nv50_set_min_samples; 1309 pipe->set_constant_buffer = nv50_set_constant_buffer; 1310 pipe->set_framebuffer_state = nv50_set_framebuffer_state; 1311 pipe->set_polygon_stipple = nv50_set_polygon_stipple; 1312 pipe->set_scissor_states = nv50_set_scissor_states; 1313 pipe->set_viewport_states = nv50_set_viewport_states; 1314 pipe->set_window_rectangles = nv50_set_window_rectangles; 1315 1316 pipe->create_vertex_elements_state = nv50_vertex_state_create; 1317 pipe->delete_vertex_elements_state = nv50_vertex_state_delete; 1318 pipe->bind_vertex_elements_state = nv50_vertex_state_bind; 1319 1320 pipe->set_vertex_buffers = nv50_set_vertex_buffers; 1321 1322 pipe->create_stream_output_target = nv50_so_target_create; 1323 pipe->stream_output_target_destroy = nv50_so_target_destroy; 1324 pipe->set_stream_output_targets = nv50_set_stream_output_targets; 1325 1326 pipe->set_global_binding = nv50_set_global_bindings; 1327 pipe->set_compute_resources = nv50_set_compute_resources; 1328 1329 nv50->sample_mask = ~0; 1330 nv50->min_samples = 1; 1331 } 1332
