1 /* 2 * Copyright (C) 2016 Marvell Technology Group Ltd. 3 * 4 * This file is dual-licensed: you can use it either under the terms 5 * of the GPLv2 or the X11 license, at your option. Note that this dual 6 * licensing only applies to this file, and not this project as a 7 * whole. 8 * 9 * a) This library is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation; either version 2 of the 12 * License, or (at your option) any later version. 13 * 14 * This library is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * Or, alternatively, 20 * 21 * b) Permission is hereby granted, free of charge, to any person 22 * obtaining a copy of this software and associated documentation 23 * files (the "Software"), to deal in the Software without 24 * restriction, including without limitation the rights to use, 25 * copy, modify, merge, publish, distribute, sublicense, and/or 26 * sell copies of the Software, and to permit persons to whom the 27 * Software is furnished to do so, subject to the following 28 * conditions: 29 * 30 * The above copyright notice and this permission notice shall be 31 * included in all copies or substantial portions of the Software. 32 * 33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 * OTHER DEALINGS IN THE SOFTWARE. 41 */ 42 43 /* 44 * Device Tree file for Marvell Armada CP110 Master. 45 */ 46 47 #include <dt-bindings/comphy/comphy_data.h> 48 49 / { 50 cp110-master { 51 #address-cells = <2>; 52 #size-cells = <2>; 53 compatible = "simple-bus"; 54 interrupt-parent = <&gic>; 55 ranges; 56 57 config-space { 58 #address-cells = <1>; 59 #size-cells = <1>; 60 compatible = "simple-bus"; 61 interrupt-parent = <&gic>; 62 ranges = <0x0 0x0 0xf2000000 0x2000000>; 63 64 cpm_ethernet: ethernet@0 { 65 compatible = "marvell,armada-7k-pp22"; 66 reg = <0x0 0x100000>, <0x129000 0xb000>; 67 clocks = <&cpm_syscon0 1 3>, <&cpm_syscon0 1 9>, <&cpm_syscon0 1 5>; 68 clock-names = "pp_clk", "gop_clk", "mg_clk"; 69 status = "disabled"; 70 dma-coherent; 71 72 cpm_eth0: eth0 { 73 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 74 port-id = <0>; 75 gop-port-id = <0>; 76 status = "disabled"; 77 }; 78 79 cpm_eth1: eth1 { 80 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 81 port-id = <1>; 82 gop-port-id = <2>; 83 status = "disabled"; 84 }; 85 86 cpm_eth2: eth2 { 87 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 88 port-id = <2>; 89 gop-port-id = <3>; 90 status = "disabled"; 91 }; 92 }; 93 94 cpm_mdio: mdio@12a200 { 95 #address-cells = <1>; 96 #size-cells = <0>; 97 compatible = "marvell,orion-mdio"; 98 reg = <0x12a200 0x10>; 99 }; 100 101 cpm_syscon0: system-controller@440000 { 102 compatible = "marvell,cp110-system-controller0", 103 "syscon"; 104 reg = <0x440000 0x1000>; 105 #clock-cells = <2>; 106 core-clock-output-names = 107 "cpm-apll", "cpm-ppv2-core", "cpm-eip", 108 "cpm-core", "cpm-nand-core"; 109 gate-clock-output-names = 110 "cpm-audio", "cpm-communit", "cpm-nand", 111 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain", 112 "cpm-mg-core", "cpm-xor1", "cpm-xor0", 113 "cpm-gop-dp", "none", "cpm-pcie_x10", 114 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor", 115 "cpm-sata", "cpm-sata-usb", "cpm-main", 116 "cpm-sd-mmc", "none", "none", 117 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1", 118 "cpm-usb3dev", "cpm-eip150", "cpm-eip197"; 119 }; 120 121 cpm_pinctl: cpm-pinctl@440000 { 122 compatible = "marvell,mvebu-pinctrl", 123 "marvell,armada-7k-pinctrl", 124 "marvell,armada-8k-cpm-pinctrl"; 125 bank-name ="cp0-110"; 126 reg = <0x440000 0x20>; 127 pin-count = <63>; 128 max-func = <0xf>; 129 130 cpm_i2c0_pins: cpm-i2c-pins-0 { 131 marvell,pins = < 37 38 >; 132 marvell,function = <2>; 133 }; 134 cpm_i2c1_pins: cpm-i2c-pins-1 { 135 marvell,pins = < 35 36 >; 136 marvell,function = <2>; 137 }; 138 cpm_ge2_rgmii_pins: cpm-ge-rgmii-pins-0 { 139 marvell,pins = < 44 45 46 47 48 49 50 51 140 52 53 54 55 >; 141 marvell,function = <1>; 142 }; 143 pca0_pins: cpm-pca0_pins { 144 marvell,pins = <62>; 145 marvell,function = <0>; 146 }; 147 cpm_sdhci_pins: cpm-sdhi-pins-0 { 148 marvell,pins = < 56 57 58 59 60 61 >; 149 marvell,function = <14>; 150 }; 151 cpm_spi0_pins: cpm-spi-pins-0 { 152 marvell,pins = < 13 14 15 16 >; 153 marvell,function = <3>; 154 }; 155 }; 156 157 cpm_gpio0: gpio@440100 { 158 compatible = "marvell,orion-gpio"; 159 reg = <0x440100 0x40>; 160 ngpios = <32>; 161 gpiobase = <20>; 162 gpio-controller; 163 #gpio-cells = <2>; 164 }; 165 166 cpm_gpio1: gpio@440140 { 167 compatible = "marvell,orion-gpio"; 168 reg = <0x440140 0x40>; 169 ngpios = <31>; 170 gpiobase = <52>; 171 gpio-controller; 172 #gpio-cells = <2>; 173 }; 174 175 cpm_sata0: sata@540000 { 176 compatible = "marvell,armada-8k-ahci"; 177 reg = <0x540000 0x30000>; 178 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 179 clocks = <&cpm_syscon0 1 15>; 180 status = "disabled"; 181 }; 182 183 cpm_usb3_0: usb3@500000 { 184 compatible = "marvell,armada-8k-xhci", 185 "generic-xhci"; 186 reg = <0x500000 0x4000>; 187 dma-coherent; 188 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 189 clocks = <&cpm_syscon0 1 22>; 190 status = "disabled"; 191 }; 192 193 cpm_usb3_1: usb3@510000 { 194 compatible = "marvell,armada-8k-xhci", 195 "generic-xhci"; 196 reg = <0x510000 0x4000>; 197 dma-coherent; 198 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 199 clocks = <&cpm_syscon0 1 23>; 200 status = "disabled"; 201 }; 202 203 cpm_spi0: spi@700600 { 204 compatible = "marvell,armada-380-spi"; 205 reg = <0x700600 0x50>; 206 #address-cells = <0x1>; 207 #size-cells = <0x0>; 208 cell-index = <1>; 209 clocks = <&cpm_syscon0 0 3>; 210 status = "disabled"; 211 }; 212 213 cpm_spi1: spi@700680 { 214 compatible = "marvell,armada-380-spi"; 215 reg = <0x700680 0x50>; 216 #address-cells = <1>; 217 #size-cells = <0>; 218 cell-index = <2>; 219 clocks = <&cpm_syscon0 1 21>; 220 status = "disabled"; 221 }; 222 223 cpm_i2c0: i2c@701000 { 224 compatible = "marvell,mv78230-i2c"; 225 reg = <0x701000 0x20>; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 229 clocks = <&cpm_syscon0 1 21>; 230 status = "disabled"; 231 }; 232 233 cpm_i2c1: i2c@701100 { 234 compatible = "marvell,mv78230-i2c"; 235 reg = <0x701100 0x20>; 236 #address-cells = <1>; 237 #size-cells = <0>; 238 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 239 clocks = <&cpm_syscon0 1 21>; 240 status = "disabled"; 241 }; 242 243 cpm_comphy: comphy@441000 { 244 compatible = "marvell,mvebu-comphy", "marvell,comphy-cp110"; 245 reg = <0x441000 0x8>, 246 <0x120000 0x8>; 247 mux-bitcount = <4>; 248 max-lanes = <6>; 249 }; 250 251 cpm_utmi0: utmi@580000 { 252 compatible = "marvell,mvebu-utmi-2.6.0"; 253 reg = <0x580000 0x1000>, /* utmi-unit */ 254 <0x440420 0x4>, /* usb-cfg */ 255 <0x440440 0x4>; /* utmi-cfg */ 256 utmi-port = <UTMI_PHY_TO_USB3_HOST0>; 257 status = "disabled"; 258 }; 259 260 cpm_utmi1: utmi@581000 { 261 compatible = "marvell,mvebu-utmi-2.6.0"; 262 reg = <0x581000 0x1000>, /* utmi-unit */ 263 <0x440420 0x4>, /* usb-cfg */ 264 <0x440444 0x4>; /* utmi-cfg */ 265 utmi-port = <UTMI_PHY_TO_USB3_HOST1>; 266 status = "disabled"; 267 }; 268 269 cpm_sdhci0: sdhci@780000 { 270 compatible = "marvell,armada-8k-sdhci"; 271 reg = <0x780000 0x300>; 272 interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 273 dma-coherent; 274 status = "disabled"; 275 }; 276 277 cpm_nand: nand@720000 { 278 compatible = "marvell,mvebu-pxa3xx-nand"; 279 reg = <0x720000 0x100>; 280 #address-cells = <1>; 281 282 clocks = <&cpm_syscon0 1 2>; 283 nand-enable-arbiter; 284 num-cs = <1>; 285 nand-ecc-strength = <4>; 286 nand-ecc-step-size = <512>; 287 status = "disabled"; 288 }; 289 290 }; 291 292 cpm_pcie0: pcie@f2600000 { 293 compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; 294 reg = <0 0xf2600000 0 0x10000>, 295 <0 0xf6f00000 0 0x80000>; 296 reg-names = "ctrl", "config"; 297 #address-cells = <3>; 298 #size-cells = <2>; 299 #interrupt-cells = <1>; 300 device_type = "pci"; 301 dma-coherent; 302 303 bus-range = <0 0xff>; 304 ranges = 305 /* downstream I/O */ 306 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 307 /* non-prefetchable memory */ 308 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; 309 interrupt-map-mask = <0 0 0 0>; 310 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 311 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 312 num-lanes = <1>; 313 clocks = <&cpm_syscon0 1 13>; 314 status = "disabled"; 315 }; 316 317 cpm_pcie1: pcie@f2620000 { 318 compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; 319 reg = <0 0xf2620000 0 0x10000>, 320 <0 0xf7f00000 0 0x80000>; 321 reg-names = "ctrl", "config"; 322 #address-cells = <3>; 323 #size-cells = <2>; 324 #interrupt-cells = <1>; 325 device_type = "pci"; 326 dma-coherent; 327 328 bus-range = <0 0xff>; 329 ranges = 330 /* downstream I/O */ 331 <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000 332 /* non-prefetchable memory */ 333 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>; 334 interrupt-map-mask = <0 0 0 0>; 335 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 336 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 337 338 num-lanes = <1>; 339 clocks = <&cpm_syscon0 1 11>; 340 status = "disabled"; 341 }; 342 343 cpm_pcie2: pcie@f2640000 { 344 compatible = "marvell,armada8k-pcie", "snps,dw-pcie"; 345 reg = <0 0xf2640000 0 0x10000>, 346 <0 0xf8f00000 0 0x80000>; 347 reg-names = "ctrl", "config"; 348 #address-cells = <3>; 349 #size-cells = <2>; 350 #interrupt-cells = <1>; 351 device_type = "pci"; 352 dma-coherent; 353 354 bus-range = <0 0xff>; 355 ranges = 356 /* downstream I/O */ 357 <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000 358 /* non-prefetchable memory */ 359 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>; 360 interrupt-map-mask = <0 0 0 0>; 361 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 362 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 363 364 num-lanes = <1>; 365 clocks = <&cpm_syscon0 1 12>; 366 status = "disabled"; 367 }; 368 }; 369 }; 370
