| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrBuilder.h | 11 // MachineInstrBuilder.h file to handle SystemZ'isms in a clean way.
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
58 static inline const MachineInstrBuilder &
59 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) {
65 static inline const MachineInstrBuilder &
66 addOffset(const MachineInstrBuilder &MIB, int Offset) {
74 static inline const MachineInstrBuilder &
75 addRegOffset(const MachineInstrBuilder &MIB,
82 static inline const MachineInstrBuilder &
83 addRegReg(const MachineInstrBuilder &MIB
[all...] |
| SystemZFrameLowering.cpp | 21 #include "llvm/CodeGen/MachineInstrBuilder.h"
264 MachineInstrBuilder MIB =
329 MachineInstrBuilder MIB =
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUInstrBuilder.h | 11 // MachineInstrBuilder.h file to simplify generating frame and constant pool
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
32 inline const MachineInstrBuilder&
33 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
|
| SPUInstrInfo.cpp | 18 #include "llvm/CodeGen/MachineInstrBuilder.h"
360 MachineInstrBuilder MIB;
403 MachineInstrBuilder MIB2 = BuildMI(&MBB, DL, get(SPU::BR));
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrBuilder.h | 11 // MachineInstrBuilder.h file to simplify generating frame and constant pool
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
32 static inline const MachineInstrBuilder&
33 addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0,
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstrBuilder.h | 42 class MachineInstrBuilder {
45 MachineInstrBuilder() : MI(0) {}
46 explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
57 MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
75 const MachineInstrBuilder &addImm(int64_t Val) const {
80 const MachineInstrBuilder &addCImm(const ConstantInt *Val) const {
85 const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
90 const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
96 const MachineInstrBuilder &addFrameIndex(int Idx) const {
101 const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 11 // MachineInstrBuilder.h file to handle X86'isms in a clean way.
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
90 static inline const MachineInstrBuilder &
91 addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) {
98 static inline const MachineInstrBuilder &
99 addOffset(const MachineInstrBuilder &MIB, int Offset) {
107 static inline const MachineInstrBuilder &
108 addRegOffset(const MachineInstrBuilder &MIB,
115 static inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB
[all...] |
| X86InstrInfo.cpp | 25 #include "llvm/CodeGen/MachineInstrBuilder.h"
[all...] |
| X86FrameLowering.cpp | 23 #include "llvm/CodeGen/MachineInstrBuilder.h"
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 18 #include "llvm/CodeGen/MachineInstrBuilder.h"
294 const MachineInstrBuilder &AddDefaultPred(const MachineInstrBuilder &MIB) {
299 const MachineInstrBuilder &AddDefaultCC(const MachineInstrBuilder &MIB) {
304 const MachineInstrBuilder &AddDefaultT1CC(const MachineInstrBuilder &MIB,
310 const MachineInstrBuilder &AddNoT1CC(const MachineInstrBuilder &MIB) {
|
| ARMExpandPseudoInsts.cpp | 26 #include "llvm/CodeGen/MachineInstrBuilder.h"
56 MachineInstrBuilder &UseMI, MachineInstrBuilder &DefMI);
74 MachineInstrBuilder &UseMI,
75 MachineInstrBuilder &DefMI) {
417 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
481 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
530 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(),
612 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, MI.getDebugLoc(), TII->get(Opc));
653 MachineInstrBuilder LO16, HI16
[all...] |
| Thumb1RegisterInfo.cpp | 29 #include "llvm/CodeGen/MachineInstrBuilder.h"
129 MachineInstrBuilder MIB =
241 const MachineInstrBuilder MIB =
260 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
268 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(Opc), DestReg);
419 MachineInstrBuilder MIB(&MI);
430 MachineInstrBuilder MIB(&MI);
459 MachineInstrBuilder MIB(&MI);
703 MachineInstrBuilder MIB(&MI);
|
| ARMFastISel.cpp | 34 #include "llvm/CodeGen/MachineInstrBuilder.h"
208 const MachineInstrBuilder &AddOptionalDefs(const MachineInstrBuilder &MIB);
210 const MachineInstrBuilder &MIB,
256 const MachineInstrBuilder &
257 ARMFastISel::AddOptionalDefs(const MachineInstrBuilder &MIB) {
607 MachineInstrBuilder MIB;
[all...] |
| ARMFrameLowering.cpp | 21 #include "llvm/CodeGen/MachineInstrBuilder.h"
199 MachineInstrBuilder MIB =
408 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII.get(TCOpcode));
585 MachineInstrBuilder MIB =
591 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(StrOpc),
647 MachineInstrBuilder MIB =
662 MachineInstrBuilder MIB =
[all...] |
| Thumb1FrameLowering.cpp | 19 #include "llvm/CodeGen/MachineInstrBuilder.h"
324 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
363 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
|
| Thumb2ITBlockPass.cpp | 15 #include "llvm/CodeGen/MachineInstrBuilder.h"
184 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
|
| Thumb2SizeReduction.cpp | 18 #include "llvm/CodeGen/MachineInstrBuilder.h"
445 MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, TII->get(Opc));
505 MachineInstrBuilder MIB = BuildMI(MBB, *MI, MI->getDebugLoc(),
645 MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, NewMCID);
735 MachineInstrBuilder MIB = BuildMI(MBB, *MI, dl, NewMCID);
|
| ARMBaseInstrInfo.cpp | 27 #include "llvm/CodeGen/MachineInstrBuilder.h"
655 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc), DestReg);
673 MachineInstrBuilder Mov =
690 MachineInstrBuilder &AddDReg(MachineInstrBuilder &MIB,
766 MachineInstrBuilder MIB =
780 MachineInstrBuilder MIB =
[all...] |
| Thumb2InstrInfo.cpp | 21 #include "llvm/CodeGen/MachineInstrBuilder.h"
276 MachineInstrBuilder MIB =
408 MachineInstrBuilder MIB(&MI);
|
| MLxExpansionPass.cpp | 20 #include "llvm/CodeGen/MachineInstrBuilder.h"
225 MachineInstrBuilder MIB = BuildMI(MBB, *MI, MI->getDebugLoc(), MCID1, TmpReg)
|
| ARMLoadStoreOptimizer.cpp | 26 #include "llvm/CodeGen/MachineInstrBuilder.h"
355 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(Opcode))
747 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(NewOpc))
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrInfo.cpp | 18 #include "llvm/CodeGen/MachineInstrBuilder.h"
153 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
219 MachineInstrBuilder MIB = BuildMI(MF, DL, get(Mips::DBG_VALUE))
361 MachineInstrBuilder MIB = BuildMI(&MBB, DL, MCID);
|
| /external/llvm/lib/CodeGen/ |
| MachineSSAUpdater.cpp | 17 #include "llvm/CodeGen/MachineInstrBuilder.h"
190 MachineInstrBuilder MIB(InsertedPHI);
|
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.cpp | 18 #include "llvm/CodeGen/MachineInstrBuilder.h"
393 MachineInstrBuilder MIB = BuildMI(MF, DL, get(XCore::DBG_VALUE))
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 21 #include "llvm/CodeGen/MachineInstrBuilder.h"
615 MachineInstrBuilder MIB = BuildMI(*MF, DL, II);
[all...] |
