1 //===-- PPCTargetMachine.h - Define TargetMachine for PowerPC -----*- C++ -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the PowerPC specific subclass of TargetMachine. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef PPC_TARGETMACHINE_H 15 #define PPC_TARGETMACHINE_H 16 17 #include "PPCFrameLowering.h" 18 #include "PPCSubtarget.h" 19 #include "PPCJITInfo.h" 20 #include "PPCInstrInfo.h" 21 #include "PPCISelLowering.h" 22 #include "PPCSelectionDAGInfo.h" 23 #include "llvm/Target/TargetMachine.h" 24 #include "llvm/Target/TargetData.h" 25 26 namespace llvm { 27 class PassManager; 28 class GlobalValue; 29 30 /// PPCTargetMachine - Common code between 32-bit and 64-bit PowerPC targets. 31 /// 32 class PPCTargetMachine : public LLVMTargetMachine { 33 PPCSubtarget Subtarget; 34 const TargetData DataLayout; // Calculates type size & alignment 35 PPCInstrInfo InstrInfo; 36 PPCFrameLowering FrameLowering; 37 PPCJITInfo JITInfo; 38 PPCTargetLowering TLInfo; 39 PPCSelectionDAGInfo TSInfo; 40 InstrItineraryData InstrItins; 41 42 public: 43 PPCTargetMachine(const Target &T, StringRef TT, 44 StringRef CPU, StringRef FS, 45 Reloc::Model RM, CodeModel::Model CM, bool is64Bit); 46 47 virtual const PPCInstrInfo *getInstrInfo() const { return &InstrInfo; } 48 virtual const PPCFrameLowering *getFrameLowering() const { 49 return &FrameLowering; 50 } 51 virtual PPCJITInfo *getJITInfo() { return &JITInfo; } 52 virtual const PPCTargetLowering *getTargetLowering() const { 53 return &TLInfo; 54 } 55 virtual const PPCSelectionDAGInfo* getSelectionDAGInfo() const { 56 return &TSInfo; 57 } 58 virtual const PPCRegisterInfo *getRegisterInfo() const { 59 return &InstrInfo.getRegisterInfo(); 60 } 61 62 virtual const TargetData *getTargetData() const { return &DataLayout; } 63 virtual const PPCSubtarget *getSubtargetImpl() const { return &Subtarget; } 64 virtual const InstrItineraryData *getInstrItineraryData() const { 65 return &InstrItins; 66 } 67 68 // Pass Pipeline Configuration 69 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 70 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel); 71 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel, 72 JITCodeEmitter &JCE); 73 virtual bool getEnableTailMergeDefault() const; 74 }; 75 76 /// PPC32TargetMachine - PowerPC 32-bit target machine. 77 /// 78 class PPC32TargetMachine : public PPCTargetMachine { 79 public: 80 PPC32TargetMachine(const Target &T, StringRef TT, 81 StringRef CPU, StringRef FS, 82 Reloc::Model RM, CodeModel::Model CM); 83 }; 84 85 /// PPC64TargetMachine - PowerPC 64-bit target machine. 86 /// 87 class PPC64TargetMachine : public PPCTargetMachine { 88 public: 89 PPC64TargetMachine(const Target &T, StringRef TT, 90 StringRef CPU, StringRef FS, 91 Reloc::Model RM, CodeModel::Model CM); 92 }; 93 94 } // end namespace llvm 95 96 #endif 97
