/external/llvm/lib/Target/X86/ |
X86RegisterInfo.h | 53 /// BasePtr - X86 physical register used as a base ptr in complex stack 56 unsigned BasePtr; 133 unsigned getBaseRegister() const { return BasePtr; }
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X86RegisterInfo.cpp | 83 BasePtr = Is64Bit ? X86::RBX : X86::ESI; 393 return MRI->canReserveReg(BasePtr); 539 unsigned BasePtr; 544 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); 546 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); 548 BasePtr = StackPtr; 550 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); 554 MI.getOperand(i).ChangeToRegister(BasePtr, false);
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X86FrameLowering.cpp | 653 unsigned BasePtr = RegInfo->getBaseRegister(); [all...] |
/external/llvm/lib/CodeGen/ |
ShadowStackGC.cpp | 67 IRBuilder<> &B, Value *BasePtr, 70 IRBuilder<> &B, Value *BasePtr, 349 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, 354 Value* Val = B.CreateGEP(BasePtr, Indices, Name); 362 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, 366 Value *Val = B.CreateGEP(BasePtr, Indices, Name);
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/external/llvm/lib/Target/ARM/ |
ARMBaseRegisterInfo.h | 83 /// BasePtr - ARM physical register used as a base ptr in complex stack 86 unsigned BasePtr; 152 unsigned getBaseRegister() const { return BasePtr; }
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Thumb1FrameLowering.cpp | 61 unsigned BasePtr = RegInfo->getBaseRegister(); 167 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
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ARMBaseRegisterInfo.cpp | 60 BasePtr(ARM::R6) { 99 Reserved.set(BasePtr); 556 return MRI->canReserveReg(BasePtr); [all...] |
Thumb1RegisterInfo.cpp | 630 FrameReg = BasePtr;
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ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430RegisterInfo.cpp | 182 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW); 202 MI.getOperand(i).ChangeToRegister(BasePtr, false); 219 MI.getOperand(i).ChangeToRegister(BasePtr, false);
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/external/llvm/lib/Transforms/Scalar/ |
LoopIdiomRecognize.cpp | 485 Value *BasePtr = 490 if (mayLoopAccessLocation(BasePtr, AliasAnalysis::ModRef, 495 deleteIfDeadInstruction(BasePtr, *SE, TLI); 517 NewCall = Builder.CreateMemSet(BasePtr, SplatValue,NumBytes,StoreAlignment); 534 NewCall = Builder.CreateCall3(MSP, BasePtr, PatternPtr, NumBytes);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorTypes.cpp | [all...] |
DAGCombiner.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | 415 SDValue BasePtr = LD->getBasePtr(); 421 IsWordAlignedBasePlusConstantOffset(BasePtr, Base, Offset)) { 426 return DAG.getLoad(getPointerTy(), DL, Chain, BasePtr, 461 BasePtr, LD->getPointerInfo(), MVT::i16, 463 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, 479 // Lower to a call to __misaligned_load(BasePtr). 485 Entry.Node = BasePtr; 517 SDValue BasePtr = ST->getBasePtr(); 525 SDValue StoreLow = DAG.getTruncStore(Chain, dl, Low, BasePtr, 529 SDValue HighAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, BasePtr, [all...] |
/external/clang/lib/AST/ |
CXXInheritance.cpp | 110 const void *BasePtr = static_cast<const void*>(Base->getCanonicalDecl()); 112 const_cast<void *>(BasePtr),
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/external/clang/lib/CodeGen/ |
CGClass.cpp | 637 llvm::Type *BasePtr = ConvertType(BaseElementTy); 638 BasePtr = llvm::PointerType::getUnqual(BasePtr); 640 BasePtr); [all...] |
/external/llvm/lib/Analysis/ |
ConstantFolding.cpp | 689 APInt BasePtr(BitWidth, 0); 693 BasePtr = Base->getValue().zextOrTrunc(BitWidth); 694 if (Ptr->isNullValue() || BasePtr != 0) { 695 Constant *C = ConstantInt::get(Ptr->getContext(), Offset+BasePtr); [all...] |
/external/llvm/lib/Bitcode/Reader/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
BitcodeReader.cpp | [all...] |
/frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
BitcodeReader.cpp | [all...] |