| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.h | 53 /// BasePtr - X86 physical register used as a base ptr in complex stack
56 unsigned BasePtr;
127 unsigned getBaseRegister() const { return BasePtr; }
|
| X86RegisterInfo.cpp | 85 BasePtr = Is64Bit ? X86::RBX : X86::ESI;
423 return MRI->canReserveReg(BasePtr);
464 unsigned BasePtr;
469 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());
471 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);
473 BasePtr = StackPtr;
475 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr);
479 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
|
| X86FrameLowering.cpp | 670 unsigned BasePtr = RegInfo->getBaseRegister();
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMBaseRegisterInfo.h | 83 /// BasePtr - ARM physical register used as a base ptr in complex stack
86 unsigned BasePtr;
142 unsigned getBaseRegister() const { return BasePtr; }
|
| ARMBaseRegisterInfo.cpp | 50 BasePtr(ARM::R6) {
94 Reserved.set(BasePtr);
320 return MRI->canReserveReg(BasePtr);
|
| Thumb1FrameLowering.cpp | 96 unsigned BasePtr = RegInfo->getBaseRegister();
205 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
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| Thumb1RegisterInfo.cpp | 583 FrameReg = BasePtr;
|
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| ShadowStackGC.cpp | 67 IRBuilder<> &B, Value *BasePtr,
70 IRBuilder<> &B, Value *BasePtr,
349 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr,
354 Value* Val = B.CreateGEP(BasePtr, Indices, Name);
362 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr,
366 Value *Val = B.CreateGEP(BasePtr, Indices, Name);
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430RegisterInfo.cpp | 117 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW);
137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorTypes.cpp | [all...] |
| DAGCombiner.cpp | [all...] |
| /external/llvm/lib/Transforms/Scalar/ |
| LoopIdiomRecognize.cpp | [all...] |
| SROA.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 416 SDValue BasePtr = LD->getBasePtr();
422 IsWordAlignedBasePlusConstantOffset(BasePtr, Base, Offset)) {
427 return DAG.getLoad(getPointerTy(), DL, Chain, BasePtr,
462 BasePtr, LD->getPointerInfo(), MVT::i16,
464 SDValue HighAddr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr,
480 // Lower to a call to __misaligned_load(BasePtr).
486 Entry.Node = BasePtr;
518 SDValue BasePtr = ST->getBasePtr();
526 SDValue StoreLow = DAG.getTruncStore(Chain, dl, Low, BasePtr,
530 SDValue HighAddr = DAG.getNode(ISD::ADD, dl, MVT::i32, BasePtr,
[all...] |
| /external/clang/lib/AST/ |
| CXXInheritance.cpp | 109 const void *BasePtr = static_cast<const void*>(Base->getCanonicalDecl());
111 const_cast<void *>(BasePtr),
|
| /external/llvm/lib/Analysis/ |
| ConstantFolding.cpp | 714 APInt BasePtr(BitWidth, 0);
718 BasePtr = Base->getValue().zextOrTrunc(BitWidth);
719 if (Ptr->isNullValue() || BasePtr != 0) {
720 Constant *C = ConstantInt::get(Ptr->getContext(), Offset+BasePtr);
[all...] |
| /external/clang/lib/CodeGen/ |
| CGClass.cpp | 627 llvm::Type *BasePtr = ConvertType(BaseElementTy);
628 BasePtr = llvm::PointerType::getUnqual(BasePtr);
630 BasePtr);
[all...] |
| /external/llvm/lib/Bitcode/Reader/ |
| BitcodeReader.cpp | [all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_2_7/ |
| BitcodeReader.cpp | [all...] |
| /frameworks/compile/libbcc/bcinfo/BitReader_3_0/ |
| BitcodeReader.cpp | [all...] |
